Sony CDX-M770 Service Manual ▷ View online
33
CDX-M770
Pin No.
Pin Name
I/O
Pin Description
112
4V SEL
I
4V select control signal
113
(NCO)
O
Not used. (Open)
114
TUN ON
O
Tuner power control signal
115
LED SW1
O
Illumination select control signal 1
116
LED SW2
O
Illumination select control signal 2
117
(NCO)
O
Not used. (Open)
118
(NCO)
O
Not used. (Open)
119
VSS
—
Ground
120
(NCO)
O
Not used. (Open)
34
CDX-M770
• IC702 HD643255A36F (SUB SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1
SA CLK
O
Not used. (Open)
2
PG4
O
Not used. (Open)
3
VSS
—
Ground
4
NC
—
Not used. (Open)
5
VCC
—
Power supply pin (+ 5V)
6 – 9
PC0 – PC3
O
Not used. (Open)
10
VSS
—
Ground
11 – 14
PC4 – PC7
O
Not used. (Open)
15 – 18
PB0 – PB3
O
Not used. (Open)
19
VSS
—
Ground
20 – 23
PB4 – PB7
O
Not used. (Open)
24 – 27
PA0 – PA3
O
Not used. (Open)
28
VSS
—
Ground
29 – 31
PA4 – PA6
O
Not used. (Open)
32
SA EN IN
I
Connecting to ground in this set.
33
SPE LAT
I
Spectrum analyzer data latch signal
34
BU IN
I
Back-up power detection signal
35, 36
VSS
—
Ground
37
P65
O
Not used. (Open)
38
BUS ON
I
BUS ON signal
39
VCC
—
Power supply pin (+5 V)
40 – 43
PE0 – PE3
O
Not used. (Open)
44
VSS
—
Ground
45
DSP SEL
I
Spectrum analyzer data select signal
46
LED SW1
I
Illumination select control signal 1
47
LED SW2
I
Illumination select control signal 2
48
PE7
O
Not used. (Open)
49
BU IN
O
Not used. (Open)
50
LINK OFF
O
Link OFF control signal
51
PD2
O
Not used. (Open)
52
ILL ON
O
Illumination power control signal
53
VSS
—
Ground
54 – 56
PD4 – PD6
O
Not used. (Open)
57
BOOT
I
Display CPU write-in control signal
58
VCC
—
Power supply pin (+5 V)
59
P30
O
Not used. (Open)
60
LCD SO/TX
O
LCD driver serial data output
61
SP SI
I
Spectrum analyzer data input
62
RX
I
Flash CPU write-in data input
63
SP CKI
I
Spectrum analyzer clock input
64
LCD CKO
O
LCD driver serial clock output
65
VSS
—
Ground
66
LCD CEO
O
LCD driver chip enable output
67, 68
VSS
—
Ground
69
LCD INH
O
LCD driver inhibit control signal
70
LCD CE1
O
LCD driver chip enable output
71
LCD CE2
O
LCD driver chip enable output
72 – 78
P27 – P21
O
Not used. (Open)
79
FL W
O
Flash write control signal
80
FW E
I
Flash write enable signal
81
SYS RST
I
System reset signal
82
NMI
I
Non maskable interrupt signal
35
35
CDX-M770
tuner unit
(TUX201)
(TUX201)
DISC IN SW board
SWITCH board
DISPLAY board
KEY board
SERVO board
LIMIT SW board
MAIN board
SUB (CD) board
4-2. CIRCUIT BOARDS LOCATION
Pin No.
Pin Name
I/O
Pin Description
83
STBY
I
Hardware standby signal
84
VCC
—
Power supply pin (+5 V)
85
XTAL
—
Crystal oscillator (18.432 MHz)
86
EXTAL
—
Crystal oscillator (18.432 MHz)
87
VSS
—
Ground
88
PF7
O
Not used. (Open)
89
VCC
—
Power supply pin (+5 V)
90 – 96
PF6 – PF0
O
Not used. (Open)
97
UNI SO
O
SONY BUS serial data output
98
UNI SI
I
SONY BUS serial data input
99, 100
VSS
—
Ground
101
UNI CKI
I
SONY BUS serial clock input
102
P53
O
Not used. (Open)
103
AVCC
—
Power supply pin (+5 V)
104
VREF
—
Power supply pin (+5 V)
105 – 112
P40 – P47
I
Connecting to ground in this set.
113
AVSS
—
Ground
114
VSS
—
Ground
115 – 122
P17 – P10
O
Not used. (Open)
123
MD0
I
Mode setting 0
124
MD1
I
Mode setting 1
125
MD2
I
Mode setting 2
126 – 128
PG0 – PG2
O
Not used. (Open)
36
36
CDX-M770
I-V
CONV.
FOCUS
ERROR
DIGITAL
CLV
SUB
CODE
PROCESS
TRACKING
ERROR
LD
DRIVE
Q101
FOCUS
COIL
DRIVE
RF
EQ
EQ
EFM
DEM
D/A
I/F
RFO
RFAC
FE
TE
SE
RFDC
FFDR
FRDR
TFDR
SFDR
SRDR
MDP
TRDR
TE
FE
E
D
B
C
A
F
11
10
PD
4
LD
3
7
6
8
13
14
16
LD
AMP
LD ON
HOLD SW
AGC CONT
22
21
20
5
RF AMP, LD APC,
ERROR AMP
IC1
DIGITAL SERVO,
DIGITAL SIGNAL PROCESSOR
IC501
TRACKING/FOCUS COIL DRIVE
SLED/SPINDLE/LOADING MOTOR DRIVE
IC7
10
11
22
21
TRACKING
COIL
DRIVE
8
9
25
24
SLED
MOTOR
DRIVE
6
7
31
32
FOCUS
COIL
TRACKING
COIL
M902
SLED
MOTOR
SPINDLE
MOTOR
DRIVE
12
13
18
M901
SPINDLE
MOTOR
LOADING
MOTOR
DRIVE
5
4
1
2
34
35
M903
LOADING
MOTOR
MUTE 1
MUTE 2
42
43
40
41
38
39
35
52
51
50
61
79
86
81
SQSO
6
SQCK
7
SCOR
MD2
24
73
XRST 11
DATA 13
DATA 13
XLAT 14
SCLK 17
CLOK
XTAI
BCK
77
LRCK
PCMD
15
SENS 16
GFS 22
FOK 32
FOK 32
LOCK
34
54
SERVO
CTL
X1
10MHz
SW4
(LIMIT)
SW1
(DOWN)
SW3
(DISC IN)
SW2
(SELF)
LM EJ
69
LM LOD
66
SLED –
40
DRIVE ON
70
LD ON
20
HOLD
22
AGC CONT
23
SSTP
11
FOK
XIN
XOUT
54
GFS
55
SENS
57
CD CKO
65
SCLK
45
CD XLAT
68
CD DATA
67
CD RST
21
MD2
71
SCOR
64
SCK2
48
SI2
49
LOCK
16M
BCK
LRCK
DATA
CD ON
MD ON
CD ON
MD ON
46
CD ON
18
CDM ON
17
D SW
10
IN SW
62
SELF SW
63
CD SYSTEM CONTROL
IC5
SYSTEM CONTROL
IC501 (1/3)
BUS CLK 51
A MUT 19
OPEN 6
BUS SI 52
BUS SO
SRST
BUS CLK
BUS SI
BUS ON
BU CHECK
UNI SO
LINK OFF
SIRCS
53
DISPLAY
SECTION
SECTION
1
4
ATT
TUNER
SECTION
DISPLAY
SECTION
SECTION
2
BUS ON 61
RESET 30
BU IN 60
SW901
(RESET)
S60
(RESET)
HSTX
RESET
1
85
2
IC502
BU 5V
XIN XOUT
17
3
4
9
IR RECEIVE
IC801
X801
4MHz
BATT (H)
CHECK
Q603
BATT (L)
CHECK
BATT
86
RSTX
90
SIRCS 24
BU IN
RAM BU
77
SYS RST
6
BUS ON
14
UNI SO
18
UNI SI
17
UNI CKO
19
CD EJECTOR
58
CLOSE 7
CD OPENREQ
59
ATT
5
BATT
10
3
RESET
13
2
BUS ON
CONT
12
9
8
11
1
4
6
BUS INTERFACE
IC601
CLK
DATA
5
4
6
2
1
3
8
7
CNP601
BUS
CONTROL IN
Q602
A
C
B
D
E
F
PD
LD
OPTICAL PICK-UP
KSS-720A
• Signal path
:CD
31
32
D3
G0
4-3. BLOCK DIAGRAM — CD SECTION —
(Page 38)
(Page 37)
(Page 38)
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