Sony CDX-M770 Service Manual ▷ View online
29
CDX-M770
• IC901 CXD2727Q-4 (DIGITAL SIGNAL PROCESSOR, DIGITAL FILTER, D/A CONVERTER) (MAIN BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
DGND
—
Ground terminal (digital system)
2 – 21
NIL
I
Input terminal for the test (fixed at “L”)
22 – 24
JPE1 – JPE3
I
External condition jump terminal “H”: condition jump (fixed at “L”)
25
DVDD
—
Power supply terminal (+3.3 V) (digital system)
26
DA1GND
—
Ground terminal (for D/A converter 1) (analog system)
27
DA1LO
O
D/A converter 1 (L-ch side) output terminal
Analog signal output for front side (L-ch side) output in this set
28
DA1VDD
—
Power supply terminal (+3.3 V) (for D/A converter 1) (analog system)
29
DA1RO
O
D/A converter 1 (R-ch side) output terminal
Analog signal output for rear side (L-ch side) output in this set
30
DA1VDD
—
Power supply terminal (+3.3 V) (for D/A converter 1) (analog system)
31
DA1GND
—
Ground terminal (for D/A converter 1) (analog system)
32
ADLVDD
—
Power supply terminal (+3.3 V) (for L-ch side A/D converter) (analog system)
33
ADLGND
—
Ground terminal (for L-ch side A/D converter) (analog system)
34
ADLREF
O
Connected to the bus control for A/D converter (for L-ch side)
35
ADLIN
I
A/D converter (L-ch side) analog input terminal
Tuner and bus audio input signal (L-ch side) in this set
36
DA2GND
—
Ground terminal (for D/A converter 2) (analog system)
37
DA2VDD
—
Power supply terminal (+3.3 V) (for D/A converter 2) (analog system)
38
DA2LO
O
D/A converter 2 (L-ch side) output terminal (Not used.)
39
MCKVDD
—
Power supply terminal (+3.3 V) (for master clock) (analog system)
40
MCKO
O
System clock output terminal (16.9344 MHz)
41
MCKI
I
System clock input terminal (16.9344 MHz)
42
MCKGND
—
Ground terminal (for master clock) (analog system)
43
DA2RO
O
D/A converter 2 (R-ch side) output terminal
Analog signal output for sub woofer output in this set
44
DA2VDD
—
Power supply terminal (+3.3 V) (for D/A converter 2) (analog system)
45
DA2GND
—
Ground terminal (for D/A converter 2) (analog system)
46
ADRIN
I
A/D converter (R-ch side) analog input terminal
Tuner and bus audio input signal (R-ch side) in this set
47
ADRREF
O
Connected to the bus control for A/D converter (for R-ch side)
48
ADRGND
—
Ground terminal (for R-ch side A/D converter) (analog system)
49
ADRVDD
—
Power supply terminal (+3.3 V) (for R-ch side A/D converter) (analog system)
50
DA3GND
—
Ground terminal (for D/A converter 3) (analog system)
51
DA3VDD
—
Power supply terminal (+3.3 V) (for D/A converter 3) (analog system)
52
DA3LO
O
D/A converter 3 (L-ch side) output terminal
Analog signal output for rear side (R-ch side) output in this set
53
DA3VDD
—
Power supply terminal (+3.3 V) (for D/A converter 3) (analog system)
54
DA3RO
O
D/A converter 3 (R-ch side) output terminal
Analog signal output for front side (R-ch side) output in this set
55
DA3GND
—
Ground terminal (for D/A converter 3) (analog system)
56
DGND
—
Ground terminal (digital system)
57
SYS RST
I
System reset signal input from the master controller (IC501) “L”: reset
58
BFOT
O
Master clock signal output terminal
59
SCK
I
Serial data transfer clock signal input from the master controller (IC501)
60
REDY
O
Transfer enable signal output to the master controller (IC501)
“L”: transfer prohibition
61
TRDT
O
Serial data output to the master controller (IC501)
62
XLAT
I
Serial data latch pulse input from the master controller (IC501)
63
RVDT
I
Serial data input from the master controller (IC501)
64
24/32BIT (NIH)
I
Serial data 24/32 bit slot selection signal input terminal
“L”: 24 bit slot, “H”: 32 bit slot (validity at slave mode) (fixed at “L” in this set)
30
CDX-M770
Pin No.
Pin Name
I/O
Pin Description
65
DVDD
—
Power supply terminal (+3.3 V) (digital system)
66
DVSS
—
Ground terminal (digital system)
67 – 69
SO1 – SO3
O
Serial data output terminal (Not used.)
70
SOUT
O
Serial data output terminal (Not used.)
71
SI1
I
Serial data input terminal
72, 73
SI2, SI3
I
Serial data input terminal Not used (fixed at “L”)
74
SIN
I
Serial data input terminal Not used (fixed at “L”)
75
BCK
I
Bit clock signal (2.8224 MHz) input terminal
76
LRCK
I
L/R sampling clock signal (44.1 kHz) input terminal
77
MST/SLV
I
Bit clock (BCK) and L/R sampling clock (LRCK) signal master/slave mode selection
signal input from the master controller (IC501) “L”: master mode, “H”: slave mode
78
DVDD
—
Power supply terminal (+3.3 V) (digital system)
79
PLLGND
—
Ground terminal (PLL system)
80
PLLENA
I
PLL enable signal input terminal Normally: fixed at “L”
81
22 MHz
O
PLL clock signal output terminal (22.5792 MHz) (Not used.)
82
PLLCNT
I
PLL clock output control signal input from the master controller (IC801)
At “L” is input: fixed at “L” is PLCLK (pin ia)
At “H” is input: PLL clock signal output from the PLCLK (pin ia)
83
PLLVDD
—
Power supply terminal (+3.3 V) (PLL system)
84
DGND
—
Ground terminal (digital system)
85 – 94
NIL
I
Input terminal for the test Normally: fixed at “L”
95
DVDD
—
Power supply terminal (+3.3 V) (digital system)
96
DRAMGND
—
Ground terminal (for D-RAM)
97 – 99
NIL
I
Input terminal for the test Normally: fixed at “L”
100
DRAMVDD
—
Power supply terminal (+3.3 V) (for D-RAM)
31
CDX-M770
• IC501 MB90574BPMT-G-319-BND (SYSTEM CONTROL) (MAIN BOARD) (US MODEL)
• IC501 MB90574BPMT-G-320-BND (SYSTEM CONTROL) (MAIN BOARD) (AEP, UK, E MODEL)
• IC501 MB90574BPMT-G-320-BND (SYSTEM CONTROL) (MAIN BOARD) (AEP, UK, E MODEL)
Pin No.
Pin Name
I/O
Pin Description
1 – 3
(NCO)
O
Not used. (Open)
4
SP LATCH
O
Spectrum analyzer data latch signal
5
ATT
O
System mute signal
6
SYS RST
O
System reset signal
7
(NCO)
O
Not used. (Open)
8
VCC
—
Power supply pin (+5 V)
9
(NCO)
O
Not used. (Open)
10
E2P SIO
I/O
Tuner unit EEPROM BUS serial data input/output
11 E2P CKO I/O Tuner unit EEPROM BUS serial clock input/output
12
FLS SI
I
Flash CPU write-in data input
13
FLS SO
O
Flash CPU write-in data output
14
BUS ON
O
BUS ON signal
15
BEEP
O
Beep signal
16
TEL ATT
I
Telephone mute signal
17
UNI SI
I
SONY BUS serial data input
18
UNI SO
O
SONY BUS serial data output
19
UNI CKO
O
SONY BUS serial clock output
20 – 23
(NCO)
O
Not used. (Open)
24
SIRCS
I
Wireless remote data input
25
DSP SI
I
DSP serial data input
26
DSP SO
O
DSP serial data output
27
DSP CKO
O
DSP serial clock output
28
DSP PLL
O
DSP PLL clock control signal
29
DSP MST
O
DSP master/slave control signal
30
(NCO)
O
Not used. (Open)
31
VOL ATT
O
Electronic volume mute signal
32
TU ATT
O
Not used. (Open)
33
VSS
—
Ground
34
C
—
Not used. (Open)
35
DSP LAT
O
DSP latch signal
36
DSP RST
O
DSP reset signal
37
SHIFT
O
OSC frequency shift signal for DC/DC conv.
38
DVCC
—
Power supply pin (+5 V)
39
DVSS
—
Ground
40
FP CTRL
O
OPEN/CLOSE motor voltage control signal
41
(NCO)
O
Not used. (Open)
42
AVCC
—
Power supply pin (+5 V)
43
AVRH
—
Power supply pin (+5 V)
44
AVRL
—
Ground
45
AVSS
—
Ground
46
KEY IN0
I
Key input 0
47
KEY IN1
I
Key input 1
48
RC IN0
I
Rotary commander input 0
49
(NCO)
O
Not used. (Open)
50
QUALITY
I
Noise detection signal
51
(NCO)
O
Not used. (Open)
52
MPTH
I
Tuner multi path detection signal
53
VSM
I
S-meter voltage detection signal
54
VCC
—
Power supply pin (+5 V)
55
STBY
O
Power amplifier drive signal
56
NS MASK
O
Noise detection ON/OFF control signal
32
CDX-M770
Pin No.
Pin Name
I/O
Pin Description
57
DDC ON
O
DC/DC converter power control signal
58
CD EJECT OK
O
CD eject control signal
59
CD OPEN REQ
I
Front panel open request signal
60
(NCO)
O
Not used. (Open)
61
OPEN KEY
I
OPEN key detection signal
62
NOSE SW
I
Nose SW detection signal
63
VSS
—
Ground
64
DETACH SW
I
Detach SW detection signal
65
PWM
I
Oscillation frequency count input
66 – 68
(NCO)
O
Not used. (Open)
69
FLASH W
I
Flash write-in signal
70
I2C SIO
I/O
I2C serial data input/output
71 I2C CKO I/O I2C serial clock input/output
72
RC IN1
I
Rotary commander input 1
73
X1A
—
Crystal oscillator (32.768 kHz)
74
X0A
—
Crystal oscillator (32.768 kHz)
75
DAVN
I
RDS data acquisition detect signal
76
CDON IN
I
CD mechanism power control signal
77
BU IN
I
Back-up power detection signal
78
DSP READY
I
DSP ready signal
79
KEY ACK
I
Key acknowledge signal
80
AD ON
O
A/D converter power control signal
81
ACC IN
I
Accessory key ON signal
82
FLS PWON
O
Flash power ON control signal
83
PW ON
O
Audio circuit power ON control signal
84
TEST IN
I
Test mode initial setting detection signal
85
RAM BU
I
RAM reset detection signal
86
HSTX
I
Hardware standby input
87
MD2
I
Connecting to ground in this set.
88
MD1
I
Connecting to VCC in this set.
89
MD0
I
Connecting to VCC in this set.
90
RSTX
I
Reset input
91
VSS
—
Ground
92
X0
—
Crystal oscillator (3.68 MHz)
93
X1
—
Crystal oscillator (3.68 MHz)
94
VCC
—
Power supply pin (+5 V)
95
ILL IN
I
Illumination dimmer control signal
96
I DET
I
OPEN/CLOSE motor abnormal current detection
97
MOT –
O
OPEN/CLOSE motor control signal
98
MOT +
O
OPEN/CLOSE motor control signal
99
CLOSE SW
I
Close SW detection signal
100
OPEN SW
I
Open SW detection signal
101
CENT SW
I
Cent SW detection signal
102
(NCO)
O
Not used. (Open)
103
CDMD SEL
I
CD/MD selector signal
104
DEST SEL1
I
Destination selector signal 1
105
DEST SEL2
I
Destination selector signal 2
106
BOOT
O
Display CPU write-in control signal
107
(NCO)
O
Not used. (Open)
108
DSP ON
O
DSP power control signal
109
SENS ON
O
Not used. (Open)
110
EMPH IN
I
Emphasis input
111
PACK IN
I
Pack detection signal
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