Sony CDX-M50IP / CDX-MR50IP Service Manual ▷ View online
33
CDX-M50IP/MR50IP
IC800 NJM2387ADL3(TE2) (MAIN BOARD (3/4))
1
2
3
4
5
CURRENT
LIMIT
THERMAL
PROTECTION
OVERVOLTAGE
PROTECTION
BANDGAP
REFERENCE
VIN
CONT
VOUT
VADJ
GND
34
CDX-M50IP/MR50IP
IC250 ATMEGA32L-8AU-S6 (IPOD BOARD)
PROGRAM
COUNTER
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
PROGRAM
FLASH
STACK
POINTER
SRAM
GENERAL
PURPOSE
REGISTERS
ALU
AVR CPU
Z
Y
X
EEPROM
OSCILLATOR
ADC
INTERFACE
TIMERS
/COUNTERS
OSCILLATOR
TWI
MCU CTRL.
& TIMING
INTERNAL
CALIBRATED
OSCILLATOR
OSCILLATOR
STATUS
REGISTER
PROGRAMMING
LOGIC
PORT B
DIGITAL
INTERFACE
PORT B
DRIVERS
/BUFFERS
40
41
42
43
44
34
ADC3
ADC4
ADC5
ADC6
ADC7
AREF
GND
AVCC
TOSC2
TOSC1
TDI
TDO
MOSI
MISO
SCK
RESET
VCC
GND
XTAL2
XTAL1
RXD
TXD
INTO
ADC2
ADC1
ADC0
VCC
GND
XCK/T0
T1
AIN0/INT2
AIN1/OC0
SS
TMC
TCK
SDA
SCL
OC2
ICP1
VCC
GND
INT1
OC1A
OC1B
30
31
32
33
35
36
37
38
39
2
1
3
4
5
9
10
11
7
8
6
INTERRUPT
UNIT
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
PORT A
DIGITAL
INTERFACE
PORT A
DRIVERS
/BUFFERS
PORT C
DRIVERS
/BUFFERS
22
25
26
27
28
29
23
24
21
20
19
13
12
14
15
16
17
18
PORT C
DIGITAL
INTERFACE
PORT D
DIGITAL
INTERFACE
PORT D
DRIVERS
/BUFFERS
COMP.
INTERFACE
USART
SPI
MUX &
ADC
35
CDX-M50IP/MR50IP
• IC Pin Description
IC501 MB90F045PF-G-9061-SPE1 (SYSTEM CONTROL) (MAIN BOARD (4/4))
Pin No.
Pin Name
I/O
Pin Description
1
AREASEL0
I
Destination setting pin (L: CDX-M50IP, H: CDX-MR50IP)
2
AREASEL1
I
Destination setting pin (Fixed at L in this set)
3
AREASEL2
I
Destination setting pin (L: FM (200k)/AM (10k), H: FM (50k)/AM (9k)
(CDX-M50IP only))
4
AREASEL3
I
Destination setting pin (L: CDX-MR50IP, H: CDX-M50IP)
5
BEEP
O
Beep signal output to power amp IC.
6
AMPSTB
O
Standby signal output to power amp IC.
7
DIAG
I
Status signal input from power amp IC.
8
NCO
O
Not used. (Open)
9
SA_DATA
O
Data output for electronic volume IC spectrum analyzer.
10
SA_CKO
O
Spectrum analyzer clock signal output
11
VSS
—
Ground
12
TUATT
O
Tuner mute control signal output
13
NSMASK
O
Noise mask signal output (CDX-MR50IP only)
14
VOLATT
O
Attenuator control signal output to electronic volume IC.
15
ILLUMI_SEL
I
Illumination voltage setting pin (L: illumination power supply 9 V)
16 to 20
NCO
O
Not used. (Open)
21
B-OUT_SEL
I
Black out select signal input (L: non black out)
22
NCO
O
Not used. (Open)
23
VCC5
—
Power supply pin (+3.3 V)
24
EEP_SIO
I/O
Serial data signal input/output for EEPROM communication.
25
EEP_CKO
O
Serial clock signal output for EEPROM communication.
26
RDS_ON
O
RDS ON signal output (CDX-MR50IP only)
27
LCD_CE
O
Chip enable signal output to LCD drive IC.
28
LCD_SO
O
Serial data signal output to LCD drive IC.
29
LCD_SCK
O
Serial clock signal output to LCD drive IC.
30
DOOR_IND
O
DISC IN indicator LED control signal output
31
RE_IN0
I
Rotary encoder signal input 0
32
RE_IN1
I
Rotary encoder signal input 1
33
I2C_SCK
O
I2C bus serial clock signal output
34
I2C_SIO
I/O
I2C bus serial data signal input/output
35
DAVDD
—
Power supply pin for A/D converter. (+3.3 V)
36
AVRH
—
External reference power supply pin for A/D converter. (+3.3 V)
37
DAVSS
—
Ground for A/D converter.
38
QUALITY
I
Noise detection signal input (CDX-MR50IP only)
39
VSM
I
S meter voltage detection signal input
40
KEYIN1
I
Key signal input 1
41
KEYIN0
I
Key signal input 0
42
VSS
—
Ground
43
RC_IN0
I
Rotary commander key signal input
44
INI_COL
I
Initial color setting signal input (L: red)
45
COL_SEL
I
Key illumination 2 colors select signal input (H: 2 color)
46
SA_IN
I
Spectrum analyzer signal input
47
NCO
O
Not used. (Open)
48
AD_ON
O
A/D converter power supply control signal output
49, 50
MD0, MD1
I
Signal input for operation mode designation. (Fixed at H in this set)
51
MD2
I
Signal input for operation mode designation. (Fixed at L in this set)
52
KEYACK
I
Key acknowledge detection signal input
36
CDX-M50IP/MR50IP
53
TU_ATTIN
I
Tuner mute zero cross detection signal input (CDX-MR50IP only)
54
BUIN
I
Backup power supply detection signal input
55
FUNC_SEL
O
AUX audio input/iPod audio input select control signal output
(L: iPod audio input, H: AUX audio input)
56
DAVN
I
RDS data block synchronized detection signal input from RDS receiver IC.
(CDX-MR50IP only)
57
BUSON_A
O
Bus ON signal output (for iPod)
58
UNISI
I
SONY-BUS data signal input
59
UNISO
O
SONY-BUS data signal output
60
UNISCK
O
SONY-BUS clock signal output
61
Z-MUTE
I
CD zero cross mute detection signal input
62
NCO
O
Not used. (Open)
63
FLASH_W
I
Memory mode select signal input (Fixed at H in this set)
64
SIRCS
I
Remote control signal input
65 to 69
NCO
O
Not used. (Open)
70
DOOR_SW
I
Front panel open/close detection signal input
71
RC_IN1
I
Rotary commander shift key signal input
72 to 74
NCO
O
Not used. (Open)
75
NOSE_SW
I
Front panel detach detection signal input (L: with panel, H: without panel)
76
OPEN-MUTE
O
Mute signal output at during the AUX source mode. (L: other, H: keep)
77
RESET
I
Reset signal input
78
NCO
O
Not used. (Open)
79
XOUT
O
Sub-clock signal output (32.768 kHz)
80
XIN
I
Sub-clock signal input (32.768 kHz)
81
VSS1
—
Ground
82
OSCIN
I
Main-clock signal input (18.432 MHz)
83
OSCOUT
O
Main-clock signal output (18.432 MHz)
84
VCC3
—
Power supply pin (+3.3 V)
85
CYRIL_SEL
I
CYRIL select signal input (L: non CYRIL)
86
DEMOSEL
I
Demo select signal input (H: Demo ON)
87
NCO
O
Not used. (Open)
88
SYSRST
O
System reset signal output
89
EJECT_OK_SW
O
Eject OK signal output
90
NCO
O
Not used. (Open)
91
CD_ON
I
CD mechanism servo power control request signal input
92
CDM_ON
I
CD mechanism deck power control request signal input
93, 94
NCO
O
Not used. (Open)
95
BUSON
O
Bus ON signal output
96
TESTIN
I
Test mode detection signal input (Fixed at H in this set)
97
ILL_IN
I
Illumination detection signal input (H: illumination OFF)
98
TELATT
I
Telephone attenuator detection signal input
99
ACC_IN
I
Accessory power supply detection signal input
100
ATT
O
Audio mute control signal output
Pin No.
Pin Name
I/O
Pin Description
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