Sony CDX-F7500 / CDX-F7700 Service Manual ▷ View online
17
CDX-F7500/F7700
• IC303 M30624MGP-123GP (SYSTEM CONTROL) (MAIN BOARD (3/3))
Pin No.
Pin Name
I/O
Pin Description
1
SIRCS
I
Remocon data input
2
(NCO)
O
Not used
3
CD SO/TSO
O
CD servo serial data output
4
CD SI/TSI
I
CD servo serial data input
5
CD CKO/TCKO
O
CD servo serial clock output
6
BYTE
I
Connecting to ground.
7
CNVSS
I
Flash write-in signal input
8
XCIN
I
Sub clock signal input (32.768kHz)
9
XCOUT
O
Sub clock signal output (32.768kHz)
10
RESET
I
CPU reset input
11
XOUT
O
Main clock signal output (6MHz)
12
VSS
—
Ground
13
XIN
I
Main clock signal input (6MHz)
14
VCC1
—
Ground
15
NMI
I
Non maskable interrupt signal input
16
CD INTQ
I
CD-TEXT sync. signal input
17
DAVN
I
RDS data block sync. detection signal input
18
BU IN
I
Back-up power detection signal input
19
NS MASK
O
NS-MASK signal output
20
BEEP
O
Beep signal output
21
FSW IN
I
DD converter OSC frequency count input
22
FSW OUT
O
DD converter OSC frequency change output
23
SA CLK
O
Spectrum analyzer clock output
24
TEL ATT
I
Telephone mute signal input
25
ATT
O
Mute signal output
26
VOL ATT
O
Electronic volume mute signal output
27
I2C CKO
O
I2C bus serial clock output
28
I2C SIO
O
I2C bus serial data output
29
UNI SO
O
SONY bus serial data output
30
UNI SI
I
SONY bus serial data input
31
UNI CKO
O
SONY bus serial clock output
32
TUNER ATT
O
Tuner mute signal output
33
EE SIO
I/O
Tuner pack EEPROM serial data input/output
34
EE CKO
O
Tuner pack EEPROM serial clock output
35
RE IN0
I
Rotary encoder signal input 0
36
RE IN1
I
Rotary encoder signal input 1
37
NOSE SW
I
Front panel detection signal input
38
DOOR SW
I
Panel open detection signal input
39
HOLD
I
External bus data input (HOLD)
40
AMP DIAG
I
AMP self-diagnosis function control signal input
41
AMP STB
O
AMP standby signal output
42
(NCO)
O
Not used
43
(NCO)
O
Not used
44
WRI/WR
I
External bus data input (WRI/WR)
45
CD LIMIT
I
CD LIMIT switch detection signal input
46
CD D SW
I
CD D switch detection signal input
47
CD IN SW
I
CD IN switch detection signal input
48
4V SEL
I
4V PRE-OUT select signal input
49
MP3 SEL
I
Deck mechanism select signal input
50
DST SEL1
I
Destination select setting pin 1
51
DST SEL2
I
Destination select setting pin 2
52
CD LM LOAD
O
CD loading signal output
18
CDX-F7500/F7700
Pin No.
Pin Name
I/O
Pin Description
53
CD LM EJECT
O
CD eject signal output
54
CD RESET
O
CD reset signal output
55
CD AO
O
CD AO signal output
56
CD STB
O
CD strobe signal output
57
(NCO)
O
Not used
58
CD RF OK
I
CD RF OK signal input
59
CD ON
I
CD ON signal input
60
VCC2
—
Power supply pin (+5V)
61
DISP RESET
O
Display CPU reset signal output
62
VSS
—
Ground
63
TEST IN
I
Test mode signal input
64
BUS ON
O
BUS ON signal output
65
SYS RST
O
System reset signal output
66
BUS/AUX
O
BUS AUDIO/AUX-IN select signal output
67
(NCO)
O
Not used
68
ACC IN
I
ACC power supply check signal input
69
ILL IN
I
ILL check signal input
70
RC IN1
I
Rotary commander signal input
71
CDM ON
I
CD power supply ON signal input
72
CD SELF SW
I
CD SELF switch detection signal input
73
TU ATT IN
I
Tuner attenuator zero cross signal input
74
ZERO DET1
I
ZERO detection signal input 1
75
ZERO DET2
I
ZERO detection signal input 2
76
Z ATT
I
Z mute signal input
77
(NCO)
O
Not used
78
(NCO)
O
Not used
79
ROMC EN
O
Connecting to ground.
80
QUALITY
I
Tuner noise detection signal input
81
MPTH
O
Not used
82
VSM
I
S-meter signal input
83
SA IN
I
Spectrum analyzer data input
84
KEY IN1
I
Key signal input
85
KEY IN0
I
Key signal input
86
RC IN0
I
Rotary commander signal input
87
KEY ACK2
I
Rotary commander ACK signal input
88
KEY ACK0
I
Key ACK signal input
89
KEY ACK1
I
Key ACK signal input
90
DOORING
O
Sub panel LED power supply control signal output
91
RAM BU
I
RAM back-up input
92
FLD ON
O
FL driver power supply control signal output
93
FL ON
O
FL power supply control signal output
94
AVSS
—
Ground
95
DISP CE
O
Display CPU chip enable output
96
VREF
—
AD converter reference voltage (+5V)
97
AVCC
—
Power supply pin (+5V)
98
DISP SI/RX
I
Display CPU serial data input
99
DISP SO/TX
O
Display CPU serial data output
100
DISP CKO
O
Display CPU serial clock output
19
19
CDX-F7500/F7700
• IC901 M30823MH-080GP (DISPLAY CONTROL) (KEY BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
SYS CE
I
Main chip enable input
2
(NCO)
O
Not used
3
FL DAT3
O
FL serial data output 3
4
(NCO)
O
Not used
5
FL CLK IN
I
FL serial clock input
6
BYTE
I
Connecting to ground.
7
CNVSS
I
Flash write-in signal input
8
PLL LPF
O
PLL low pass filter connection pin
9
PLL GND
I
Ground
10
RESET
I
CPU reset input
11
XOUT
O
Main clock signal output (8MHz)
12
VSS
—
Ground
13
XIN
I
Main clock signal input (8MHz)
14
VCC
—
Power supply pin (+5V)
15
NMI
I
Non maskable interrupt signal input
16
(NCO)
O
Not used
17
GCP IN
I
GCP pulse interrupt signal input
18, 19
(NCO)
O
Not used
20
GCP OUT
O
GCP pulse signal output
21
LAT
O
FL data LAT output
22
BK
O
FL BK signal output
23
GCP2
O
FL GCP signal output 2
24
(NCO)
O
Not used
25
GCP1
O
FL GCP signal output 1
26
(NCO)
O
Not used
27
GCP4
O
FL GCP signal output 4
28
GCP3
O
FL GCP signal output 3
29
SYS SO
O
Main bus serial data output
30
SYS SI
I
Main bus serial data input
31
SYS CLK
O
Main bus serial clock output
32
(NCO)
O
Not used
33
FL DAT1
O
FL serial data output 1
34
(NCO)
O
Not used
35
FL CLK
O
FL serial clock output
36 to 38
(NCO)
O
Not used
39
HOLD
I
External bus data input (HOLD)
40 to 43
(NCO)
O
Not used
44
WRI/WR
I
External bus data input (WRI/WR)
45 to 59
(NCO)
O
Not used
60
VCC
—
Power supply pin (+5V)
61
(NCO)
O
Not used
62
VSS
—
Ground
63 to 93
(NCO)
O
Not used
94
AVSS
—
Ground
95
(NCO)
O
Not used
96
VREF
—
Reference voltage (+5V)
97
AVCC
—
Power supply pin (+5V)
98
(NCO)
—
Not used
99
FL DAT2
O
FL serial data output 2
100
FL CLK IN
I
FL serial clock input
20
20
CDX-F7500/F7700
3-2. BLOCK DIAGRAM — CD SECTION —
46
ASYO
RF AMP,DIGITAL SERVO,
DIGITAL SIGNAL PROCESSOR
IC3
41
RFACO
24
FEO
22
TEO
42 RFACI
23 FEI
21 TEI
13 FFDR
PD1
PD2
E
F
I-V AMP
PD
LD
DETECTOR
45 ASYI
27
26
29
28
19
20
E
C
D
A
B
F
36 LD
37
PD
(FOCUS)
(TRACKING)
2-AXIS DEVICE
OPTICAL
PICK-UP BLOCK
(KSS1000E)
• Siganal Path
: CD PLAY
LASER DIODE
M
M
M
13
12
VO1–
VO1+
6
7
VO4+
VO4–
8
9
VO3–
VO3+
5
4
VLO+
VLO–
FWD
REV
1
2
VIN2+ 22
14 FRDR
VIN2– 21
11 TFDR
VIN1+B 19
12 TRDR
VIN1–B 18
9 SFDR
VIN4+ 31
10 SRDR
VIN4– 32
6 MDP
VIN3+ 25
MUTE 34
11
10
VO2–
VO2+
M903
(LOADING)
M901
(SPINDLE)
M902
(SLED)
FOCUS/TRACKING COIL DRIVE,
SLED/SPINDLE/LOADING
MOTOR DRIVE
IC1
3
FOK
96
SQSO
97
SQCK
100
XRST
102
DATA
104
XLAT
105
CLOK
107
SENS
CD-L
MAIN
SECTION
A
81
AOUT1
86
AOUT2
R-CH
18 CD SQCK
15 CD XRST
15 CD XRST
14 CD DATA
13 CD XLAT
53 MEC_SELFSW
45 MEC_INSW
42 MEC_LIMIT
12 CD CLOK
11 CD SENS
108
SCLK
10 CD SCLK
113
GFS
8
CD GFS
114
C2PO
7
CD C2PO
115
SCOR
52 CD SCOR
81 X1
80 X0
MEC LOAD
43
MEC EJECT
44
CD
SYSTEM CONTROL
IC4
AUDIO INTERFACE
IC8
+1.5V REG
IC7
SYSTEM CONTROL
IC303 (1/3)
19 CD FOK
16 CD SQSO
DRON
41
SD1O
14
LRCK1B
19
LRCK1A
16
SD0O
11
BCK1B
18
BCK1A
15
CLCK
22
SRMSTB
41
RESET
2
STANDBY
3
BUCK
36
I2C SCL
7
I2C SDA
6
BUSO
28
SW2
(SELF)
46 MEC_DSW
SW1
(DOWN)
SW3
(DISC IN)
SW4
(LIMIT)
91
LMUT
22 CD LMUT
90
RMUT
23 CD RMUT
20
LINK OFF
IC273 (1/3)
IC252 (1/3)
IC273 (2/3)
IC273 (3/3)
56
UNISI
25
RXD
57
UNISO
58
UNICLK
50
BUS ON
75
RSTX
61
EJECT OK
67
MECON CHK
69
EMPH
32
DEC SDA
31
DEC SCL
30
DEC INT
29
DEC STBY
28
DEC XRST
27
DEC SSTBY
37
DEC XMUTE
65
DECON
63
MECON
64
CDON
66
ZMUT
60
A ATT
51
BU IN
26
TXD
PD1
E
F
LD
PD
FCS+
FCS–
TRK+
TRK–
PD2
AUTOMATIC
POWER
CONTROL
Q1
+1.5V
CONTROL
Q2,3
+3.3V
CONTROL
Q5,6
• R-ch is omitted due to same as L-ch.
77
78
X1
16.9344MHz
X2
18.43MHz
XTAI
XTAO
66
BCK
60
BCKI
61
PCMDI
63
LRCK
62
LRCKI
65
PCMD
MAIN
SECTION
B
DOOR SW
LINK OFF
7
1
UNI SI
UNI SO
ATT
BU CHK
BU CHK
UNI SCK
BUS ON
SYS RST
38
CD ON
VOUT
59
CDM ON
71
Z ATT
C D+6V
76
68
CDON CHK
1
5
VDD
3
CE
CD+3.3V
+1.5V
+3.3V
BU+3.3V
6
2
IC252 (3/3)
2
5
IC252 (2/3)
Q267
1
7
2
6
5
3
(Page 21)
(Page 21)
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