Sony CDX-CA750 / CDX-CA750X / CDX-CA760X Service Manual ▷ View online
21
CDX-CA750/CA750X/CA760X
• IC701 HD6432355A35F (SUB SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1
PG3
O
Spectrum analyzer clock output
2
PG4
O
Not used (open)
3
VSS
—
Ground pin
4
NC
—
Not used (open)
5
VCC
—
Power supply pin
6 – 9
PC0 – PC3
O
Not used (open)
10
VSS
—
Ground pin
11 – 14
PC4 – PC7
O
Not used (open)
15 – 18
PB0 – PB3
O
Not used (open)
19
VSS
—
Ground pin
20 – 23
PB4 – PB7
O
Not used (open)
24 – 27
PA0 – PA3
O
Not used (open)
28
VSS
—
Ground pin
29 – 32
PA4 – PA7
O
Not used (open)
33
SP LAT(PWON)
I
Spectrum analyzer latch input
34
BU IN
I
Back-up power detection input
35
VSS
—
Ground pin
36
VSS
—
Ground pin
37
P65
O
Not used (open)
38
BUS ON
I
Bus on control signal
39
VCC
—
Power supply pin
40 – 43
PE0 – PE3
O
Not used (open)
44
VSS
—
Ground pin
45 – 48
PE4 – PE7
O
Not used (open)
49
PD0
O
Not used (open)
50
LINK OFF
O
Bus interface link off control signal
51
PD2
O
Not used (open)
52
ILL-ON
O
Illumination on/off switch signal output
53
VSS
—
Ground pin
54 – 56
PD4 – PD6
O
Not used (open)
57
BOOT
I
Flash write-in mode detection input
58
VCC
—
Power supply pin
59
NC
—
Not used (open)
60
TX/LCD DATA
O
Flash write-in data/LCD driver data output
61
SP SI
O
Not used (open)
62
RX
I
Flash write-in data input
63
L RST
O
Reset signal for SIRCS inveter
64
LCD SCK
O
LCD driver clock output
65
VSS
—
Ground pin
66
LCD CE1
O
LCD driver chip enable output
67
VSS
—
Ground pin
68
VSS
—
Ground pin
69
LCD INH1
O
Not used (open)
70
LCD CE2
O
Not used (open)
71
LCD INH2
O
Not used (open)
72 – 78
P27 – P21
O
Not used (open)
79
P20
O
Flash write-in control signal
80
FWE L
I
Flash write-in enable input
81
RES
I
Reset signal
82
NMI
I
Non maskable interrupt signal
83
STBY
Standby mode signal
84
VCC
—
Power supply pin
22
CDX-CA750/CA750X/CA760X
Pin No.
Pin Name
I/O
Pin Description
85
XTAL
—
Crystal oscillator (18.432 MHz)
86
EXTAL
—
Crystal oscillator (18.432 MHz)
87
VSS
—
Ground pin
88
PF7
O
Not used (open)
89
VCC
—
Power supply pin
90 – 96
PF6 – PF0
O
Not used (open)
97
UNI SO
O
SONY Bus data output
98
UNI SI
I
SONY Bus data input
99
VSS
—
Ground pin
100
VSS
—
Ground pin
101
UNI SCK
I
SONY Bus clock input
102
P53
O
Not used (open)
103
AVCC
—
Power supply pin for A/D converter
104
VREF
—
Reference voltage for A/D converter
105 – 111
P42 – P46
O
Not used (Connecting to ground.)
112
P47(SA DATA)
I
Spectrum analyzer data input
113
AVSS
—
Ground pin
114
VSS
—
Ground pin
115 – 122
P17 – P10
O
Not used (open)
123
MD0
—
Mode select
124
MD1
—
Mode select
125
MD2
—
Mode select
126 – 128
PG0 – PG2
O
Not used (open)
23
23
CDX-CA750/CA750X/CA760X
A
I-V
CONV.
FOCUS
ERROR
DIGITAL
CLV
SUB
CODE
PROCESS
TRACKING
ERROR
LD
DRIVE
Q101
FOCUS
COIL
DRIVE
RF
EQ
EQ
EFM
DEM
D/A
I/F
D/A
CONV.
RFO
RFAC
FE
TE
SE
RFDC
FFDR
FRDR
TFDR
SFDR
SRDR
MDP
TRDR
TE
FE
E
D
B
C
F
11
10
PD
4
LD
3
7
6
8
13
14
16
LD
AMP
LD ON
HOLD SW
AGC CONT
22
21
20
5
RF AMP, LD APC,
ERROR AMP
IC1
DIGITAL SERVO,
DIGITAL SIGNAL PROCESSOR
IC501
TRACKING/FOCUS COIL DRIVE
SLED/SPINDLE/LOADING MOTOR DRIVE
IC7
10
11
22
21
TRACKING
COIL
DRIVE
8
9
25
24
SLED
MOTOR
DRIVE
6
7
31
32
FOCUS
COIL
TRACKING
COIL
M902
SLED
MOTOR
SPINDLE
MOTOR
DRIVE
12
13
18
M901
SPINDLE
MOTOR
LOADING
MOTOR
DRIVE
5
4
1
2
34
35
M903
LOADING
MOTOR
MUTE 1
MUTE 2
42
43
40
41
38
39
35
52
51
50
61
LOUT1
92
SQSO
6
SQCK
7
SCOR
MD2
24
73
XRST 11
DATA 13
DATA 13
XLAT 14
SCLK 17
CLOK 15
SENS 16
SENS 16
GFS 22
FOK 32
FOK 32
LOCK
34
54
SERVO
CTL
X1
10MHz
SW3
(LIMIT)
SW1
(DISC IN)
SW4
(DOWN)
SW2
(SELF)
LM EJ
69
LM LOD
66
SLED –
40
DRIVE OE
70
LD ON
20
HOLD
22
AGC CONT
23
SSTP
11
(KEY BOARD)
OPEN
6
FOK
XIN
XOUT
54
GFS
55
SENS
57
CD CKO
65
SCLK
45
CD XLAT
68
CD DATA
67
CD RST
21
MD2
71
SCOR
64
SCK2
48
SI2
49
LOCK
CD L
LOUT2
95
R-CH
46
IN SW
62
D SW
10
SELF SW
63
CD SYSTEM CONTROL
IC5
SYSTEM CONTROL
IC501 (1/3)
BUS CLK 51
A MUT 19
BUS SI 52
BUS SO
SRST
BUS CLK
BUS SI
BUS ON
UNI SO
LINK OFF
53
TUNER
SECTION
1
4
ATT
MDON
CDON
CDON
TUNER
SECTION
DISPLAY
SECTION
SECTION
2
BUS ON 61
RESET 30
BU IN 60
S101
RESET
HSTX
RESET
1
2
IC502
BU 5V
BU DET
Q602
BATT (L)
CHECK
BATT
86
RESET
90
SIRCS 24
BU IN
77
SYS RST
22
BUS ON
14
UNI SO
18
UNI SI
17
UNI CKO
19
CDMON 17
CDON 18
ATT
5
BATT
10
3
RESET
13
2
BUS ON
CONT
12
9
8
11
1
4
6
BUS INTERFACE
IC601
CLK
DATA
5
4
6
2
1
3
8
7
CN601
BUS
CONTROL IN
Q603
A
C
B
D
E
F
PD
LD
OPTICAL PICK-UP
KSS-720A
• Signal path
:CD
31
32
5
DISPLAY
SECTION
SECTION
IR
RECEIVE
IC981
3-2. BLOCK DIAGRAM — CD SECTION —
(Page 24)
(Page 24)
(Page 25)
(Page 25)
24
24
CDX-CA750/CA750X/CA760X
NOISE
DET
CN201
(ANTENNA)
1
10
2
AM ANT
MPX
CDL
8
AMDET
FM ANT
TUNER UNIT
TUX201
Q205
12
9
16
14
19
20
17
31
50
SYSTEM CONTROL
IC501 (2/3)
14
S METER
MPT
DAVN
SCA
LVIN
SDA
VSM
QUALITY
16 NS MASK
MPX
52
2
MPTH
75
8
10
9
20
DAIN
VOL ATT
SM
SCL
SDA
MP IN
QUAL
AM
MPX1
38 ACOUTL
33 AC INL
43 MDL
12
SDA IIC
70 I2CSIO
9
16
RDS DET
13
SCL IIC
71 I2CCKO
17
SDA EEPROM
10 E2PSIO
18
SCL EEPROM
11 E2PCKO
4
28
AUXL
OUT FL
ELECTRONIC VOLUME
IC301
27
OUT RL
24
OUTSW
21
SA CLK
30
AMP ON
9
AMP ATT
15
BEEP
TEL ATT
ILL IN
ACC IN
73
XIA
BATT
74
XDA
TEST
83
PW ON
92
XO
93
XI
113
108
117
110
109
TUN ON
ATT
CD
SECTION
1
CD
SECTION
4
DISPLAY
SECTION
SECTION
3
Q306
Q308
Q310
SA CLK
SA OUT
PWON
SA OUT
PWON
MUTE
CONTROL
Q303, 304
12
5
3
11
22
4
9
7
POWER AMP
IC351
MUTE
16 BEEP
STBY
CN101
FL+
FL–
RL+
RL–
TEL MUTE
ILL
ACC
TEST
FR+
13
14
7
15
4
10
2
9
1
12
3
11
COM 8.5V
FR–
RR+
RR–
5
AMP REM
6
ANT REM
16
BATT
X501
32.768kHz
X502
3.68MHz
ILL
DET
Q102
POWER
CONT.
Q104(2/2),106
ACC
DET
DET
Q101
POWER
CONT
Q801-803
Q103
R-CH
BATT
BATT
BATT
TU 8V
TU 5V
POWER
CONT
Q201,202
COM8.5V
CN301
CN302
R
L
SUB OUT
–3
–4
R
L
AUDIO OUT
REAR
R-CH
–5
–6
R
L
AUDIO OUT
FRONT
R-CH
–1
–2
R
L
BUS AUDIO IN
R-CH
53
POWER
CONT.
Q104(1/2),105
23
SA OUT
7
12
2
13
5
7
3
1
1
4
3
1
+5V
REG
Q207
10V
RF AMP
Q204
7
2
AEP,UK
CA750/CA750X
CA750/CA750X
CA750/CA750X
SUB WOOFER AMP
IC310
CA760X
CA760X
BUFFER
IC308
BUFFER
IC302
ADSO(L-CH)
IC304
IC202
RDS DECODER
IC201
CA760X
+10V
REG
IC801
1
3
• Signal path
:CD
:FM
:AM/MW/LW
3-3. BLOCK DIAGRAM — TUNER SECTION —
(Page 23)
(Page 23)
(Page 25)
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