Sony CDX-646 / CDX-646X Service Manual ▷ View online
13
CDX-646/646X
RW/ROM
RW/ROM
EQ ON/OFF
VOFST
VOFST
DVC
VC
VC
VC
RW/ROM
VC
DVC
30
29
28
+
–
+
–
DVC
VCC
DVC
27
26
25
24
RW/ROM
EQ
23
22
21
20
19
RFAC
VCA
VCC
+
–
DVC
+
–
+
–
RW/ROM
VC
RW/ROM
DVC
+
–
3
A
B
C
D
B
C
C
A
A
A
B
C
C
D
B
C D
D
+
–
1
2
APC AMP
5
6
7
8
9
4
RFAC
SUMMING
AMP
RW/ROM
APC-OFF
(Hi-Z)
RW/ROM
(H/L)
VOFST
VC
RW/ROM
+
–
10
11
GM
GM
18
17
16
B
D
A
C
13
14
15
12
EQ IN
LD
PD
GND
A
B
C
D
AC SUM
E
F
DVCC
DVC
RFAC
SW
DC OFST
RFDCI
RFDCO
VC
RFC
VFC
BST
RFG
VCC
CEI
CE
TE BAL
TE
FEI
FE
• IC Block Diagrams
– RF Board –
– RF Board –
IC101
CXA2581N-T4
14
CDX-646/646X
INPUT
FWD
REV
VCC2
VLO–
VLO+
VO4+
VO4–
VO3+
VO3–
VO2+
VO2–
VO1+
VO1–
VCC1
VIN1
VIN1–A
VIN1+A
VIN1–B
S-GND
MUTE2
MUTE1
VIN4
VIN4–
VIN4+
VREF-IN
VIN1 (VREF)-SW
VREF-OUT (CH1)
REG-OUT
REG-IN
VIN3+
VIN3–
VIN3
VIN2+
VIN2–
VIN2
VIN1+B
OUTPUT
CONTROL
+
–
+
–
+
–
+
–
+
–
+
–
LEVEL
SHIFT
CH2-4
MUTE
THERMAL SHUT DOWN
CH1
MUTE
VIN1/VREF
SWITCH
5VREG
3
4
5
6
7
8
9
2
1
LEVEL
SHIFT
LEVEL
SHIFT
10
11
14
LEVEL
SHIFT
AMP-A
AMP-B
+
–
–
15
16
17
18
23
19
34
35
36
+
–
–
+
–
+
–
–
+
–
25
24
22
21
20
33
32
31
30
29
28
+
–
27
26
12
13
IC201
LA6576L-TE-L
15
CDX-646/646X
1
2
3
4
5
6
7
8
9
10
14
13
12
11
VCC
BUS ON
LINK OFF
CLK OUT
DATA OUT
DATA IN
BUS RESET
BUS DATA
VREF
BUS CLK
GND
BUS ON IN
BUS ON OUT
RESET
RESET
SWITCH
1
2
2
3
4
5
6
7
8
9
10
VCC
IN2
S-GND
IN1
NC
NC
OUT2
NC
P-GND
OUT1
CONTROL
CIRCUIT
MOTOR
DRIVE
CIRCUIT
BUFFER
BUFFER
2
VOUT
3
GND
1
VIN
4
CONT
CONTROL
– MAIN Board –
IC101
CXD3017Q
IC301
LB1930M-TLM
IC302
BA8272AFV-E2
IC304
NJM2395AF08
IC305
NJM2395AF05
TE
RFDC
CE
IGEN
AVSS0
ADIO
AVDD0
CLTV
FILO
AVSS3
VSS
AVDD3
DOUT
VDD
PCO
FILI
ASYO
ASYI
RFAC
BIAS
SSTP
DFCT
MIRR
MDP
LOCK
FOK
SFDR
VSS
TEST
FRDR
FE
VC
VC
COUT
SE
XTSL
TES1
SRDR
TFDR
FFDR
TRDR
TRDR
2
1
70
71
68
69
66
67
64
65
62
61
63
73
74
72
75
76
77
78
79
80
4
XRST
3
SQCK
SQSO
5
9
8
7
6
56
60
53
54
55
59
57
58
51
52
48
49
50
47
44
45
46
43
41
42
XLAT
CLOK
SENS
SYSM
DATA
XUGF
XPCK
GFS
C2PO
WFCK
10 11 12 13 14 15 16 17 18 19 20
21
22
23
24
25
26
32
33
30
31
36
37
34
35
39
40
38
28
27
29
SPOA
ATSK
SCLK
VDD
SCOR
SPOB
XLON
XTAI
XVDD
EMPH
AVDD1
AOUT1
AIN1
XTAO
XVSS
XVSS
AIN2
AOUT2
AVDD2
RMUT
LOUT2
LOUT1
BCK
LRCK
PCMD
LMUT
AVSS1
AVSS2
CPU
INTERFACE
SERVO AUTO
SEQUENCER
SERIAL IN
INTERFACE
OVER SAMPLING
DIGITAL FILTER
3rd ORDER
NOISE SHAPER
PWM
PWM
EFM
DEMODULATOR
TIMING
LOGIC
DIGITAL
OUT
D/A
INTERFACE
DIGITAL
PLL
ASYMMETRY
CORRECTOR
CLOCK
GENERATOR
MIRR, DFCT,
FOK
DETECTOR
DIGITAL
CLV
SUBCODE
PROCESSOR
SERVO
INTERFACE
SERVO DSP
FOCUS
SERVO
SERVO
TRACKING
SERVO
SLED
SERVO
PWM GENERATOR
FOCUS PWM
GENERATOR
TRACKING
PWM GENERATOR
SLED PWM
GENERATOR
16K
RAM
ERROR
CORRECTOR
INTERNAL BUS
A/D
CONVERTER
OPERATIONAL
AMPLIFIER
ANALOG SWITCH
16
CDX-646/646X
•
MAIN BOARD IC201 MB90473PFV-G-111-BNDE1 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
RAMA5, RAMA6
O
Address signal output to the S-RAM Not used (open)
3
ELVR
O
Motor drive signal (elevator down direction) output to the elevator motor drive (IC301) *1
4
ELVF
O
Motor drive signal (elevator up direction) output to the elevator motor drive (IC301) *1
5
LOADF
O
Motor drive signal (load chucking direction) output to the chucking motor drive (IC201) *2
6
LOADR
O
Motor drive signal (save direction) output to the chucking motor drive (IC201) *2
7, 8
RAMA7, RAMA12
O
Address signal output to the S-RAM Not used (open)
9
VSS
—
Ground terminal
10
RAMA14
O
Address signal output to the S-RAM Not used (open)
11
RAMWE
O
Write enable output to the S-RAM Not used (open)
12 to15
RAMA13, RAMA8,
RAMA9, RAMA11
O
Address signal output to the S-RAM Not used (open)
16
UNI SI
I
Serial data input from the SONY bus interface (IC302)
17
UNI SO
O
Serial data output to the SONY bus interface (IC302)
18
UNI CK
I
Serial data transfer clock signal input from the SONY bus interface (IC302)
19
LEDDAT
O
Not used (open)
20
LEDCLK
O
Not used (open)
21
VCC
—
Power supply terminal (+3.3V)
22
LEDLAT
O
Not used (open)
23
CDON
O
D/A converter and servo section power supply on/off control signal output “H”: power on
24
ELVON
O
Mechanism deck section power supply on/off control signal output “H”: power on
25
RX
I
Input terminal at the flash memory data write mode Not used (open)
26
TX
O
Output terminal at the flash memory data write mode Not used (open)
27
NC
O
Not used (open)
28
EECLK
O
Serial data transfer clock signal output to the EEPROM Not used (open)
29
FL BOOT
I
Flash memory data write control signal input terminal “L” active Not used (fixed at “H”)
30, 31
NC
O
Not used (open)
32
EEDAT
I/O
Two-way data bus with the EEPROM Not used (open)
33
AVCC
—
Power supply terminal (+3.3V) (for A/D converter)
34
AVRH
I
Reference voltage (+3.3V) input terminal (for A/D converter)
35
AVSS
—
Ground terminal (for A/D converter)
36
EHS
I
Elevator height position detection signal input from the RV202 (elevator height sensor)
(A/D input)
(A/D input)
37
MCK
I
Input of detection signal for the fine adjustment (elevator height (address) adjustment; RV201) of
elevator height position (A/D input)
elevator height position (A/D input)
38, 39
KEY0, KEY1
I
Not used (fixed at “H”)
40
VSS
—
Ground terminal
41
FOK
I
Focus OK signal input from the CXD3017Q (IC101) “L”: NG, “H”: OK
42
GFS
I
Guard frame sync signal input from the CXD3017Q (IC101) “L”: NG, “H”: OK
43
SCLK
O
Serial data reading clock signal output to the CXD3017Q (IC101)
44
SENS
I
Internal status signal (sense signal) input from the CXD3017Q (IC101)
45
BUSON
I
Bus on/off control signal input from the SONY bus interface (IC302) “H”: bus on
46
BUCHK
I
Battery detection signal input “L”: battery on
47, 48
MD0, MD1
I
Setting terminal for the CPU operational mode (fixed at “H” in this set)
49
MD2
I
Setting terminal for the CPU operational mode (fixed at “L” in this set)
50
EJECT SW
I
Eject switch (SW801) input terminal “L” active
51
MAGLK SW
I
Magazine detect switch (SW201) input terminal “L”: magazine is set
2-12.
IC PIN FUNCTION DESCRIPTION
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