Sony CDX-4480ESP Service Manual ▷ View online
– 39 –
Note: The components identified by mark
!
or dotted line
with mark
!
are critical for safety.
Replace only with part number specified.
Note:
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
%
: indicates tolerance.
•
¢
: internal component.
•
U
: B+ Line.
• Power voltage is dc 14.4V and fed with regulated dc power
supply from ACC and BATT cords.
• Voltage and waveforms are dc with respect to ground
under no-signal conditions.
no mark : CD PLAY
no mark : CD PLAY
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Signal path.
J
: CD
• Waveforms
(MODE:PLAY)
1
2
3
4
5
6
7
Approx. 620mVp-p
IC1
!§
(FE)
0V
IC1
!¶
(RFO)
1.2Vp-p
Approx. 200mVp-p
IC1
!¢
(TE)
0V
IC501
&ª
(MDP)
2.6Vp-p
7.6
µ
sec
IC501
*¶
(LRCK)
5.8Vp-p
22.7
µ
sec
IC501
(¡
(BCK)
5.7Vp-p
474nsec
16.89MHz
IC501
`⁄‚‹
(XTAI)
3.2Vp-p
– 53 –
• IC Block Diagrams
IC1 CXA1791N-T4
IC6 LB1638MTP-T1
IC2 CXD2522R-T6
+
–
–
+
–
–
APC
PD AMP
APC
LD AMP
VREF
1.25V
1
LD
2
PD
VC
–
+
+
RF
IV AMP1
3
PD1
VC
VC
–
+
+
RF
IV AMP2
4
PD2
VC
VC
–
+
+
RF
SUMMING AMP
VC
–
+
+
FOCUS
ERROR AMP
18 RFI
19 APC ON
20 VCC
VCC
17 RFO
16 FE
15 FE BIAS
–
+
+
F
IV AMP
6
F
VC
VC
–
+
+
TRACKING
ERROR AMP
14 TE
VC
5
GND
–
+
+
E
IV AMP
7
E
VC
13 EI
12 EO
VC
8
VR
VC
10
NC
11 NC
VC
9
–
+
VCC
VC BUFFER
1
2
3
4
5
6
7
8
9
10
GND
IN1
VCC
IN2
GND
N.C.
OUT2
VS
OUT1
N.C.
CONTROL LOGIC
SDTO
XSOE
SCK
SDTI
XLT
XRDE
XWRE
OSCE
A5
A6
A7
SPSL
VSS
35
36
A8
XOE
33
34
37
39
A4
38
40
41
42
43
44
45
46
47
48
32
20
21
22
23
25
26
27
29
30
31
24
XCAS
D4
D3
D0
28 D1
XWE
XRAS
XRAS
A9
VDD
A0
A1
A2
A3
17
18
19 C176
DOUT
LRCK
4
5 6
7 8 9 10 11
13
14
15 16
12
XROI
RFCK
GTOP
1
2 3
WFCK
DIN
C4M
BCKI
VSS
DATI
LRCI
WDCI
XTAO
TEST
XTAI
BCK
DATA
49
50
51
52
52
53
54
55
54
55
56
57
61
62
63
64
58
59
60
60
XEMP
XWIH
AM4
AM3
AM2
AM1
AM0
AM0
VDD
XQOK
GSCR
SCOR
SCOR
NC
NC
NC
NC
GRST
XRST
DRAM
I/F
SELECTOR
TIMING
GEN.
DAC
I/F
DIGITAL
OUT
CPU I/F
ADDRESS MONITOR
VWA
READ
BASE
COUNTER
WRITE
BASE
COUNTER
DATA
LINKING
CONTROL
DSP
I/F
– 54 –
IC4 MB814400C-70PFTN
IC601 BA6195FP-YT2
IC7 BA6797FP-E2
WRITE
CLOCK
CLOCK
GENERATOR
DATA INPUT
BUFFER
DATA OUTPUT
BUFFER
COLUMN
DECODER
SENSE AMP
I/O GATE
4M BIT
MEMORY
CELL
ROW
DECODER
ADDRESS
BUFFER
PRE-
DECODER
REFRESH
ADDRESS
COUNTER
COUNTER
BOARD
BIAS
GENERATOR
MODE
CONTROL
CLOCK
GENERATOR
1
CLOCK
GENERATOR
2
18
24
25
26
17
16
15
14
5
4
1
2
3
9
10
11
12
13
23
22
DQ1
DQ2
WE
RAS
A9
A0
A1
A0
A1
A2
A3
VCC
VSS
DQ4
DQ3
DQ3
CAS
OE
A8
A7
A6
A5
A4
A4
+
–
+
–
+
–
–
1
OPOUT
20
GND
25
OPIN–
24
OPIN+
2
NC
3
NC
4
BIAS
5
DRIN'
6
DRIN
23
NC
22
MUTE
21
NC
DRIVER
MUTE
7
NC
8
NC
9
NC
10
NC
11
NC
12
D
ROUT–
+
–
13
D
ROUT+
LEVEL SHIFT
IN
+
–
THERMAL
SHUT DOWN
19
GND
14
NC
18
NC
16
NC
15
NC
VCC
17
1
2
3
4
5
6
7
8
9 10 11
12
13
14
OUT1-A
OUT1-B
PRE-
OUT1
IN1 (–)
IN1 (+)
REG-B
REG-
OUT
BIAS-
IN
MUTE
IN2 (–)
IN2 (+)
PRE-
OUT2
OUT2-B
OUT2-A
IN4 (–)
PRE-
OUT4
IN4 (+)
VCC
VCC
OUT3-B
GND
IN3(–)
GND
IN3(+)
PRE-
OUT3
OUT4-A
OUT4-B
OUT3-A
15
16
17
18
19
20
21
VCC
VCC
22
23
24
25
26
27
28
LEVEL
LEVEL
IN
IN
+
–
+
–
SHIFT
SHIFT
LEVEL
SHIFT
IN
+
–
LEVEL
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
SHIFT
IN
+
–
– 55 –
IC401 LC75374E
IC701 SM5852FS-E2
IC602 BU2624FV-E2
+
–
–
+
–
–
+
–
–
+
–
+
–
+
–
–
+
–
–
+
–
+
–
+
–
+
–
–
+
–
–
+
–
+
–
DECODER
LATCH
SHIFT
REGISTER
CONTROL
–
+
+
–
–
1
2
3 4
5
6 7 8
9 10
20
19
18
17
16
15
14
13
12
11
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
LSELO
L4
L3
L3
L2
L1
VDD
R1
R2
R3
R4
R4
RSELO
RVRIN
RCOM
RT1
RT2
RT3
RTOUT
RSIN
NC
NC
RSB1
RSB2
RFIN
RFOUT
RROUT
VSS
CL
DI
CE
VREF
LROUT
LFOUT
LFIN
LSB2
LSB1
NC
NC
LSIN
LTOUT
LT3
LT2
LT1
LCOM
LVRIN
PHASE
DET
PRESCALER
MAIN
COUNT
IF COUNT
CTL
20BIT COUNT
SHIFT REGISTER LATCH
REFERENCE
DIVIDER
I/O
CTL
1
2
4
5
6
7
9
10
20
18
17
16
15
14
13
12
11
11
19
XIN
CE
CK
DA
CD
P0
P1
P3
XOUT
VSS
PD
VDD
FMIN
AMIN
P2
IFIN
SD
P4
P4
1
2
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
DIGITAL
SIGNAL
PROCESSOR
OUTPUT
INTERFACE
SYSTEM
CLOCK
INPUT
INTERFACE
SEQUENTIAL
CONTROL
MUTE
CONTROL
MODE
CONTROL
LRCI
BCKI
BCKI
DI
CLK
VSS
RSTN
TESTN
MUTEN
DB/DS
MOD2
MOD2
MOD1
OPT
VDD
LRCO
BCKO
DOUT
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