Sony CDX-424RF Service Manual ▷ View online
– 33 –
IC52
BA6287F
1
2
3
4
OUT1
VM
VCC
FIN
8
7
6
5
GND
OUT2
VREF
RIN
CONTROL LOGIC
TSD
POWER
SAVE
DRIVER
DRIVER
– MAIN Board –
IC101
CXD2530Q
1 2 3 4 5 6
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
43
42
42
41
40
40
39
38
38
37
36
35
34
33
32
31
31
50
49
49
48
47
47
46
45
44
88
89
89
90
91
91
92
93
93
94
95
96
97
98
99
100
81
82
82
83
84
84
85
86
87
71 70 69 68
67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
80 79 78 77 76 75 74 73 72
ASYMMETRY
CORRECTOR
DIGITAL
PLL
CLOCK
GENERATOR
D / A
INTERFACE
DIGITAL CLV
SUB CODE
PROCESSOR
TIMING
LOGIC
CPU
INTERFACE
SERVO
AUTO
SEQUENCER
ERROR
CORRECTOR
16K RAM
DIGITAL OUT
OSC
EFM
DEMODULATOR
TES6
VDD
VSS
EXCK
SBSO
SCOR
WFCK
TES5
EMPH
DOUT
C4M
FSTT
XTSL
MNT0
MNT1
MNT3
XROF
C2PO
RFCK
GFS
XPCK
XUGF
GTOP
VDD
VSS
TES4
BCK
TES3
PCMD
TES9
LRCK
WDCK
ASYE
ASYO
ASYI
ASYI
BIAS
RF
AVDD
CLTV
AVSS
FILI
FILO
PCO
PCO
VCTL
V16M
VCKI
VPCO1
VPCO2
TES1
TES0
LOCK
PWMI
MDP
MDS
VSS
MON
FOK
VDD
SPOD
XLON
SPOB
SPOC
CLKO
SPOA
DATO
XLTO
SEIN
CNIN
XLAT
CLOK
SENS
DATA
SQCK
SQSO
TES2
CKOUT
LMUT
RMUT
VDD
VSS
NC
XRST
VSS
NC
NC
VDD
NC
TES8
XVSS
VSS
XTAI
XTAO
VSS
XVDD
TES7
NC
VDD
NC
NC
VSS
– 34 –
IC204
BA8272F-E2
IC401
TC9464FN-EL
IC301
BA6287F
1
2
3
4
5
6
7
8
9
10
14
13
12
11
VCC
BUS ON
LINK OFF
CLK OUT
DATA OUT
DATA IN
BUS RESET
BUS DATA
VREF
BUS CLK
GND
BUS ON IN
BUS ON OUT
RESET
RESET
SWITCH
1
2
3
4
OUT1
VM
VCC
FIN
8
7
6
5
GND
OUT2
VREF
RIN
CONTROL LOGIC
TSD
POWER
SAVE
DRIVER
DRIVER
DIGITAL FILTER CIRCUIT
ATTENUATOR OPERATIONAL CIRCUIT
DEEMPHASIS FILTER CIRCUIT
D-
∆
MODULATION CIRCUIT
INTERFACE
CIRCUIT
TEST
CIRCUIT
OUTPUT
CIRCUIT
CIRCUIT
ANALOG
FILTER
TIMING
GENERATOR
OSC
MICROCOMPUTER
INTERFACE
CIRCUIT
OUTPUT
CIRCUIT
CIRCUIT
ANALOG
FILTER
1
2
3 4
5
6
7
8
9
10
20
19
18
17
16
15
14 13
12
11
21
22
23
24
LRCK
BCK
DATA
HS
(SM)
ATT
(EMP)
SH
(BS)
LA
VDX
XO
XI
GNDX
MCK
VDD
T1
P/S
VDA
RO
GNDA
VR
GNDA
LO
GNDD
ZD
VDA
– 35 –
7-8.
IC PIN FUNCTION DESCRIPTION
•
MAIN BOARD IC302 CXP84124-080Q (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Function
1
LIM.SW
I
Sled limit in detect switch (SW1) input terminal
“L”: When the optical pick-up is inner position
“L”: When the optical pick-up is inner position
2
BUSON
I
Bus on/off control signal input from the SONY bus interface (IC204) “H”: bus on
3
EJECT
I
Eject switch (SW303) input terminal “H” active
4
LOAD1
I
Save end detect switch (SW12) input terminal
“L”: When completion of the disc chucking operation
“L”: When completion of the disc chucking operation
5
LOAD2
I
Chucking end detect switch (SW11) input terminal
“L”: When completion of the disc chucking operation
“L”: When completion of the disc chucking operation
6
A.MUTE
O
Audio line muting on/off control signal output terminal “H”: muting on
7
EMPH
O
Emphasis mode output to the D/A converter (IC401) “L”: emphasis on
8
CH.R
O
Motor drive signal (save direction) output to the chucking motor drive (IC52)
“H” active *1
“H” active *1
9
CH.F
O
Motor drive signal (load chucking direction) output to the chucking motor drive (IC52)
“H” active *1
“H” active *1
10
—
O
Not used (open)
11
ELV.R
O
Motor drive signal (elevator down direction) output to the elevator motor drive (IC301)
“L” active *2
“L” active *2
12
ELV.ON
O
Mechanism deck section power supply on/off control signal output “H”: power on
13
CD RST
O
System reset signal output to the CXA1992BR (IC11) and CXD2530Q (IC101) “L”: reset
14
CDON
O
D/A converter and servo section power supply on/off control signal output “H”: power on
15 to 23
—
O
Not used (open)
24
AUTO ON/OFF
I
Setting terminal for the automatic adjustment
“L”: automatic adjustment, “H”: manual adjustment (fixed at “L” in this set)
“L”: automatic adjustment, “H”: manual adjustment (fixed at “L” in this set)
25 to 29
—
O
Not used (open)
30
RESET
I
System reset signal input from the reset signal generator (IC202) and SONY bus interface
(IC204) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
(IC204) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
31
EXTAL
I
Main system clock input terminal (8 MHz)
32
XTAL
O
Main system clock output terminal (8 MHz)
33
VSS
—
Ground terminal
34
TX
O
Sub system clock output terminal Not used (open)
35
TEX
I
Sub system clock input terminal Not used (fixed at “L”)
36
AVSS
—
Ground terminal (for A/D converter)
37
AVREF
I
Reference voltage (+5V) input terminal (for A/D converter)
38
ATRIBT
I
Selection input of the custom file, D-BASS, etc.
39
MCK
I
Input of signal for the fine adjustment (linear position sensor adjustment; RV301) of elevator
position (A/D input)
position (A/D input)
40
EHS
I
Elevator height position detect input from the RV302 (elevator height sensor) (A/D input)
41 to 47
—
O
Not used (open)
48
SCK
I
Serial data transfer clock signal input from the SONY bus interface (IC204)
49
SI
I
Serial data input from the SONY bus interface (IC204)
50
SO
O
Serial data output to the SONY bus interface (IC204)
51
SQCLK
O
Subcode Q data reading clock signal output to the CXD2530Q (IC101)
52
SUBQ
I
Subcode Q data input from the CXD2530Q (IC101)
53
—
O
Not used (open)
54
—
I
Not used (fixed at “H”)
55
MGLK
I
Magazine eject operation completion detect switch (SW301) input terminal
“L”: eject completed
“L”: eject completed
– 36 –
Pin No.
Pin Name
I/O
Function
56
SCOR
I
Subcode sync (S0+S1) detection signal input from the CXD2530Q (IC101)
57
SENS2
I
Internal status signal (sense signal) input from the CXA1992BR (IC11)
58
PWM
O
Motor drive signal (elevator up direction) output to the elevator motor drive (IC301)
“L” active *2
“L” active *2
59
—
O
Not used (open)
60
MAG.SW
I
Magazine in/out detect switch (SW302) input terminal “L”: magazine detected
61
BUCHECK
I
Battery detection signal input terminal “H”: battery on
62
W.UP
I
Bus on or eject switch (SW303) input terminal “H”: bus on or eject switch pushing
63
C.OUT
I
Track number count signal input from the CXA1992BR (IC11)
64
EEDATA
I/O
Two-way data bus with the EEPROM Not used (open)
65
EECLK
O
Serial clock signal output to the EEPROM Not used (open)
66
EEINIT
I
Initialize signal input for the EEPROM “H”: format Fixed at “L” in this set
67
—
O
Not used (open)
68
SINGLE
I
Setting terminal for the single disc/multiple discs mode
“L”: single mode, “H”: multiple discs mode (fixed at “H”)
“L”: single mode, “H”: multiple discs mode (fixed at “H”)
69
FOK
I
Focus OK signal input from the CXA1992BR (IC11) “L”: NG, “H”: OK
70
GFS
I
Guard frame sync signal input from the CXD2530Q (IC101) “L”: NG, “H”: OK
71
SENS1
I
Internal status signal (sense signal) input from the CXD2530Q (IC101)
72
VDD
—
Power supply terminal (+5V)
73
NC (VDD)
—
Connected to the power supply (+5V)
74
CDCLK
O
Serial data transfer clock signal output to the CXD2530Q (IC101)
75
CDXLT
O
Serial data latch pulse signal output to the CXD2530Q (IC101)
76
CDDATA
O
Serial data output to the CXD2530Q (IC101)
77 to 80
—
O
Not used (open)
*1 chucking motor (M103) control
STOP
LOAD
CHUCKING
SAVE
BRAKE
CH.F (pin 9)
“L”
“H”
“L”
“H”
CH.R (pin 8)
“L”
“L”
“H”
“H”
Mode
Terminal
*2 elevator motor (M104) control
STOP
ELEVATOR
UP
ELEVATOR
DOWN
BRAKE
PWM (pin %•)
“H”
“L”
“H”
“L”
ELV.R (pin !¡)
“H”
“H”
“L”
“L”
Mode
Terminal
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