Sony ZS-M50 Service Manual ▷ View online
– 85 –
– 86 –
– 88 –
– 87 –
ZS-M50
Ref. No.
Location
r
Semiconductor
Location
D101
E-4
D181
C-9
D183
C-9
IC101
E-13
IC103
B-13
IC121
D-11
IC122
C-5
IC123
D-10
IC124
E-11
IC152
B-11
IC171
E-9
IC181
D-9
IC192
F-7
Q101
C-13
Q102
B-14
Q103
B-13
Q104
B-13
Q162
B-13
Q163
B-14
Q180
C-7
Q181
C-9
Q182
C-9
Note on Printed Wiring Boards:
Note:
• X
: parts extracted from the component side.
•
®
: Through hole.
• b
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
Caution:
Pattern face side:
Parts on the pattern face side seen from the
(Side B)
pattern face are indicated.
Parts face side:
Parts on the parts face side seen from the
(Side A)
parts face are indicated.
Note on Schematic Diagram:
Note:
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
%
: indicates tolerance.
Note: The components identified by mark
!
or dotted
line with mark
!
are critical for safety.
Replace only with part number specified.
•
A
: B+ Line.
• Voltages and waveforms are dc with respect to ground
under no-signal conditions.
no mark : MD STOP
(
no mark : MD STOP
(
) : MD PLAY
<
> : MD REC
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Waveforms are taken with a oscilloscope.
• Circled numbers refer to waveforms.
• Signal path.
• Circled numbers refer to waveforms.
• Signal path.
E
: MD PLAY
q
: MD REC
J
: CD
6-17. SCHEMATIC DIAGRAM – BD SECTION –
r
Refer to page 91 for IC Block Diagram.
VOLT/DIV : 1 V AC
TIME/DIV : 10
TIME/DIV : 10
µ
sec
VOLT/DIV : 1 V AC
TIME/DIV : 2
TIME/DIV : 2
µ
sec
r
Waveforms – BD Section –
1
IC101
1
,
2
I, J
PLAY MODE
VOLT/DIV : 0.2 V AC
TIME/DIV : 0.5
TIME/DIV : 0.5
µ
sec
2
IC101
#•
RF
VOLT/DIV : 0.5 V AC
TIME/DIV : 0.5
TIME/DIV : 0.5
µ
sec
4
IC101
8
,
9
E, F
VOLT/DIV : 20 mV AC
TIME/DIV : 1
TIME/DIV : 1
µ
sec
5
IC121
!¶
OSCO
VOLT/DIV : 0.2 V AC
TIME/DIV : 50 nsec
TIME/DIV : 50 nsec
7
IC121
@§
XBCK
VOLT/DIV : 1 V AC
TIME/DIV : 0.1
TIME/DIV : 0.1
µ
sec
8
IC121
@¶
FS256
VOLT/DIV : 0.5 V AC
TIME/DIV : 50 nsec
TIME/DIV : 50 nsec
3
IC101
4
A
VOLT/DIV : 20 mV AC
TIME/DIV : 1
TIME/DIV : 1
µ
sec
6
IC121
@∞
LRCK
9
IC121
(º
FS4
PLAY MODE
PLAY MODE
PLAY MODE
0.46 Vp-p
1.3 Vp-p
0.1 Vp-p
60 mVp-p
1.0 Vp-p
22.581MHz
3.3 Vp-p
23.05
µ
sec
3.5 Vp-p
0.36
µ
sec
2.2 Vp-p
90 nsec
3.2 Vp-p
5.6
µ
sec
– 91 –
– 92 –
– 89 –
– 90 –
IC702 CXD3009Q
1
2 3
10 11 12 13 14
15 16 17
18
19
20
CPU
INTERFACE
SERVO AUTO
SEQUENCER
VSS1
FOK
VDD1
XLON
SPOB
CLKO
SPOA
DATO
XLTO
SEIN
CNIN
XLAT
CLOCK
SENS
DATA
SQCK
SQSO
LMUT
RMUT
VSS0
60
59 58 57
56 55 54
52
51
50
49
48
47
46 45 44
BCKI
VSS2
VDD2
XPCK
XUGF
XTSL
GFS
DOUT
C4M
C2PO
EMPHI
EMPH
SCOR
WFCK
EXCK
SBSO
VSS3
53
21
39 LRCK
40 LRCKI
41
PCMD
42
PCMDI
43
BCK
MDP
22
23
PWM1
79
XRST
24 TEST1
TEST0
26
25
CLOCK
GENERATOR
DIGITAL
CLV
VCKI
VPCO
28
27
VCTL
V16M
29 PCO
30 FILO
31 FILI
32 AVSS
35 RF
36 BIAS
37 ASYI
38 ASYO
33 CLTV
34 AVDD
80
62
AVSS
61
VDD3
SYSM
VDD0
77
78
AVDD
AVSS
75
76
AIN2
AOUT2
73
74
AVSS
LOUT2
72
XVSS
71
XTAO
70
XTAI
69
XVDD
66
AIN1
65
AOUT1
64
63
AVDD
68
AVSS
67
LOUT1
ASYMMETRY
CORRECTOR
DIGITAL
PLL
3RD-ORDER
NOISE
SHAPER
PWM
OSC
D / A
INTERFACE
D / A
INTERFACE
SERIAL-IN
INTERFACE
ERROR
CORRECTOR
16K RAM
OVER SAMPLING
DIGITAL FILTER
DIGITAL
CUT
EFM
DEMODULATOR
TIMING
LOGIC
PWM
4
5
6
7 8
9
IC703 BA6898FP-E2
LEVEL SHIFT
VCC
DRIVER MUTE
VCC
LEVEL SHIFT
LEVEL SHIFT
LEVEL SHIFT
THERMAL
SHUT DOWN
REG VOLTAGE DOWN,
BIAS VOLTAGE DOWN,
THERMAL SHUT DOWN
MONITOR
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
SP –
SP +
SP IN
RESET
REGB
REGOUT
MUTE
GND
NC
SL IN
SL –
SL +
GND
SPOUT
GND
F –
F +
FIN
NC
VREF
VCC
VCC
NC
TIN
T –
T +
NC
SP I
DRIVE
DRIVE
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
r
IC Block Diagrams – Main Section –
IC701 CXA2542AQ
FEI
FOFCT
FGD
FLB
FE_O
FE_M
SRCH
TGU
TG2
FSET
TA_M
TA_O
SL_P
SL_M
SL_O
ISET
VCC
VCC
CLK
XLT
DATA
XRST
C. OUT
SENS1
SENS2
FOK
CC2
CC1
CB
CP
RF_I
RF_O
RF_H
RFTC
LD
PD
PD1
F
E
VEE
TEO
LPFI
ATSC
TZC
VC
FZC
TM2
VEE
VEE
TM3
TM5
TM4
TM6
VCC
VCC
TM7
ISET
TTL
↓
IIL
IIL
↓
TTL
IIL
↓
TTL
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
SENS SELECTOR
OUTPUT DECODER
INPUT SHIFT REGISTER
ADDRESS DECODER
SENS SELECTOR
OUTPUT DECODER
DFCTO IFB1-6
BAL1-4
TOG1-4
TOG1-4
FS1-4
TG1-2
TM1-7 PS1-4
FOH
FOL
TGH
TGL
BALH
BALL
ATSC
TZC
FZC
FSET
TG2
VEE
VCC
FS1
FS2
FOCUS
PHASE COMPENSATION
PHASE COMPENSATION
DFCT
FS4
TRACKING
PHASE COMPENSATION
PHASE COMPENSATION
TG1
TM1
DFCT
FZC COMP.
VEE
VCC
VCC
TDFCT
TZC COMP.
ATSC
WINDOW
COMP.
WINDOW
COMP.
E-F BALANCE
WINDOW COMP.
WINDOW COMP.
TRK. GAIN
WINDOW
COMP.
WINDOW
COMP.
FO. BIAS
WINDOW
COMP.
WINDOW
COMP.
VEE
TGFL
TOG1
TOG2
TOG3
TOG4
BAL1
BAL2
BAL3
BAL4
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
FE AMP
VEE
E IV AMP
F IV AMP
VCC
APC
VCC
VCC
VEE
VEE
LASER POWER CONTROL
VEE
PD1 IV
AMP
AMP
RF
SUMMING
AMP
SUMMING
AMP
VCC
VEE
VEE
LEVEL S
LEVEL S
VEE
MIRR
VCC
FOK
VCC
INT
LDON
LPCL
LPC
TGFL
MIRR
DFCT2
XDFCT1
CC1
PD2 IV
AMP
AMP
1
2
3
4
5
6
7
8
9
10
11
12
24
38
PD2 37
39
40
41
42
43
44
45
46
47
FEO 48
36
35
34
33
32
31
30
29
28
27
26
25
23
22
21
20
19
18
17
16
15
14
13
VCC
VCC
VEE
VEE
r
IC Block Diagrams – BD Section –
IC101 CXD2523R
–1
–2
+
–
IVR
BB
+
–
IVR
AA
+
–
IVR
CC
+
–
IVR
DD
+
–
IVR
+
–
EE
EE'
EFB
TESW
PTGR
48
MORFO
47
MORFI
46
RFO
45
OPN
44
OPO
43
ADDC
42
COMPP
41
COMPO
40
AGCI
39
RF AGC
38
RF
37
PEAK
36 BOTM
35 ABCD
34 FE
33 AUX
32 ADFG
31 ADAGC
30 ADIN
29 ADFM
28 SE
27 CSLED
26 TE
25 WBLADJ
24
VCC
23
3TADJ
22
EQADJ
21
VREF
20
F0CNT
19
XSTBY
18
XLAT
17
SCLK
16
SWDT
15
TEMPR
14
TEMPI
13
GND
12
APCREF
11
APC
10
PD
9
F
8
E
7
D
6
C
5
B
4
A
3
VC
VI CONV
BGR
VREF
SCRI - PARA
DECODE
+
–
+
–
AUXSW
COMMAND
+
–
IVR
GSW IV
+
–
FF
FBAL
FF'
TG
SEA
–
+
–
+
–1
–2
TG
TEA
WBL
3T
EQ
–
–
+
+
+
+
–
–
+
+
+
+
DET
ADIP
AGC
WBL
BPF22
BPFC
ABCDA
FEA
WBL
ATA
–
+
CVB
+
–
RFA1
–
–
–
–
1
2
–
–
–
–
–
1
2
2
GRVA
CFST
RFA2
GRV
HLPT
PTGR
–2
–1
–1
–2
BOTTOM
PEAK
RF AGC
EQ
EQ
DET
P-P
WBL
3T
WBL
TEMP
PBH
–
+
USROP
+
–
USRC
3T
BPF3T
PEAK3T
1
I
2
J
IC121 CXD2652AR
IC152 BH6511FS
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
VG
IN4R
IN4F
VM4
OUT4F
PGND4
OUT4R
VM34
OUT3R
PGND3
OUT3F
VM3
IN3F
IN3R
PSB
CAPA–
CAPA+
IN2R
IN2F
VM2
OUT2F
PGND2
OUT2R
VM12
OUT1R
PGND1
OUT1F
VM1
IN1F
IN1R
V
DD
CHARGE
PUMP.
OSC
INTERFACE
AMP
INTERFACE
AMP
AMP
INTERFACE
PRE DRIVE
PRE DRIVE
PRE DRIVE
PRE DRIVE
AMP
INTERFACE
AMP
AMP
AMP
V
DD
PSB
AMP
100 99 98 97 96 95
94 93
EFMO
DVSS
TEST3
TEST2
TEST1
FGIN
SPFD
SPRD
92
SFDR
91
SRDR
90
FS4
89
FRDR
88
FFDR
87
DVDD
86
TFDR
85
TRDR
84
LDDR
83
APCREF
82
DTRF
81
CKRF
80
XLRF
79
F0CNT
78
ADFG
77
APC
76
DCHG
75 AUX2
74 TE
73 SE
72 AVSS
71 ADRB
70 ADRT
69 AVDD
68 ADIO
61 CLTV
60 FILO
59 FILI
58 PCO
57 PDO
55 RFI
56 AVSS
54 BIAS
53 AVDD
52 ASYI
51 ASYO
67 VC
66 AUX1
65 FE
64 ABCD
63 BOTM
62 PEAK
50
MVCI
49
D3
48
D2
47
D0
46
D1
45
XWE
44
XRAS
43
A09
42
XCAS
41
XOE
40
DVSS
39
A11
38
A08
37
A07
36
A06
35
A05
34
A04
33
A10
32
A00
31
A01
30
A02
29
A03
28
DVDD
26
XBCK
27
FS256
25
LRCK
24
DADT
23
ADDT
22
DOUT
21
DIN
20
D VSS
19
TESTG
18
XTSL
17
OSCO
16
OSCI
15
TX
14
XINT
13
RECP
12
DQSY
11
SQSY
10
XRST
9
SENS
8
SRDT
7
XLAT
6
SCLK
5
SWDT
4
MNT3
3
MNT2
2
MNT1
1
MNT0
PWM
GENERATOR
AUTO
SEQUENCER
SERVO
DSP
CPU I/F
MONITOR
CONTROL
CONTROL
SPINDLE
SERVO
EACH
BLOCK
BLOCK
EACH
BLOCK
BLOCK
DIGITAL
AUDIO
I/F
SAMPLING
RATE
CONVERTER
CLOCK
GENERATOR
SUBCODE
PROCESSOR
EACH
BLOCK
BLOCK
A/D
CONVERTER
ANALOG
MUX
EFM/ACIRC
ENCODER/
DECODER
APC
PLL
SHOCK RESISTANT
MEMORY CONTROLLER
ATRAC
ENCODER/DECODER
DRAM
ADIP
DEMODULATOR/
DECODER
COMP
ADDRESS/DATA BUS A00 - A11, D0 - D3
INTERFACE
– 93 –
r
IC Block Diagram – Audio Section –
IC312 BH3863F-E2
1
BASS1
2
SIMOUT1
3
SIMIN1
24
TRE1
22
BOUT1
23
BIN1
OUT1
17
16
15
14
CAP
OUT2
BOUT2
BIN2
8
ALCC
4
IN1
BASS
DINAMIC
BASS
FILTER
20
21
SI
19
SCK
18
DBC
5
VCC
6
FIL
TER
7
GND
DIGITAL
CONTROL
TREBLE
VOL
9
IN2
10
SIMIN2
11
SIMOUT2
12
BASS2
BASS
VOL
0dB/6dB
0dB/6dB
13
TRE2
DINAMIC
BASS
FILTER
TREBLE
r
IC Block Diagram – DG Section –
IC603 PCM3003E/T2
MODE CONTROL
INTERFACE
ANALOG
LOW-PASS
FILTER
POWER
SUPPLY
1
2
3
4
5
24
23
22
21
20
19
18
17
16
15
14
13
6
7
8
9
10
11
12
MULTI-LEVEL
DELTA-SIGMA
MODULATOR
D/A
CONVERTER
A/D
CONVERTER
VCC1
VCC2
AGND1
AGND2
VCOM
VOUTR
VOUTL
DEM0
DEM1
20BIT
DIN
VDD
DGND
VCC1
VINR
VERF1
VERF2
VINL
PDAD
PDDA
SYSCK
LRCK
BCK
DOUT
INTERPOLATION
FILTER
OVERFLOWING
ANALOG
LOW-PASS
FILTER
DELTA-SIGMA
MODULATOR
DELTA-SIGMA
MODULATOR
SERIAL
INTERFACE
ANALOG
FRONT-END
CIRCUIT
ANALOG
FRONT-END
CIRCUIT
RESET AND
POWER DOWN
CLOCK
REFERENCE
DECIMATION
&
LOW CUT FILTER
DECIMATION
&
LOW CUT FILTER
MULTI-LEVEL
DELTA-SIGMA
MODULATOR
INTERPOLATION
FILTER
OVERFLOWING
(+) (-)
(+) (-)
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