Sony TA-FA1200ES Service Manual ▷ View online
45
TA-FA1200ES
– DISPLAY Board –
IC1004
NJM2173AV (TE2)
IC1203
CXD9725M-HFL
1
OUT1
2
DC CUT1
3
IN1
4
MIC V+1
5
REG
6
NOISE
7
GND
14 OUT2
13 DC CUT2
12 IN2
11 MIC V+2
10 GV
9 STBY
8 V+
REG
GV
AMP1
AMP2
TRIM VOLUME
0-+24dB/
1dB STEP
TRIM VOLUME
0-+24dB/
1dB STEP
5 to 25 DECODER
&
LATCH CIRCUIT
4 to 13 DECODER
&
LATCH CIRCUIT
4 to 16 DECODER
&
LATCH CIRCUIT
24 BIT
SHIFT REGISTER
CIRCUIT
LEVEL SHIFT
CIRCUIT
5 to 25 DECODER
&
LATCH CIRCUIT
4 to 13 DECODER
&
LATCH CIRCUIT
4 to 16 DECODER
&
LATCH CIRCUIT
2
VSS
3
TRIM
4
TRIM
5
TRIM
6
OUT
7
VRGND
9
VRIN
8
NC
11
CS1
10
NC
14
NC
1
NC
12
GND
13
CLK
26 TRIM
25 TRIM
24 TRIM
23 OUT
22 VRGND
20 VRIN
21 NC
28 NC
18 CS2
19 NC
15 NC
17 LAT
16 DATA
26 VDD
MAIN
VOLUME
0- –95dB/
0.5dB STEP
MAIN
VOLUME
0- –95dB/
0.5dB STEP
46
TA-FA1200ES
•
IC Pin Function Description
MAIN DIF BOARD IC1800 MB89F538L-FA1ES-X101 (SUB SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
I- LIMIT
I
Abnormal current detection signal input from the digital power amplifier
2
MOD2
-
Not used
3
REG-TEMP
I
Thermistor connection terminal for abnormal temperature detection (A/D input)
4 to 9
CUR1 to CUR6
I
Current detection terminal for speaker output section (A/D input) Not used
10
CUR7/D-AMP-
TEMP-AD
I
Abnormal temperature detection terminal for the power amplifier (A/D input) Not used
11
AVCC
-
Power supply terminal (+3.3V) (for analog system)
12
AVR
I
Reference voltage (+3.3V) input terminal
13
AVSS
-
Ground terminal (for analog system)
14
U-MAIN
I
Clock signal input from main system controller
15
AC-OFF
I
AC off detection signal input terminal "L": AC off
16
PWM-MODE
I
PWM mode setting terminal Normally: fixed at "H"
17, 18
DC1, DC2
I
DC offset detection signal input terminal Not used
19
RST
I
System reset signal input from the main system controller "L": reset
20, 21
MOD0, MOD1
I
Setting terminal for memory access mode Normally: fixed at "L"
22
X0
I
System clock input terminal (12.5 MHz)
23
X1
O
System clock output terminal (12.5 MHz)
24
VSS
-
Ground terminal
25
VOL-CLK
O
Serial data transfer clock signal output to the power amplifier power supply control D/A converter
26
VOL-DATA
O
Serial data output to the power amplifier power supply control D/A converter
27
VOL-LAT
O
Serial data latch pulse signal output to the power amplifier power supply control D/A converter
28
DAC-MUTE
O
Muting on/off control signal output to the power amplifier power supply control circuit
29, 30
(P23), (P22)
-
Not used
31
4/8SW
I
IMPEDANCE SELECTOR switch input terminal "L": 4 ohm, "H": 8 ohm
32
SUR (A) RY
O
Relay drive signal (for surround speaker) output terminal Not used
33
SUR (B) RY
O
Relay drive signal (for surround speaker) output terminal Not used
34
4/8OUT
I
Relay drive signal (for selection) output terminal
35
HIC-TEMP
I
Over temperature detection signal input from the digital power amplifier
36
EN
O
Enable/Disable control signal output to the digital power amplifier
37
DC3
I
DC offset detection signal input terminal Not used
38
INIT
O
System reset signal output to the stream processor
39
DC4
I
DC offset detection signal input terminal Not used
40
(P10)
-
Not used
41
SOFT-MUTE
O
Muting on/off control signal output to the stream processor
42
U-SUB1
I
Serial data input from main system controller
43
LAT4
O
Serial data latch pulse signal (for surround back) output terminal Not used
44
LAT3
O
Serial data latch pulse signal (for surround) output terminal Not used
45
LAT2
O
Serial data latch pulse signal (for center) output terminal Not used
46
LAT1
O
Serial data latch pulse signal (for front) output to the stream processor
47
FRONT (A) RY
O
Relay drive signal (for front speaker A) output terminal
48
FRONT (B) RY
O
Relay drive signal (for front speaker B) output terminal
49
NC
-
Not used
50
DC5
I
DC offset detection signal input terminal Not used
51
SHIFT
O
Serial data transfer clock signal output to the stream processor
52
SCDT
O
Serial data output to the stream processor
53
DC6
I
DC offset detection signal input terminal Not used
47
TA-FA1200ES
Pin No.
Pin Name
I/O
Description
54
DC7
I
DC offset detection signal input terminal Not used
55
SUR-BACK-RY
O
Relay drive signal (for surround back speaker) output terminal Not used
56
VCC
-
Power supply terminal (+3.3V)
57
SOFT-MUT (SB)
O
Muting on/off control signal (for surround back) output terminal Not used
58
MUTE
I
Muting on/off control signal input from the system controller
59
U-USB2
O
Serial data output to main system controller
60
INT21/SCK2
-
Not used
61
INT22/SO2/SDA
-
Not used
62
INT23/SI2/SCL
-
Not used
63
ALL-CH-DC-
PROTECT
I
DC offset detection signal input terminal Not used
64
CENTER SP-RY
O
Relay drive signal (center) output terminal Not used
48
TA-FA1200ES
MAIN DIF BOARD IC2054 MB91F355APMT-FA1ES-X101 (MAIN SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
BASS JOG1,
BASS JOG2
I
Jog dial pulse input from the rotary encoder (for BASS)
3. 4
TREB JOG1,
TREB JOG2
I
Jog dial pulse input from the rotary encoder (for TREBLE)
5
SVOL LAT (A90)
O
Serial data latch pulse signal output terminal Not used
6
TUNER LAT
O
Serial data latch pulse signal output terminal Not used
7
TUNER DO
I
Serial data input terminal Not used
8
TUNED
I
Tuned detection signal input terminal Not used
9
STEREO
I
FM stereo detection signal input terminal Not used
10
RDS DATA
I
RDS serial data input terminal Not used
11
DATA0
I
Audio serial data input from the digital audio interface
12
DSP RESET
O
System reset signal output to the DSP "L": reset
13
DSP SPIDS (LAT)
O
Serial data latch pulse output to the DSP
14
DSP SPICLK
O
Not used
15
DSP MISO
I
Serial data input terminal Not used
16
DSP MOSI
O
Serial data output terminal Not used
17
VSS
-
Ground terminal
18
VCC
-
Power supply terminal (+3.3V)
19, 20
DSP BCFG0,
DSP BCFG1
-
Not used
21
SF CPU CE
O
Chip enable signal output for the serial flash
22
SF DSP MAS
I
Master/slave selection signal input from the DSP "H": DSP is master
23
96/24
-
Not used
24
T/A XCS
O
Chip select signal output terminal Not used
25
T/A SO
I
Serial data input terminal Not used
26
T/A XRST
O
System reset signal output terminal Not used
27
MAIN DO
O
Serial data output to the sub system controller
28
MAIN CLK
O
Serial data transfer clock signal output to the sub system controller
29
SUB-U RESET
O
System reset signal output to the sub system controller
30
DIR XMODE
O
System reset signal output to the digital audio interface "L": reset
31
DIR CE
O
Chip enable signal output to the digital audio interface
32
DIR DO
I
Serial data input from the digital audio interface
33
DIR ERROR
I
PLL lock error signal and data error flag input from the digital audio interface
34
DIR CKST
I
Clock select signal input from the digital audio interface
35
VSS
-
Ground terminal
36
VCC
-
Power supply terminal (+3.3V)
37
AD/DA RESET
O
System reset signal output to the A/D converter and D/A converter "L": reset
38
DAC LAT
O
Serial data latch pulse signal output terminal Not used
39
DAC DO
I
Serial data input terminal Not used
40
AD (SB) RESET
O
System reset signal output terminal Not used "L": reset
41
ADMIX LAT (A90)
O
Serial data latch pulse signal output terminal Not used
42
PDMIX LAT (A90)
O
Serial data latch pulse signal output terminal Not used
43
RF ERR (A90)
I
Error signal input terminal Not used
44
MUTE
O
System muting on/off control signal output terminal
45
DAVS
-
Ground terminal
46
DAVC
-
Power supply terminal (+3.3V)
Click on the first or last page to see other TA-FA1200ES service manuals if exist.