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– 5 –

 Follow the disassembly procedure in the numerical order given.

1

three screws

(BV3 

×

 10)

3

Open the under case.

A

4

Remove the case to 
direction of the arrow 

A

.

2

two screws

(case 

3 TP2)

2

two screws
(case 3 TP2)

3

three screws
(BV3 

×

 10)

4

claw

4

claw

5

front panel

2

connector
(CN109)

1

two flat type wires
(CN110, 401)

– 6 –

3

twelve screws
(BV3 

×

 10)

4

Remove the back panel 
to direction of the arrow 

A

.

A

2

connector
(CN902)

1

flat type wire

4

two screws
(BV3 

×

 8)

4

three screws
(BV3 

×

 8)

1

four screws
(BVTT3 

×

 6)

3

power transformer

2

connector
(CN802)

5

MAIN board

– 7 –

•

µ

Pin No.

Pin Name

I/O

Function

1 to 6

NC

O

Not used (open)

7

STANBY LED

O

LED drive signal output of the power on/standby indicator (D602)
“L”: power on, “H”: standby

8

TIMER LED

O

LED drive signal output of the TIMER indicator (D601)    “L”: LED on

9

VDD

—

Power supply terminal (+5V)

10

SPEC1

I

Initial setting input terminal    Fixed at “L” in this set

11

SPEC2

I

Initial setting input terminal    Fixed at “H” in this set

12

SPEC3

I

Initial setting input terminal    Fixed at “L” in this set

13

SPEC4

I

Initial setting input terminal    Fixed at “H” in this set

14

EWS OUT

O

Standby ok signal output to the EWS circuit    Not used (open)

15

EWS-IN

I

Monitor signal input from the EWS circuit    Not used (fixed at “H”)

16

EWS-STNBY

I

Standby display control signal input from the EWS circuit    Not used (fixed at “H”)

17

EWS-WARNING

I

Warning display control signal input from the EWS circuit    Not used (fixed at “H”)

18

EWS-TEST

I

Test display control signal input from the EWS circuit    Not used (fixed at “H”)

19

IF-NG

O

Not used (open)

20

AM-MONO

O

Not used (open)

21

NC

O

Not used (open)

22

TEST

I

Test input terminal (fixed at “L”)

23

ENC-VOLA

I

Jog dial pulse input from the rotary encoder (S616  Master Volume) (A phase input)

24

ENC-VOLB

I

Jog dial pulse input from the rotary encoder (S616  Master Volume) (B phase input)

25

ENC-JOG1A

(TUNER)

I

Jog dial pulse input from the rotary encoder (S615  TUNING – 

C c +)

(A phase input)

26

ENC-JOG1B

(TUNER)

I

Jog dial pulse input from the rotary encoder (S615  TUNING – 

C c +)

(B phase input)

27

ENC-JOG2A

(EDIT)

I

Jog dial pulse input from the rotary encoder (S639  SELECTOR – 

C c +)

(A phase input)

28

ENC-JOG2B

(EDIT)

I

Jog dial pulse input from the rotary encoder (S639  SELECTOR – 

C c +)

(B phase input)

29

ST-MUTE

O

Muting control signal output to the FM/AM tuner unit    “L”: muting on

30

STEREO

I

Stereo detection signal input from the FM/AM tuner unit    “L”: stereo

31

TUNED

I

Tuned display detection signal input from the FM/AM tuner unit    “L”: tuned

32

ST-CE

O

PLL chip enable signal output to the FM/AM tuner unit

33

ST-DOUT

O

PLL serial data output to the FM/AM tuner unit

34

ST-DIN

I

PLL serial data input from the FM/AM tuner unit

35

ST-CLK

O

PLL serial data transfer clock signal output to the FM/AM tuner unit

36

NC

O

Not used (open)

37

VDD

—

Power supply terminal (+5V)

38

X2

O

Main system clock output terminal (12.5 MHz)

39

X1

I

Main system clock input terminal (12.5 MHz)

40

VSS

—

Ground terminal

41

XT2

O

Sub system clock output terminal (32.768 kHz)

42

XT1

I

Sub system clock input terminal (32.768 kHz)

43

RESET

I

System reset signal input terminal (Power down detect signal used as a reset signal)
 “L”: reset or power down
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”

44

RDS-CLK

I

Not used (fixed at “L”)

45

RDS-DATA

I

Not used (fixed at “L”)

– 8 –

Pin No.

Pin Name

I/O

Function

46

AC CUT

I

Power down detection signal input terminal    “L”: power down, normally: “H”

47

SIRCS

I

Sircs remote control signal input from the remote control receiver (IC602)

48

PC POWER REQ

I

Communication request signal input from the equipment connected to control 1 connector 
(CN104)    “L”: communication request

49

YBUSCLKO

O

Y bus data transfer clock signal output terminal    Not used (open)

50

YBUSBUSY

I

Busy signal input when the Y bus data in/out    Not used (open)

51

AVDD

—

Power supply terminal (+5V) (for A/D converter analog system)

52

AVREF0

I

Reference voltage (+5V) input terminal (for A/D converter)

53

KEY1

I

Key input terminal (A/D input)
S614, S617 to S621, S625 to S634 (DISPLAY, I/

u, DVD/VIDEO, CS/BS, TAPE, MD, 

CD1/2/3/4/5, DBFB, GROOVE, PRESET EQ, START, CLEAR) keys input

54

KEY2

I

Key input terminal (A/D input)    S622 to S624 (CD, TUNER, MD WALKMAN) keys input

55

KEY3

I

Key input terminal (A/D input)
S635 to S638, S641 to S647 (DISPLAY, SELECT SYNC, SEAMLESS, HIT PARADE, REC IT, 
MD1/2/3/4/5, ENTER) keys input

56

SPEANA1

I

Spectrum analyzer frequency input from the BA3833F (IC501) (125 Hz)

57

SPEANA2

I

Spectrum analyzer frequency input from the BA3833F (IC501) (500 Hz)

58

SPEANA3

I

Spectrum analyzer frequency input from the BA3833F (IC501) (2 kHz)

59

SPEANA4

I

Spectrum analyzer frequency input from the BA3833F (IC501) (8 kHz)

60

REC LEVEL

I

Not used (fixed at “L”)

61

AVSS

—

Ground terminal (for A/D converter analog system)

62

FL-CS1 

(TUNER)

O

Chip select signal output to the FL driver IC (IC601)    “L” active

63

FL-CS2 (EDIT)

O

Chip select signal output to the FL driver IC (IC604)    “L” active

64

AVREF1

I

Reference voltage (+5V) input terminal (for D/A converter)

65

NC

I

Not used (fixed at “L”)

66

FL-DATA

O

Serial data output to the FL driver IC (IC601, 604)

67

FL-CLK

O

Serial data transfer clock signal output to the FL driver IC (IC601, 604)

68

NC

I

Not used (fixed at “L”)

69

AMP-DATA

O

Serial data output to the M62442FP (IC101)

70

AMP-CLK

O

Serial data transfer clock signal output to the M62442FP (IC101)

71

SUBCLKOUT

O

Sub clock signal output terminal    Not used (open)

72

I2C-BUSY

I

Busy signal input terminal for the I2C bus    “L” active

73

I2C-DATA

I/O

Data input/output terminal for the I2C bus

74

NC

O

Not used (open)

75

I2C-CLK

I/O

Shift clock signal input/output terminal for the I2C bus

76

FL-CLEAR

O

Reset signal output to the FL driver IC (IC601, 604)    “L”: reset

77

AMP-CE

O

Chip enable signal output to the M62442FP (IC101)

78

SPEANA-SW

O

Not used (open)

79

LED-DATA

O

Serial data output to the LED driver IC (IC603, 605)

80

LED-CLK

O

Serial data transfer clock signal output to the LED driver IC (IC603, 605)

81

KED-CS1

O

Chip select signal output to the LED driver IC (IC603)    “L” active

82

LED-CS2

O

Chip select signal output to the LED driver IC (IC605)    “L” active

83

LED-CLEAR

O

Reset signal output to the LED driver IC (IC603, 605)    “L”: reset

84 to 87

YBUS1 to YBUS4

I/O

Y bus data input/output terminal    Not used (open)

88

SOFT-CHK

O

Software check terminal    Not used (open)

89

MODEL1

I

Destination setting terminal    Fixed at “H” in this set

90

MODEL2

I

Destination setting terminal    Fixed at “H” in this set