Sony STR-DN850 Service Manual ▷ View online
STR-DN850
69
Pin No.
Pin Name
I/O
Description
54
VCC
-
Power supply pin (+3.3V)
55
NO_USE
O
Not used
56
NO_USE
O
Not used
57
INITX
I
Video Micom reset port
58
NW_SPI_DIN
I
NETWORK SPI Data In
59
NW_SPI_DOUT
O
NETWORK SPI Data Out
60
NW_SPI_CLK
O
NETWORK SPI Clock
61
NO_USE
O
Not used
62
NO_USE
O
Not used
63
NO_USE
O
Not used
64
NO_USE
O
Not used
65
NO_USE
O
Not used
66
NW_SPI_REQ
I
NETWORK SPI Request
67
NO_USE
O
Not used
68
NW_SPI_READY
I
NETWORK SPI Ready
69
NO_USE
O
Not used
70
NO_USE
O
Not used
71
NO_USE
O
Not used
72
NO_USE
O
Not used
73
USB_PCONT
O
USB regulator control signal output terminal
74
USB_OVC
I
USB over current signal input terminal
75
NO_USE
O
Not used
76
NO_USE
O
Not used
77
NO_USE
O
Not used
78
1.8V_PCONT
O
HDMI ADV 18V CONT
79
NO_USE
O
Not used
80
NO_USE
O
Not used
81
NFC_SPI_CLK
O
NFC SPI Clock from Host CPU
82
NFC_RFDET
I
NFC RF Detect Signal
83
NO_USE
O
Not used
84
MD1
-
UCOM Mode setting terminal
85
MD0
-
UCOM Mode setting terminal
86
X0
-
Clock signal output (4MHz)
87
X1
-
Clock signal output (4MHz)
88
VSS
-
Ground terminal
89
VCC
-
Power supply pin (+3.3V)
90
UPDATE_LED
O
USB Update: USB Update LED Control / NW Update LED Control
91
NO_USE
O
Not used
92
NO_USE
O
Not used
93
NON_LPCM
O
HDMI: Non LPCM Stream Info Line Notifi cation
94
NO_USE
O
Not used
95
NO_USE
O
Not used
96
NO_USE
O
Not used
97
MU_RST
I/O
USB Update: USB Update Main Micom Reset
98
MU_MD0
I/O
USB Update: USB Update Main Micom MD0 Select
99
BT_PCONT
O
Bluetooth: Power control for BT device
100
BT_VURX_BTTX
I
Bluetooth: UART Rx on Video uCOM from BT device
101
BT_VUTX_BTRX
O
Bluetooth: UART Tx on Video uCOM to BT device
102
NO_USE
O
Not used
103
VUCTSIN_BTRTS
I
Bluetooth: CTS on Video uCOM
104
VURTSOUT_BTCTS
O
Bluetooth: RTS on Video uCOM
105
BT_RST
O
Bluetooth: RESET for BT device
106
AVCC
-
Analog power supply pin for A/D converter
107
AVRH
-
Standard power supply pin for A/D converter
108
AVSS
-
Ground terminal
STR-DN850
70
Pin No.
Pin Name
I/O
Description
109
VSS
-
Ground terminal
110
VURX
I
Communication data with MAIN Micom: Receive data
111
VUTX_VU_SDA
O
Communication data with MAIN Micom: Transmit data
112
NO_USE
O
Not used
113
NO_USE
O
Not used
114
UPDATE_VURX
I
Update to MAIN Micom data input (program main micom data pin)
115
UPDATE_VUTX
O
Update to MAIN Micom data output (program main micom data pin)
116
NO_USE
O
Not used
117
NO_USE
O
Not used
118
NO_USE
O
Not used
119
HDMI_MUTE
O
HDMI: Audio Mute Request
120
NO_USE
O
Not used
121
APPLE_IIC_SCK
O
APPLE IIC Clock
122
APPLE_IIC_SDA
I/O
APPLE IIC Data
123
NO_USE
O
Not used
124
PROG_VU_SCK
I
Programming Clock (video micom)
125
PROG_VUTX
I
Programming UART TX (video micom)
126
PROG_VURX
I
Programming UART RX (video micom)
127
V_SEL_SW2
O
Composite video output signal switch
128
APPLE_RST
O
APPLE IC Reset
129
VCC
-
Power supply pin (+3.3V)
130
NO_USE
O
Not used
131
V_MUTE
I/O
Video muting control signal output to the video amplifi er
132
VSS
-
Ground terminal
133
VCC
-
Power supply pin (+3.3V)
134
TRSTX (NC)
O
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low) after
power-up or held low for proper operation of the processor.
power-up or held low for proper operation of the processor.
135
TCK
O
Test Clock (JTAG). Provides a clock for JTAG boundary scan. TCK must be asserted (pulsed
low) after power-up or held low for proper operation of the device. (for designer evaluation
only)
low) after power-up or held low for proper operation of the device. (for designer evaluation
only)
136
TDI
O
Test Data Input (JTAG). Provides serial data for the boundary scan logic (for designer
evaluation only)
evaluation only)
137
TMS
O
Test Mode Select (JTAG). Used to control the test state machine (for designer evaluation
only)
only)
138
TDO
O
Test Data Output (JTAG). Serial scan output of the boundary scan path (for designer evaluation
only)
only)
139
NO_USE
O
Not used
140
TEST7
O
Test Pad 7 (for designer evaluation only)
141
TEST6
O
Test Pad 6 (for designer evaluation only)
142
TEST5
O
Test Pad 5 (for designer evaluation only)
143
TEST4
O
Test Pad 4 (for designer evaluation only)
144
TEST3
O
Test Pad 3 (for designer evaluation only)
145
TEST2
O
Test Pad 2 (for designer evaluation only)
146
TEST1
O
Test Pad 1 (for designer evaluation only)
147
UART_SEL
O
UART selector (Select video or network for back panel programming)
148
NO_USE
O
Not used
149
NO_USE
O
Not used
150
NO_USE
O
Not used
151
NO_USE
O
Not used
152
NO_USE
O
Not used
153
NO_USE
O
Not used
154
NO_USE
O
Not used
155
NO_USE
O
Not used
156
VCC
-
Power supply pin (+3.3V)
157
VSS
-
Ground terminal
158
NO_USE
O
Not used
159
NO_USE
O
Not used
STR-DN850
71
Pin No.
Pin Name
I/O
Description
160
NO_USE
O
Not used
161
MHL1_PCONT
O
MHL1 Power Control
162
NO_USE
O
Not used (only 1 MHL)
163
NO_USE
O
Not used (only 1 MHL)
164
SPARTA_INT
I
HDMI device interrupt port
165
SPARTA_RST
O
HDMI device reset control port
166
MHL1_OVC
I
MHL1 Over Current detection
167
HDMI_SCK
O
Sparta/HDMI: Communication Line - I2C SCK
168
HDMI_SDA
I/O
HDMI: Communication Line - I2C SDA for HDMI-Rx, HDMI-Tx, EDID device
169
P60
O
UCOM Mode setting terminal
170
NO_USE
O
Not used (no VIDEO A/D)
171
NO_USE
O
Not used (no VIDEO A/D)
172
NO_USE
O
Not used (no VIDEO A/D)
173
VCC
-
Power supply pin (+3.3V)
174
NO_USE
O
Not used (no VIDEO A/D)
175
NO_USE
O
Not used (no VIDEO A/D)
176
VSS
-
Ground terminal
STR-DN850
72
DIGITAL BOARD (5/9) IC3202 ADV8003KBCZ-8B (D/A DIGITAL SIGNAL PROCESSORS AND CONTROLLERS)
Pin No.
Pin Name
I/O
Description
A1
OSD_IN[23]/
EXT_DIN[7]
I
OSD video data or video data input terminal Not used
A2
OSD_DE
I
Data enable signal input terminal Not used
A3
OSD_CLK/EXT_CLK
I
Video clock signal input terminal Not used
A4 to A6
AUD_IN[1], AUD_IN[2],
AUD_IN[5],
I
DSD audio data input from the HDMI transceiver
A7
ARC2_OUT
O
Audio return signal output terminal Not used
A8
MOSI1
I
Serial data input from the video system controller
A9
SCK2
I
Serial data transfer clock signal input terminal
A10
/CS2
I
Chip select signal input terminal
A11
/RESET
I
Reset signal input from the video system controller “L”: reset
A12
XTALN
I
System clock input terminal Not used
A13
PVDD2
-
Power supply terminal (+1.8V)
A14, A15
NC
-
Not used
A16
CVDD1
-
Power supply terminal (+1.8V)
A17
RX_CN
I
TMDS clock (negative) signal input from the HDMI transceiver
A18 to A20
RX_0N to RX_2N
I
TMDS data (negative) input from the HDMI transceiver
A21
CVDD1
-
Power supply terminal (+1.8V)
A22
RSET1
-
External resistor connection terminal
A23
VREF
O
Reference voltage output terminal
B1
OSD_IN[21]/
EXT_DIN[5]
I
OSD video data or video data input terminal Not used
B2
OSD_IN[22]/
EXT_DIN[6]
I
OSD video data or video data input terminal Not used
B3
OSD_VS
I
Vertical sync signal input terminal Not used
B4, B5
AUD_IN[0], AUD_IN[3]
I
DSD audio data input from the HDMI transceiver
B6
SFL
I
Subcarrier frequency lock signal input from the video A/D converter
B7
ARC1_OUT
O
Audio return signal output terminal Not used
B8
MISO1
O
Serial data output to the video system controller
B9
MOSI2
I
Serial data input terminal
B10
MISO2
O
Serial data output terminal
B11
ALSB
I
LSB setting signal input terminal Not used
B12
XTALP
I
System clock (27 MHz) input terminal
B13
PVDD1
-
Power supply terminal (+1.8V)
B14, B15
NC
-
Not used
B16
GND
-
Ground terminal
B17
RX_CP
I
TMDS clock (positive) signal input from the HDMI transceiver
B18 to B20
RX_0P to RX_2P
I
TMDS data (positive) input from the HDMI transceiver
B21
GND
-
Ground terminal
B22
COMP1
-
External capacitor connection terminal
B23
DAC4
O
Component video signal output to the video input selector
C1
OSD_IN[19]/
EXT_DIN[3]
I
OSD video data or video data input terminal Not used
C2
OSD_IN[20]/
EXT_DIN[4]
I
OSD video data or video data input terminal Not used
C3
GND
-
Ground terminal
C4
AUD_IN[4]
I
DSD audio data input from the HDMI transceiver
C5
DSD_CLK
I
DSD audio clock signal input from the HDMI transceiver
C6
SCLK
I
Bit clock signal input from the HDMI transceiver
C7
SCL
I
I2C serial data transfer clock signal input from the video system controller
C8
SCK1
I
Serial data transfer clock signal input from the video system controller
C9
GND
-
Ground terminal
C10
INT0
O
Interrupt signal output terminal
C11
PDN
I
Power down signal input from the video system controller “L”: power down
C12, C13
GND
-
Ground terminal
C14, C15
NC
-
Not used
Click on the first or last page to see other STR-DN850 service manuals if exist.