Sony STR-DN1010 Service Manual ▷ View online
STR-DN1010
69
Pin No.
Pin Name
I/O
Description
103
INPUTCR[0]
I
Cr video input data, not used
104
INPUTCR[1]
I
Cr video input data, not used
105
INPUTCR[2]
I
Cr video input data, not used
106
INPUTCR[3]
I
Cr video input data, not used
107
INPUTCR[4]
I
Cr video input data, CR[0]
108
INPUTCR[5]
I
Cr video input data, CR[1]
109
INPUTCR[6]
I
Cr video input data, CR[2]
110
INPUTCR[7]
I
Cr video input data, CR[3]
111
INPUTCR[8]
I
Cr video input data, CR[4]
112
INPUTCR[9]
I
Cr video input data, CR[5]
113
INPUTCR[10]
I
Cr video input data, CR[6]
114
INPUTCR[11]
I
Cr video input data, CR[7]
115
IRQ_N
O
Reserved. Leave as no-connect
116
TRSTN
I
JTAG - Reset
Pull-down to ground if not used
Pull-down to ground if not used
117
TCK
I
JTAG - Clock
Pull-up to 3.3V if not used
Pull-up to 3.3V if not used
118
TDO
O
JTAG - Data Out
119
TDI
I
JTAG - Data In
Pull-up to 3.3V if not used
Pull-up to 3.3V if not used
120
TMS
I
JTAG - Mode Select
Pull-up to 3.3V if not used
Pull-up to 3.3V if not used
121
IO_VDD
-
I/O Power supply (+3.3V)
122
RED[4]
O
Output red video data, CR[0]
123
Core_VDD
-
Core power supply (+1.8V)
124
Core_vss
-
Core ground
125
RED[5]
O
Output red video data, not used
126
RED[6]
O
Output red video data, not used
127
RED[7]
O
Output red video data, not used
128
RED[8]
O
Output red video data, not used
STR-DN1010
70
DIGITAL VIDEO BOARD (2/5) IC3501 SII9134CTU (HDMI TRANSMITTER)
Pin No.
Pin Name
I/O
Description
1
DE
I
Data enable signal input from the video controller and HDMI receiver
2
HSYNC
I
Horizontal sync signal input from the video controller and HDMI receiver
3
VSYNC
I
Vertical sync signal input from the video controller and HDMI receiver
4
SPDIF
I
S/PDIF signal input from the HDMI receiver
5
MCLK
I
Master clock signal input from the HDMI receiver
6 to 9
SD3 to SD0
I
PCM audio signal input from the HDMI receiver
10
WS
I
L/R sampling clock signal input from the HDMI receiver
11
SCK
I
Bit clock signal input from the HDMI receiver
12
CVCC18
-
Power supply terminal (+1.8V)
13
GND
-
Ground terminal
14
IOVCC33
-
Power supply terminal (+3.3V)
15
DCLK
I
Not used
16
DR0
I
Not used
17
DL0
I
Not used
18
DR1
I
Not used
19
DL1
I
Not used
20
DR2
I
Not used
21
DL2
I
Not used
22
DR3
I
Not used
23
DL3
I
Not used
24
INT
O
Interrupt signal output to the HDMI controller
25
RESET#
I
Reset signal input from the HDMI controller “L”: reset
26
AGND
-
Ground terminal
27
EXT_SWG
-
Not used
28
PVCC1
-
Power supply terminal (+1.8V)
29
AGND
-
Ground terminal
30
TXC-
O
TMDS clock (negative) output to the HDMI OUT connector
31
TXC+
O
TMDS clock (positive) output to the HDMI OUT connector
32
AVCC18
-
Power supply terminal (+1.8V)
33
TX0-
O
TMDS data (negative) output to the HDMI OUT connector
34
TX0+
O
TMDS data (positive) output to the HDMI OUT connector
35
AGND
-
Ground terminal
36
TX1-
O
TMDS data (negative) output to the HDMI OUT connector
37
TX1+
O
TMDS data (positive) output to the HDMI OUT connector
38
AVCC18
-
Power supply terminal (+1.8V)
39
TX2-
O
TMDS data (negative) output to the HDMI OUT connector
40
TX2+
O
TMDS data (positive) output to the HDMI OUT connector
41
AGND
-
Ground terminal
42
PVCC2
-
Power supply terminal (+1.8V)
43
AGND
-
Ground terminal
44
AVCC33
-
Power supply terminal (+3.3V)
45
DCCPWR5V
I
Power supply voltage (+5V) input terminal
46
DSCL
O
I2C clock signal output to the HDMI OUT connector
47
DSDA
I/O
I2C data bus with the HDMI OUT connector
48
CSCL
I
I2C clock signal input from the HDMI controller
49
CSDA
I/O
I2C data bus with the HDMI controller, EEPROM, and HDMI receiver
50
CI2CA
-
Not used
51
HPD
I
Hot plug detection signal input from the HDMI OUT connector
52
TMODE
-
Not used
53
IOVCC33
-
Power supply terminal (+3.3V)
54
GND
-
Ground terminal
55
VPP18
-
Power supply terminal (+1.8V)
56 to 63
D35 to D28
I
Serial data input from the video controller and HDMI receiver
64
CVCC18
-
Power supply terminal (+1.8V)
65
GND
-
Ground terminal
STR-DN1010
71
Pin No.
Pin Name
I/O
Description
66
IOVCC33
-
Power supply terminal (+3.3V)
67 to 70
D27 to D24
I
Serial data input from the HDMI receiver
71 to 75
D23 to D19
I
Serial data input from the video controller and HDMI receiver
76
CVCC18
-
Power supply terminal (+1.8V)
77 to 79
D18 to D16
I
Serial data input from the video controller and HDMI receiver
80 to 83
D15 to D12
I
Serial data input from the HDMI receiver
84 to 86
D11 to D9
I
Serial data input from the video controller and HDMI receiver
87
GND
-
Ground terminal
88
IDCK
I
Output data clock signal input from the HDMI receiver
89
IOVCC33
-
Power supply terminal (+3.3V)
90 to 94
D8 to D4
I
Serial data input from the video controller and HDMI receiver
95 to 98
D3 to D0
I
Serial data input from the HDMI receiver
99
CVCC18
-
Power supply terminal (+1.8V)
100
GND
-
Ground terminal
STR-DN1010
72
DSP BOARD IC5001 D788E002BRFP266 (DSP)
Pin No.
Pin Name
I/O
Description
1
Vss
-
Ground terminal
2
AHCLIO0/AHCLKX2
I
Master clock signal input from the digital audio interface receiver and BD decoder
3
AMUTE0
-
Not used
4
AMUTE1
-
Not used
5
AHCLKX1
-
Not used
6
Vss
-
Ground terminal
7
ACLKX1
O
Bit clock signal output to the wireless transceiver and stream processor
8
CVdd
-
Power supply terminal (+1.2V)
9
ACLKR1
I
Bit clock signal input from the digital audio interface receiver and BD decoder
10
DVdd
-
Power supply terminal (+3.3V)
11
AFSX1
O
L/R sampling clock signal output to the wireless transceiver and stream processor
12
AFSR1
I
L/R sampling clock signal input from the digital audio interface receiver and BD decoder
13
Vss
-
Ground terminal
14
RESET#
I
Reset signal input from the system controller “L”: reset
15
Vss
-
Ground terminal
16
CVdd
-
Power supply terminal (+1.2V)
17
CLKIN
-
Not used
18
Vss
-
Ground terminal
19
TMS
-
Not used
20
CVdd
-
Power supply terminal (+1.2V)
21
TRST#
-
Not used
22
OSCVss
-
Not used
23
OSCIN
I
System clock input terminal (25 MHz)
24
OSCOUT
O
System clock output terminal (25 MHz)
25
OSCVss
-
Not used
26
Vss
-
Ground terminal
27
PLLHV
-
Power supply terminal (+3.3V)
28
TDI
-
Not used
29
TDO
-
Not used
30
Vss
-
Ground terminal
31
DVdd
-
Power supply terminal (+3.3V)
32
EMU[0]#
-
Not used
33
CVdd
-
Power supply terminal (+1.2V)
34
EMU[1]#
-
Not used
35
TCK
-
Not used
36
Vss
-
Ground terminal
37
EM_CAS#
O
Column address strobe signal output to the SD-RAM
38
EM_WE#
O
Write enable signal output to the SD-RAM
39
EM_WE_DQM[0]
O
Byte enable signal output to the SD-RAM
40
Vss
-
Ground terminal
41
EM_D[7]
I/O
Two-way data bus with the SD-RAM
42
DVdd
-
Power supply terminal (+3.3V)
43
EM_D[6]
I/O
Two-way data bus with the SD-RAM
44
CVdd
-
Power supply terminal (+1.2V)
45, 46
EM_D[5], EM_D[4]
I/O
Two-way data bus with the SD-RAM
47
Vss
-
Ground terminal
48, 49
EM_D[3], EM_D[2]
I/O
Two-way data bus with the SD-RAM
50
DVdd
-
Power supply terminal (+3.3V)
51, 52
EM_D[1], EM_D[0]
I/O
Two-way data bus with the SD-RAM
53
CVdd
-
Power supply terminal (+1.2V)
54
Vss
-
Ground terminal
55, 56
EM_D[15], EM_D[14]
I/O
Two-way data bus with the SD-RAM
57
CVdd
-
Power supply terminal (+1.2V)
58, 59
EM_D[13], EM_D[12]
I/O
Two-way data bus with the SD-RAM
60
DVdd
-
Power supply terminal (+3.3V)
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