Sony STR-DH700 Service Manual ▷ View online
STR-DH700
65
Pin No.
Pin Name
I/O
Description
121
RESET
I
System reset signal input from SYSTEM CONTROL IC
122
SPIDS
I
Serial data latch pulse signal input from SYSTEM CONTROL IC
123
GND
—
Ground
124
VDDINT
—
Power supply pin (+1.2 V)
125
SPICLK
I
Serial data transfer clock signal input from SYSTEM CONTROL IC
126
MISO
O
Serial data output for SYSTEM CONTROL IC
127
MOSI
I
Serial data input from SYSTEM CONTROL IC
128
GND
—
Ground
129
VDDINT
—
Power supply pin (+1.2 V)
130
VDDEXT
—
Power supply pin (+3.3 V)
131
AVDD
—
Power supply pin (+1.2 V)
132
AVSS
—
Ground
133
GND
—
Ground
134
CLKOUT
—
Not used (Open)
135
EMU
—
Not used (Open)
136
TDO
—
Not used (Open)
137
TDI
—
Not used (Fixed at L)
138
TRST
—
Not used (Fixed at L)
139
TCK
—
Not used (Fixed at L)
140
TMS
—
Not used (Fixed at L)
141
GND
—
Ground
142
CLKIN
I
System clock input (25 MHz)
143
XTAL
O
System clock output (25 MHz)
144
VDDEXT
—
Power supply pin (+3.3 V)
STR-DH700
66
Pin No.
Pin Name
I/O
Description
1
VSYNC
O
Vertical synchronize signal output for HDMI TX.
2 to 5
QO23 to QO20
—
Not used (Open)
6
IOGND
—
Ground
7
IOVCC
—
Power supply pin (+3.3 V)
8 to 11
QO19 to QO16
—
Not used (Open)
12
CVCC18
—
Power supply pin (+1.8 V)
13
CGND
—
Ground
14 to 17
QO15 to QO12
—
Not used (Open)
18
IOGND
—
Ground
19
IOVCC
—
Power supply pin (+3.3 V)
20 to 23
QO11 to QO8
—
Not used (Open)
24
CVCC18
—
Power supply pin (+1.8 V)
25
CGND
—
Ground
26 to 29
QO7 to QO4
—
Not used (Open)
30
IOGND
—
Ground
31
IOVCC
—
Power supply pin (+3.3 V)
32 to 35
QO3 to QO0
—
Not used (Open)
36
CVCC18
—
Power supply pin (+1.8 V)
37
CGND
—
Ground
38
CI2CA
—
Not used (Fixed at L)
39
CSDA
I/O
I2C two-way data bus with HDMI section.
40
CSCL
I
I2C clock signal input from HDMI controller.
41
DSDA
I/O
I2C two-way data bus with HDMI input select.
42
DSDL
I
I2C clock signal input from HDMI input select.
43
NC
—
Not used (Open)
44
PWR5V
I
HDMI SAT IN, DVD IN, BD IN and OUT connector detect signal input
45
CVCC18
—
Power supply pin (+1.8 V)
46
PGND
—
Ground
47
PVCC
—
Power supply pin (+3.3 V)
48
RSVD
—
Not used (Open)
49
AVCC
—
Power supply pin (+3.3 V)
50
RXC–
I
TMDS clock signal input from HDMI SAT IN, DVD IN, BD IN and OUT connector.
51
RXC+
I
TMDS clock signal input from HDMI SAT IN, DVD IN, BD IN and OUT connector.
52
AGND
—
Ground
53
AVCC
—
Power supply pin (+3.3 V)
54
RX0–
I
TMDS data input 0 from HDMI SAT IN, DVD IN, BD IN and OUT connector.
55
RX0+
I
TMDS data input 0 from HDMI SAT IN, DVD IN, BD IN and OUT connector.
56
AGND
—
Ground
57
AVCC
—
Power supply pin (+3.3 V)
58
RX1–
I
TMDS data input 1 from HDMI SAT IN, DVD IN, BD IN and OUT connector.
59
RX1+
I
TMDS data input 1 from HDMI SAT IN, DVD IN, BD IN and OUT connector.
60
AGND
—
Ground
61
AVCC
—
Power supply pin (+3.3 V)
62
RX2–
I
TMDS data input 2 from HDMI SAT IN, DVD IN, BD IN and OUT connector.
63
RX2+
I
TMDS data input 2 from HDMI SAT IN, DVD IN, BD IN and OUT connector.
64
AGND
—
Ground
65
DGND
—
Ground
66
DVCC18
—
Power supply pin (+1.8 V)
67
MUTE
O
Audio muting signal output
68
IOVCC
—
Power supply pin (+3.3 V)
69
IOGND
—
Ground
70
SPDIF
O
SPDIF signal output for digital audio interface and HDMI TX.
71 to 74
SD3 to SD0
O
Serial data output for DSP and HDMI TX.
75
WS
O
Word select signal output for DSP and HDMI TX.
76
SCK
O
Serial clock signal output for DSP and HDMI TX.
HDMI RE BOARD (1/2) IC3511 SII9013CLU (HDMI RX)
STR-DH700
67
Pin No.
Pin Name
I/O
Description
77
IOVCC
—
Power supply pin (+3.3 V)
78
IOGND
—
Ground
79
MCLK
O
Audio master clock signal output for DSP and HDMI TX.
80
CGND
—
Ground
81
CVCC18
—
Power supply pin (+1.8 V)
82
AUDPVCC18
—
Power supply pin (+1.8 V)
83
AUDPGND
—
Ground
84
XTALOUT
O
System clock output (28.322 MHz)
85
XTALIN
I
System clock input (28.322 MHz)
86
XTALVCC
—
Power supply pin (+3.3 V)
87
REGVCC
—
Power supply pin (+3.3 V)
88
RSVDL
—
Not used (Fixed at L)
89
RESET
I
Reset signal input from HDMI controller. (L: Reset)
90
SCDT
—
Not used (Open)
91
INT
O
Interrupt signal output for HDMI controller.
92 to 96
QE23 to QE19
O
Serial data output 23 to 19 for HDMI TX, video processor and D/A converter.
97
IOGND
—
Ground
98
IOVCC
—
Power supply pin (+3.3 V)
99 to 105
QE18 to QE12
O
Serial data output 18 to 12 for HDMI TX, video processor and D/A converter.
106
IOGND
—
Ground
107
IOVCC
—
Power supply pin (+3.3 V)
108 to 111
QE11 to QE8
O
Serial data output 11 to 8 for HDMI TX, video processor and D/A converter.
112
CVCC18
—
Power supply pin (+1.8 V)
113
CGND
—
Ground
114 to 117
QE7 to QE4
O
Serial data output 7 to 4 for HDMI TX, video processor and D/A converter.
118
IOGND
—
Ground
119
ODCK
O
Output data clock signal output for HDMI TX.
120
IOVCC
—
Power supply pin (+3.3 V)
121 to 124
QE3 to QE0
O
Serial data output 3 to 0 for HDMI TX, video processor and D/A converter.
125
CVCC18
—
Power supply pin (+1.8 V)
126
CGND
—
Ground
127
DE
O
Data enable signal output for HDMI TX.
128
HSYNC
O
Horizontal synchronize signal output for HDMI TX.
STR-DH700
68
Pin No.
Pin Name
I/O
Description
1
HSYNC
I
Horizontal synchronize signal input from HDMI RX.
2
VSYNC
I
Vertical synchronize signal input from HDMI RX.
3
CGND
—
Ground
4
CVCC18
—
Power supply terminal (+1.8 V)
5
SPDIF
I
SPDIF signal input from HDMI RX.
6
MCLK
I
Audio master clock signal input from HDMI RX.
7 to 10
SD3 to SD0
I
Serial data input from HDMI RX.
11
WS
I
Word select signal input from HDMI RX.
12
SCK
I
Serial clock signal input from HDMI RX.
13
IOVCC
—
Power supply terminal (+3.3 V)
14
IOGND
—
Ground
15
CGND
—
Ground
16
CVCC18
—
Power supply terminal (+1.8 V)
17
INT
O
Interrupt signal output for HDMI controller.
18
HPD
I
Hot plug detect signal input from HDMI OUT connector.
19
DSDA
I/O
I2C two-way data bus with HDMI OUT connector.
20
DSCL
O
I2C clock signal output for HDMI OUT connector.
21
RSVDL
—
Not used. (Fixed at L)
22
PGND1
—
Ground
23
PVCC1
—
Power supply terminal (+3.3 V)
24
EXT_SWING
—
Not used. (Fixed at H)
25
AGND
—
Ground
26
TXC–
O
TMDS clock signal output for HDMI OUT connector.
27
TXC+
O
TMDS clock signal output for HDMI OUT connector.
28
AVCC
—
Power supply terminal (+3.3 V)
29
TX0–
O
TMDS data output 0 for HDMI OUT connector.
30
TX0+
O
TMDS data output 0 for HDMI OUT connector.
31
AGND
—
Ground
32
TX1–
O
TMDS data output 1 for HDMI OUT connector.
33
TX1+
O
TMDS data output 1 for HDMI OUT connector.
34
AVCC
—
Power supply terminal (+3.3 V)
35
TX1–
O
TMDS data output 2 for HDMI OUT connector.
36
TX1+
O
TMDS data output 2 for HDMI OUT connector.
37
AGND
—
Ground
38
PVCC2
—
Power supply terminal (+3.3 V)
39
PGND2
—
Ground
40
NC
—
Not used. (Open)
41
CI2CA
—
Not used. (Fixed at L)
42
RESET
I
Reset signal input from HDMI controller. (L: Reset)
43
CSCL
I
I2C clock signal input from HDMI controller.
44
CSDA
I/O
I2C two-way data bus with HDMI section.
45
CVCC18
—
Power supply terminal (+1.8 V)
46
CGND
—
Ground
47
IOGND
—
Ground
48
IOVCC
—
Power supply terminal (+3.3 V)
49 to 58
D23 to D14
I
Serial data input 23 to 14 from HDMI RX and video processor.
59
CVCC18
—
Power supply terminal (+1.8 V)
60
CGND
—
Ground
61 to 65
D13 to D9
I
Serial data input 13 to 9 from HDMI RX and video processor.
66
IDCK
I
Output data clock signal input from HDMI RX.
67 to 70
D8 to D5
I
Serial data input 8 to 5 from HDMI RX and video processor.
71
IOVCC
—
Power supply terminal (+3.3 V)
72
IOGND
—
Ground
73
CGND
—
Ground
74
CVCC18
—
Power supply terminal (+1.8 V)
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