Sony STR-DG500 Service Manual ▷ View online
41
STR-DG500
• Formas de Ondas
— Placa DIGITAL —
— Placa DIGITAL —
1
IC1301
qd
(CKOUT)
2.1 Vp-p
1.8 Vp-p
1V/DIV, 50nsec/DIV
3
IC1301
wa
(XOUT)
1V/DIV, 50nsec/DIV
4
IC1501
9
(MCLK1)
0.6 Vp-p
1V/DIV, 50nsec/DIV
2
IC1301
qf
(BCK)
2.4 Vp-p
1V/DIV, 0.2
µ
s/DIV
13.9 MHz
12.288 MHz
3.07 MHz
12.288 MHz
5
IC1501
qs
(MCLK2)
1.1 Vp-p
2.2 Vp-p
1V/DIV, 50nsec/DIV
7
IC1101
id
(X1)
1V/DIV, 50nsec/DIV
6
IC1501
qf
(SCKOUT)
2.5 Vp-p
1V/DIV, 50nsec/DIV
24 MHz
12.288 MHz
13.9 MHz
— S VIDEO UP CONVERT Board (DG600) —
0.3 Vp-p
0.5V/DIV, 0.2
µ
sec/DIV
3.57 MHz
1
IC375
4
(XTAL)
— XM Board (DG600) —
1
IC102
wh
(OSCOUT)
0.8 Vp-p
1V/DIV, 50nsec/DIV
45.158 MHz
42
STR-DG500
IC501 µPC2581V-S (PLACA PRINCIPAL (2/3))
IC601 µPC2581V-S (PLACA PRINCIPAL (2/3))
IC701 µPC2581V-S (PLACA PRINCIPAL (2/3))
IC601 µPC2581V-S (PLACA PRINCIPAL (2/3))
IC701 µPC2581V-S (PLACA PRINCIPAL (2/3))
• Diagramas em Blocos do IC
PROTECTOR
DRIVE
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
PRE
DRIVE
PRE
DRIVE
BIAS CIRCUIT
REG
+VOUT1
MUTE
–VOUT1
NF1
COMP1
COMP2
IN1
GND
IN2
NF2
–VOUT2
+VOUT2
VCC
VCC
VEE
DRIVE
IC1301 LC89056W-E (PLACA DIGITAL (1/5)
13
14
CKOUT
12
A.GND
11
AVDD
4
DIN1
10
LPF
9
VIN
8
R
7
DVDD
6
D.GND
5
DIN2
2
DOUT
1
DISEL
3
DIN0
25
CSFLAG
33
BPSYNC
32
AUTO
31
DGND
30
DVDD
26 27 28 29
F3/P3/C3
F2/P2/C2
F1/P1/C1
F0/P0/C0
35
DO
36
DI
34
ERROR
BCK
15
16
LRCK
DATAO
17
XSTATE
18
19
DGND
DVDD
20
21
XMCK
XOUT
22
XIN
23
24
EMPHA
AUDIO
48
47
XMODE
CKSEL1
CKSEL1
46
45
CKSEL0
DOSEL1
DOSEL1
44 DOSEL0
43
43
42
DVDD
DGND
DGND
41
40
MODE1
MODE0
MODE0
39 XSEL
38
37
CLK
CE
INPUT
PLL
DATA
DEMODULATOR
C BIT DETECTION
Pa,Pb DETECTION
MICROPROCESSOR INTERFACE
LOCK
DETECTION
fs
CALCULATION
TIMING
X'TAL1
43
STR-DG500
IC1401 PCM1800E/2K (PLACA DIGITAL (3/5))
IC1452 PCM1609APT (PLACA DIGITAL (3/5))
SINGLE-END
DEFERENTIAL
CONVERTER
REFERENCE
SINGLE-END
DEFERENTIAL
CONVERTER
DIGITAL
MODULATOR
DIGITAL
MODULATOR
1/64
DECIMATION
FILTER
&
LOW-CUT
FILTER
CLOCK/
TIMING CONTROL RESET/
POWER CONTROL
SERIAL I/O
INTERFACE
&
MODE/FORMAT
CONTROL
LIN
V REF 1
REFCOM
V REF 2
RIN
RSTB
FMT0
BYPASS
FMT1
MODE1
MODE0
FSYNC
1
2
3
4
5
6
8
7
9
11
10
12
AGND
VCC
C PL
C NL
C PR
C NR
DGND
SYSCL
K
DOUT
BCK
LRCK
VDD
24
23
22
21
20
19
17
16
15 14 13
18
SYSTEM
CLOCK
MANAGER
FUNCTION
CONTROL
INTERFACE
SERIAL
INPUT
INTERFACE
4X/8X
OVER SAMPLING
DIGITAL
FILTER
WITH
FUNCTION
CONTROLLER
ENHANCED
MULTI-
LEVEL
DELTA-
SIGMA
MODULE
ZERO DETECT
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
RST
SCKI
SCKO
BCK
TEST
VDD
DGND
DATA1
DATA2
DATA3
ZEROA
LRCK
37
38
39
40
42
43
44
45
46
47
48
41
ZERO1
ZERO2
ZERO3
ZERO4
ZERO5
ZERO6
NC
NC
VOUT6
VOUT5
VOUT4
VOUT3
1
2
3
4
5
6
7
8
9
10
11
12
VOUT2
VOUT1
VCOM
VOUT7
AGND5
VCC5
AGND6
VOUT8
AGND4
VCC4
AGND3
VCC3
13
14
15
16
17
18
19
20
21
22
23
24
ML
MC
MDI
MDO
ZERO8
D
ATA
4
ZERO7
NC
VCC1
AGND1
VCC2
AGND2
36 35 34 33
31
32
30
29
28
27
26
25
44
STR-DG500
IC1601 SN74HC595ANSR (PLACA DIGITAL (4/5))
IC1602 SN74HC595ANSR (PLACA DIGITAL (4/5))
IC1602 SN74HC595ANSR (PLACA DIGITAL (4/5))
IC2501 STK350-230 (SB AMP BOARD) (STR-DG600)
IC203 NJM2595D (PLACA VIDEO)
1
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
SHIFT REGISTER
LATCH
PARALLEL DATA
OUTPUT
GND
VCC
LATCH
CLOCK
PARALLEL DATA
OUTPUT
SERIAL DATA
INPUT
OUTPUT
ENABLE
SHIFT
CLOCK
SERIAL DATA
OUTPUT
RESET
QB
QC
QD
QE
QF
QG
QH
SQH
A
QA
1
IN+
2
IN-
3
4
5
-VOUT
6
+VOUT
7
-B
8
GND
9
+B
PRE
GND
DRIVER
1
M.OUT
2
SW5
8
VEE
3
DVD
4
SW3
5
V2
6
SW4
7
NC
S3
S1
S2
S4
S6
S7
S5
16 VCC
SW2
V3
V1.OUT
SW1
V1
GND
V1
GND
NC
6dB
AMP
75Ω
DRIVER
10
9
15
14
13
12
13
12
11
-V
+V
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