DOWNLOAD Sony STR-DE635 Service Manual ↓ Size: 7.63 MB | Pages: 57 in PDF or view online for FREE

Model
STR-DE635
Pages
57
Size
7.63 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
str-de635.pdf
Date

Sony STR-DE635 Service Manual ▷ View online

— 55 —
Pin No.
31
32
33
34
35
36
37
38
39
40
41
42
43
44
I/O
I
I
I
O
I
I
I
I
I
I
I
O
Description
Rch analog negative input pin
Rch analog positive input pin
Negative voltage reference input pin, AVSS (Connected to gorund)
Common voltage output pin,  AVDD/2
 Large external capacitor is used to reduce power-supply noise
Positive voltage reference input pin, AVDD
Analog power supply pin
Analog ground pin
X’tal input pin (Not used)
External master clock input pin if XTS = “L”
Parallel/serial select pin
“L”: serial control mode, “H”: parallel control mode (Connected to ground)
Chip select pin in serial mode
Control data clock pin in serial mode
Control data input in serial mode
Control data output pin in serial mode
Pin Name
RIN–
RIN+
VREFL
VCOM
VREFH
A. 5V
A. GND
XTI
MCLKI
S/P
CS
CCLK
CDTI
CDTO
If pins TEST, ICKS0, ICKS1, PD, S/P, DFS, DEM0, DEM1, CAD0, CAD1, S/M, MCLK, SDOS are not driven, then TEST, ICKS0, ICKS1, CAD0, CAD1,
must be tied to either AVSS or AVDD. PD, S/P, DFS, DEM0, DEM1, S/M, MCLK, SDOS must be tied to either DVSS or DVDD.
— 56 —
IC102
MB90553APF-G-138-BND DISPLAY CONTROL(DISPLAY BOARD)
Description
DCS logo display data output to LED.
EQ ON/OFF display data output to LED.
BASS BOOST display data output to LED.
MUTING display data output to LED.
DOLBY DIGITAL display data output to LED.
VOLUME display data output to LED.
Power reay display.
Power check (+5V)
Not used. (Connected to ground)
Not used. (Connected to ground)
Ground (Connected to ground)
Not used. (Connected to ground)
Not used. (Connected to ground)
Not used. (Connected to ground)
Not used. (Connected to ground)
Not used. (Connected to ground)
Not used. (Connected to ground)
Not used. (Connected to ground)
UART data output to rewrite flash memory
UART data intput to rewrite flash memory
Clock output to flourescent display tube
Data output to flourescent display tube
Power supply +5 V
Fluorescent latch
Fluorescent clear
SIRCS input
External power regulator capacitor 0.1µ is connected to this terminal.
Not used (Connected to ground)
Not used (Connected to ground)
Not used (Connected to ground)
Not used (Connected to ground)
Not used (Connected to gorund)
Not used (Connected to ground)
Analog power supply +5 V
AVRH (Connected to power supply +5 V)
SVRL (Connected to ground)
Ground (Connected to ground)
Key input 1
Key input 2
Key input 3
Key input 4
Ground (Connected to ground)
Key input 5
Key input 6
Key input 7
RDS signal input.
Stop input
Not used (Connected to ground)
MD 0 (To MD0 of MB90573)
MD 1 (Connected to power supply +5 V)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
Pin Name
DCS
EQ
B.B
MUTE
D.D
VOLUME
POWER RY
5V CHECK
VSS
SOT0
SIN0
FL CLK
FL DATA
VCC
FL LAT
FL CLEAR
SIRCS IN
C
AVCC
AVRH
AVRL
AVSS
AD KEY IN 1
AD KEY IN 2
AD KEY IN 3
AD KEY IN 4
VSS
AD KEY IN 5
AD KEY IN 6
AD KEY IN 7
RDS SIGNAL
STOP
MD 0
MD 1
O
O
O
O
O
O
O
O
O
I
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
— 57 —
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
Description
Pin Name
MD 2
HSTX
RDS CLOCK
RDS DATA
VOL UP
VOL DOWN
U-RESET
U-SREQ
U-MREQ
U-DATA
U-CLOCK
AUBUS-IN
SP-A
SP-B
POWER-KEY IN
AUBUS-OUT
VIRSION IN1
VIRSION IN 2
VIRSION IN 3
VIRSION IN 4
VIRSION IN 5
VIRSION OUT 1
VIRSION OUT 2
JOG-UP
JOG-DOWN
RESET
VSS
X0
X1
VCC
LED CLK
LED DATA
LED CE
LED CLR
MBUS-V1
MBUS-DVD
MBUS-TV
MBUS-STATUS
LAT
I
I
I
I
O
O
O
I
O
O
O
I
I
I
I
O
I
I
I
I
I
O
O
I
I
I
I
I
I
I
I
I
I
I
O
MD 2 (To MD2 of MB90573)
Hardware STANDBY input
RDS clock input
RDS data input
Volume up data output
Volume down data output
Not used (Connected to ground)
Reset output (Connected to MB90573 RESET)
Slave request and data input (Connected to MB90573 SLV DATA/REQ)
Master request output (Connected to MB90573 DISPMR)
Master data output  (Connected to MB90573 DISP DATA)
Master clock output  (Connected to MB90573 DISPCLK)
Audio bus input
Speaker A signal input.
Speaker B signal input.
POWER-KEY input.
Audio bus output
Virsion input.
Virsion input.
Virsion input.
Virsion input.
Virsion input.
Virsion output.
Virsion output.
Function encoder up input.
Function encoder down input.
Reset (Display MCU)
Not used (Connected to ground)
Not used (Connected to ground)
Not used (Connected to ground)
Ground (Connected to ground)
External ceramic filter 4 MHz is connected to this terminal
External ceramic filter 4 MHz is connected to this terminal
Power supply +5 V
Not used. (Connected to ground)
Not used. (Connected to ground)
LED clock input.
LED data input.
LED chip eneble input.
LED clear input.
Not used. (Connected to ground)
Not used. (Connected to ground)
V1 input from MBUS
DVD input from MBUS
TV input from MBUS
STATUS input from MBUS
Not used. (Connected to ground)
Learning microprocessor latch output
Not used. (Connected to ground)
Not used. (Connected to ground)
— 58 —
IC1101
LC89055W DIGITAL AUDIO I/F RECEIVER (DIGITAL BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
I/O
I
O
I
O
I
O
I
I
O
O
O
O
O
O
I
O
O
O
O
O
O
I
I
I
I
I
I
O
O
I
I
I
Pin Name
DISEL
DOUT
DIN0
DIN1
DIN2
D. GND
D. V
DD
R
V IN
LPF
A. V
DD
A. GND
CK OUT
BCK
LRCK
DATA O
XSTATE
D. GND
D. V
DD
XMCK
XOUT
XIN
EMPHA
AUDIO
CSFLAG
F0/P0/C0
F1/P1/C1
F2/P2/C2
F3/P3/C3
D. V
DD
D. GND
AUTO
BPSYNC
ERROR
DO
DI
CE
CLK
XSEL
MODE0
MODE1
D. GND
D. V
DD
DOSEL0
DOSEL1
CKSEL0
CKSEL1
XMODE
Description
Input data select. (connected to ground.)
EIAJ data and parity flag output terminal (Not used)
Amplifier integrate data input terminal
Amplifier integrate data input terminal (Connecting to ground)
Amplifier integrate data input terminal (Connecting to ground)
Digital ground
Digital power supply
Input terminal for VCO generator band adjustment
Input terminal for VCO self running frequency set
External LPF for PLL is connected to this terminal
Analog power supply
Analog ground
256fs or 128fs clock output terminal (Select CLKMD terminal)
Bit clock output terminal
L, R clock output terminal (L-ch: “H”, R-ch: “L”)
Audio data output terminal
Xtal status frag output.
Digital ground
Digital power supply
Not used.
Crystal oscillator output terminal (Not used.)
Crystal oscillator input terminal
Emphasis monitor output terminal (“H” = ON) (Not used.)
Not used.
C-bit change frag output.
Not used.
Not used.
Not used.
Not used.
Digital power supply
Digital ground
Non PCM data detect flag output.
Non PCM sync detect flag output.
Error mute output terminal
Microprocessor I/F.  When CCB/SUB is  “H”, data output terminal (high level open drain output) (Not used)
Microprocessor I/F.  Data input terminal
Microprocessor I/F.  Chip enable/latch input terminal
Microprocessor I/F.  Clock input terminal
Xtal select. (Connected to +5V.)
Mode 0 input. (Connected to ground.)
Mode 1 input. (Connected to ground.)
Digital ground
Digital power supply
Output data select 0. (Connected to ground.)
Output data select 1. (Connected to ground.)
System clock select input 0. (Connected to ground.)
System clock select input 1. (Connected to ground.)
Reset input.
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