Sony STR-DE445 / STR-DE545 / STR-SE501 Service Manual ▷ View online
25
Pin No.
Pin Name
I/O
Function
31
RIN–
I
Rch analog negative input pin
32
RIN+
I
Rch analog positive input pin
33
DZF2
O
Zero input detect 2. (Not used.)
34
VCOM
O
Common voltage output pin, AVDD/2
Large external capacitor is used to reduce power-supply noise
35
VREFH
I
“Positive voltage reference input pin, AVDD”
36
A. 5V
—
Analog power supply pin
37
A. GND
—
Analog ground pin
38
DZF1
O
Zero input detect 1. (Not used.)
39
MCLK
I
Master clock input pin
40
P/S
I
Parallel/serial select pin
“L”: serial control mode, “H”: parallel control mode (Connected to ground)
41
DIFø/CSN
I
Audio data interface formtat. (At pararel control mode.)
Chip select pin in serial mode
42
CCLK
I
Control data clock pin in serial mode
43
CDTI
I
Control data input in serial mode
44
LOOP1
I
Loop back model
26
1
BLUE LED
O
MULTI CHANNEL DECODING display data output to LED.
2
BB LED
O
BASS BOOST display data output to LED.
3
TONE LED
O
TONE display data output to LED.
4
DOLBY LED
O
DOLBY DIGITAL display data output to LED.
5
AFD LED
O
A.F.D display data output to LED.
6
2CH LED
O
2CH display data output to LED.
7
MODE LED
O
MODE display data output to LED.
8
PW RY
O
Power relay.
9
SP B RY
O
Speaker B relay.
10
SP A RY
O
Speaker A relay.
11
VSS
—
Ground.
12
CENTER RY
O
Center Speaker relay.
13
WOOFER RY
O
Sub Woofer relay.
14
REAR RY
O
Rear Speaker relay.
15
H/P RY
O
Phones relay.
16
FL CLR
O
Clear output to flourescent display tube.
17
FL LAT
O
Latch output to flourescent display tube.
18
FL CLK
O
Clock output to flourescent display tube.
19
FL DATA/FLASH
O
Data output to flourescent display tube./FLASH data output.
20
FLASH2
I
FLASH data input.
21
YSS912 CLK
O
Clock output to Audio DSP IC.
22
YSS912 SI
O
Serial data output to Audio DSP IC.
23
VCC
—
Power suppley.
24
YSS912 SO
I
Serial data input to Audio DSP IC.
25
YSS912 CS
O
Chip select output to Audio DSP IC.
26
SECTION NAME
I
Section name signal input.
27
C
—
External power regulator capacitor 0.1 is connected to this terminal.
28
SVIDEO MUTE
O
S-video mute output.
29
AC MUTE
O
AC mute output.
30 – 32
LED1 – 3
O
LED data output.
33
SELECT LED
O
LED select data output.
34
AVCC
—
Analog power suppley.
35
AVRH
—
Connected to power supply.
36
AVRL
—
Connected to ground.
37
AVSS
—
Ground.
38 – 41
AD KEY IN1 – 4
I
Key input.
42
VSS
—
Power suppley.
43
VERSION
I
Version signal input.
44
RDS SIGNAL
I
RDS signal input.
45
JOG A (UP)
I
Function encoder up input.
46
JOG B (DWN)
I
Function encoder down input.
47
STOP
I
Stop input.
48
RDS DT
I
RDS data input.
49
MD0
I
Selection of micrprocessor operation mode.
50
MD1
I
Selection of micrprocessor operation mode. (Connected to power supply.)
51
MD2
I
Selection of micrprocessor operation mode.
52
HSTX
I
Hardware standby signal input.
53
RDS CLK
I
RDS clock input.
54
SP B
I
Speaker B signal input.
Pin Name
I/O
Function
• IC102 MB90553ABPF-G-158-BND System control (DISPLAY BOARD)
Pin No.
27
55
SP A
I
Speaker A signal input.
56
PW KEY IN
I
Power key input.
57
SIRCS
I
Sircs signal input.
58
PROTECTOR
I
Protect signal input.
59
TUNER LAT
O
Tuner latch output.
60
TUNER DATA OUT
O
Tuner data output.
61
TUNER CLK
O
Tuner clock output.
62
TUNER DATA IN
I
Tuner data input.
63
AUBUS IN
I
Audio data bus input.
64
AUBUS OUT
O
Audio data bus output.
65
TUNER MUTE
O
Tuner mute output.
66
AUTO STOP
I
Auto stop signal input.
67
STEREO
I
Stereo signal input.
68
CODEC CLK
O
CODEC clock output.
69
CODEC DFS
O
CODEC double speed sampling output.
70
CODEC CDT1
O
CODEC control data output.
71
CODEC PD
O
CODEC power down output.
72
CODEC MUTE
O
CODEC mute output.
73
CODEC CS
O
CODEC chip select output.
74
VIDEO MUTE
O
Video mute output.
75
S1
O
Video select switch1 output.
76
S2
O
Video select switch2 output.
77
RESET
I
Reset input.
78
M61501 DATA
O
Data output to sound processor.
79
M. CLK
O
Clock output to sound processor.
80
M. CE
O
Chip enable output to sound processor.
81
VSS
—
Ground.
82
XO
O
External ceramic filter 16MHz is connected to this terminal.
83
XI
I
External ceramic filter 16MHz is connected to this terminal.
84
VCC
—
Power suppley.
85
VOL-A (UP)
I
Volume up signal input.
86
VOL-B (DOWN)
I
Volume down signal input.
87
MUTE LED
O
Muting display data output to LED.
88
SYSTEM MUTE
O
System mute output.
89
D.DO
I
Data input to digital audio I/F receiver.
90
DIR DI
O
Data output to digital audio I/F receiver.
91
DIR CE
O
Chip enable output to digital audio I/F receiver.
92
DIR CLK
O
Clock output to digital audio I/F receiver.
93
DIR XMODE
O
Reset signal output to digital audio I/F receiver.
94
DIR DATAO
I
Audio data input to digital audio I/F receiver.
95
D.ERR
I
Error mute signal input to digital audio I/F receiver.
96
DIR XSTATE
I
Xtal status frag signal input to digital audio I/F receiver.
97
DTS
I
Digital theater system signal input.
98
ANG/DIG
O
Analog/digital select signal output.
99
Y CS
O
Chip select output to Audio DSP IC.
100
Y IC
O
Reset signal output to Audio DSP IC.
Pin No.
Pin Name
I/O
Function
28
3-15. IC BLOCK DIAGRAMS
IC301 BU1924F-E2 (MAIN BOARD)
IC501 STK350-230 (MAIN BOARD)
ANALOG
DIGIT
AL
RCLK
NC
XO
XI
VSS2
T2
VDD2
T1
QUAL
RDA
T
VREF
MUX
VDD1
VSS1
VSS3
CMP
1
4
3
6
5
8
7
2
14
15
16
13
12 11 10
9
CLOCK
PLL 57kHz
RDS/ARI
COMPARATOR
8th SWITCHED
CAPACITOR
FILTER
ANTI-ALIASING
FILTER
BIPHASE
DECODER
PLL
1187.5Hz
DEFFERENTIAL
DECODER
TEST
1
2
3
4
5
6
7
8
9
TR3
R1
R2
TR4
TR6
TR7
R4
R9
TR5
TR1
TR2
R6
D4 D3
R7
R8
TR8
D1 D2
R5
R3
INPUT
NF
-VEOUT
+VEOUT
V
SS
GND
V
CC
SUB
PROTECTOR
DRIVE
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
PRE
DRIVE
PRE
DRIVE
BIAS CIRCUIT
REG
MUTE
+VOUT1
–VOUT1
COMP1
NF1
IN1
GND
IN2
NF2
COMP2
–VOUT2
+VOUT2
VCC1
VCC2
VEE
DRIVE
IC701, 702 µPC2581V (MAIN BOARD)
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