DOWNLOAD Sony STR-DE445 / STR-DE545 / STR-SE501 Service Manual ↓ Size: 7.32 MB | Pages: 48 in PDF or view online for FREE

Model
STR-DE445 STR-DE545 STR-SE501
Pages
48
Size
7.32 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
str-de445-str-de545-str-se501.pdf
Date

Sony STR-DE445 / STR-DE545 / STR-SE501 Service Manual ▷ View online

21
1
DISEL
I
Input data select. (connected to ground.)
2
DOUT
O
EIAJ data and parity flag output terminal (Not used)
3
DIN0
I
Amplifier integrate data input terminal
4
DIN1
O
Amplifier integrate data input terminal
5
DIN2
I
Amplifier integrate data input terminal
6
D. GND
Digital ground
7
D. VDD
O
Digital power supply
8
R
I
Input terminal for VCO generator band adjustment
9
V IN
I
Input terminal for VCO self running frequency set
10
LPF
O
External LPF for PLL is connected to this terminal
11
A. VDD
Analog power supply
12
A. GND
Analog ground
13
CK OUT
256fs or 128fs clock output terminal (Select CLKMD terminal)
14
BCK
O
Bit clock output terminal
15
LRCK
O
“L, R clock output terminal (L-ch: “H”, R-ch: “L”)”
16
DATA O
O
Audio data output terminal
17
XSTATE
O
Xtal status frag output.
18
D. GND
Digital ground
19
D. VDD
Digital power supply
20
XMCK
Not used.
21
XOUT
O
Crystal oscillator output terminal (Not used.)
22
XIN
I
Crystal oscillator input terminal
23
EMPHA
O
Emphasis monitor output terminal (“H” = ON) (Not used.)
24
AUDIO
Not used.
25
CSFLAG
O
C-bit change frag output. (Not used.)
26
F0/P0/C0
Not used.
27
F1/P1/C1
Not used.
28
F2/P2/C2
Not used.
29
F3/P3/C3
Not used.
30
D. VDD
Digital power supply
31
D. GND
Digital ground
32
AUTO
O
Non PCM data detect flag output. (Not used.)
33
BPSYNC
O
Non PCM sync detect flag output. (Not used.)
34
ERROR
O
Error mute output terminal
35
DO
O
Microprocessor I/F.  When CCB/SUB is  “H”, data output terminal (high level open drain output)
36
DI
I
Microprocessor I/F.  Data input terminal
37
CE
I
Microprocessor I/F.  Chip enable/latch input terminal
38
CLK
I
Microprocessor I/F.  Clock input terminal
39
XSEL
I
Xtal select. (Connected to +5V.)
40
MODE0
I
Mode 0 input. (Connected to ground.)
41
MODE1
I
Mode 1 input. (Connected to ground.)
42
D. GND
Digital ground
43
D. VDD
Digital power supply
44
DOSEL0
O
Output data select 0. (Connected to ground.)
45
DOSEL1
O
Output data select 1. (Connected to ground.)
46
CKSEL0
I
System clock select input 0. (Connected to ground.)
47
CKSEL1
I
System clock select input 1. (Connected to ground.)
48
XMODE
I
Reset input.
Pin No.
Pin Name
I/O
Function
3-14. IC PIN FUNCTIONS
• IC1004  LC89055W-RA8  DIGITAL AUDIO I/F RECEIVER (DIGITAL BOARD)
22
1
VDD1
Power supply. (+5v.)
2
RAMCEN
O
External RAM chip select output.
3, 4
RAM16, 15
O
External RAM address data output. (Not used.)
5 – 7
SDIB0 – 2
I
PCM input to sub DSP. (Not used.)
8
XI
I
Xta’l 12.288MHz input.
9
XO
O
Not used.
10
VSS
Ground.
11
AVDD
Power supply. (+3.3v)
12
SDIB3
O
PCM input to sub DSP. (Not used.)
13, 14
TEST
Test terminal.(Not used.)
15
OVFB
O
Sub DSP over fllow detect. (Not used.)
16
DTS DATA
O
DTS data detect. (Not used.)
17
AC3 DATA
O
AC-3 data detect. (Not used.)
18
SDOB3
O
PCM output from Sub DSP. Not used.
19
CPO
O
Output for PLL.Connected to external analog filter.
20
AVSS
Ground.
21
VDD2
Power supply. (+3.3v.)
22 – 24
SDOA2 – 0
O
PCM output from Main DSP. (Not used.)
25 – 29
RAMA14 – 10
O
External RAM address data output.
30
VSS
Ground.
31
VDD1
Power supply. (+5v.)
32 – 39
OPORT0 – 7
O
Not used.
40
VSS
Ground.
41
VDD2
Power supply. (+3.3v)
42 – 44
RAMA9 – 7
O
External RAM address data output.
45 – 47
SDOB2-0
O
PCM output from Sub DSP.
48
SDBCK1
I
Bit clock input for SDOA, SDIB, SDOB. (Not used.)
49
SDWCK1
I
Word clock input for SDOA, SDIB, SDOB. (Not used.)
50
VSS
Ground.
51
VDD2
Power supply. (+3.3v.)
52
NONPCM
O
Non-PCM data detect. (Not used.)
53
CRC
O
AC-3 CRC error detect.(Not used.)
54
MUTE
O
Auto mute detect.(Not used.)
55
KARAOKE
O
AC-3 karaoke data detect. (Not used.)
56
SURENC
O
AC-3 2/0 mode dolby surround encode input detect. (Not used.)
57
SDBCKO
O
SDBCK0 inverter clock output. (Not used.)
58, 59
RAMA6, 5
O
External SRAM address data output.
60
VSS
Ground.
61
RAMA4
O
External SRAM address data output.
62
IC
I
Initial clear.
63
TEST
Test terminal. (Not used.)
64
RAMA3
O
External SRAM address data output.
65
CSB
I
Chip select input for Sub DSP.
66
CSB
I
Microcomputer interface chip select input.
67
SO
O
Microcomputer interface data output.
68
SI
I
Microcomputer interface data input.
69
SCK
I
Microcomputer interface clock input.
70
RAMA2
O
External SRAM address data output.
Pin No.
Pin Name
I/O
Function
• IC1006  CXD9511AQ  Audio DISP (DIGITAL BOARD)
23
Pin No.
Pin Name
I/O
Function
71
VDD1
Power supply. (+5v.)
72 – 79
RAMD0 – 7
I/O
External SRAM data input/output.
80
VSS
Ground.
81
VDD2
Power supply. (+3.3v.)
82
SDWCKO
I
Bit clock input for SDOA, SDIB, SDOB.
83
SDBCKO
I
Word clock input for SDOA, SDIB, SDOB.
84
SDIA0
I
AC-3/DTS bitstream or PCM data input to Main DSP.
85
SDIA1
O
AC-3/DTS bitstream or PCM data input to Main DSP.
86
RAMA1
O
External SRAM address data output.
87
RAMA0
O
External SRAM address data output.
88
RAMWEN
O
Write enable for external SRAM.
89
RANOEN
O
Output enable for external SRAM.
90
VSS
Ground.
91
VDD2
Power supply. (+3.3v.)
92 – 99
IPORT7 – 0
I
Not used.
100
VSS
Ground.
24
Pin Name
I/O
Function
1
SDOS
I
SDTO source select pin
“L”: internal ADC output, “H”: DAUX input
ORed with serial control register if P/S = “L” (Connected to ground)
2
I2C
I
Serial control mode select pin
3
S MUTE
I
Soft mute pin
“H”: Soft mute ON, “L”: OFF
4
BCLK
I/O
Audio serial data clock pin
5
LRCK
I/O
Input/output channel clock pin
6
SDT11
I
DAC1 audio serial data input pin
7
SDT12
I
DAC2 audio serial data input pin
8
SDT13
I
DAC3 audio serial data input pin
9
SDTO
O
Audio serial data output pin
10
DAUX
I
AUX audio serial data input pin (Connected to ground)
11
DFS
I
Double speed sampling mode pin
“L”: normal speed, “H”: double speed
ORed with serial control register if P/S = “L”
12 – 13
DEM1 – DEM0
I
De-emphasis pin
ORed with serial control register if P/S = “L” (Connected to ground)
14
TVDD
Connected to digital power supply.
15
D. 5V
Digital power supply pin
16
D. GND
Digital ground pin
17
PDN
I
Power-down & reset pin
When “L”, the AK4527 is powered-down and the control registers are reset to default state.
If the state of CAD0-1 changes, then the AK4527 must be reset by PDN.
18
ICKS2
I
Input clock select 2 pin. (Connected to ground)
19
ICKS1
I
Input clock select 1 pin. (Connected to digital power supply)
20
ICKS0
I
Input clock select 0 pin. (Connected to digital power supply)
21
CAD1
I
Chip address pin
Used during the serial control mode. (Connected to ground)
22
CAD0
I
Chip address pin
Used during the serial control mode. (Connected to ground)
23
LOUT3
O
Lch #3 analog output pin
24
ROUT3
O
Rch #3 analog output pin
25
LOUT2
O
Lch #2 analog output pin
26
ROUT2
O
Rch #2 analog output pin
27
LOUT1
O
Lch #1 analog output pin
28
ROUT1
O
Rch #1 analog output pin
29
LIN–
I
Lch analog negative input pin
30
LIN+
I
Lch analog positive input pin
• IC1008  AK4527  A/D, D/A CONVERTER (DIGITAL BOARD)
Pin No.
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