Sony STR-DE1075 Service Manual ▷ View online
53
STR-DE1075
•
DIGITAL BOARD IC1601 CXD9616R (AUDIO DSP2)
Pin No.
Pin Name
I/O
Description
1
VDDI
—
Power supply terminal (+2.5V)
2
EXTIN
I
Not used (fixed at “L”)
3, 4
WMD1, WMD0
I
External memory wait mode setting terminal (fixed at “H”)
5
MOD1
I
Mode select signal input terminal “L”: 384fs, “H”: 256fs
6
MOD0
I
Mode select signal input terminal “L”: single chip mode, “H”: can not use
7
VSS
—
Ground terminal
8
XRST
I
Reset signal input from the system controller (IC1703)
9
VSS
—
Ground terminal
10
SCKOUT
O
Serial clock signal output to the D/A converter (IC1201, 1202)
11
VDDI (PLL)
—
Power supply terminal (+2.5V) (for PLL)
12
SYNC
I
Sync/unsync select signal input terminal “L”: sync
13 to 15
PAGE2 to PAGE0
O
External memory page select signal output terminal Not used (open)
16
PLOCK
O
Internal PLL lock signal output teminal Not used (open)
17
BTACK
I
Boot mode display signal output teminal Not used (open)
18
VDDE
—
Power supply terminal (+3.3V)
19
VSS
—
Ground terminal
20 to 22
D31 to D29
I/O
Two-way data bus with the S-RAM (IC1602)
23
A17
O
Address signal output terminal Not used (open)
24
VSS
—
Ground terminal
25
SDO3
O
Audio serial data output to the D/A converter (IC1201)
26
SDO4
O
Audio serial data output to the D/A converter (IC1202)
27, 28
SDI1, SDI2
I
Audio serial data input from the audio DSP1 (IC1501)
29
LRCKI1
I
L/R sampling clock signal input from the audio DSP1 (IC1501)
30
VSS
—
Ground terminal
31, 32
D28, D27
I/O
Two-way data bus with the S-RAM (IC1602)
33
A16
O
Address signal output terminal Not used (open)
34
A15
O
Address signal output to the S-RAM (IC1602)
35
SDI3
I
Audio serial date input from the audio DSP1 (IC1501)
36
L2
—
Not used (open)
37
VDDI
—
Power supply terminal (+2.5V)
38
BCKI1
I
Bit clock signal input from the audio DSP1 (IC1501)
39
SDI4
I
Audio serial data input from the audio DSP1 (IC1501)
40
MS
I
Master/slave active select terminal “L”: internal clock, “H”: erternal clock (fixed at “L”)
41, 42
A14, A13
O
Address signal output to the S-RAM (IC1602)
43, 44
D26, D25
I/O
Two-way data bus with the S-RAM (IC1602)
45
VSS
—
Ground terminal
46
BCKI2
I
Bit clock signal input terminal Not used (open)
47, 48
FS2, FS1
I
Sampling frequency select signal input terminal Not used (open)
49
SPDIF
I
S/PDIF output terminal Not used (open)
50
A12
O
Address signal output to the S-RAM (IC1602)
51 to 53
D24 to D22
I/O
Two-way data bus with the S-RAM (IC1602)
54
VDDE
—
Power supply terminal (+3.3V)
55
VSS
—
Ground terminal
56 to 58
D21 to D19
I/O
Two-way data bus with the S-RAM (IC1602)
59
A11
O
Address signal output to the S-RAM (IC1602)
54
STR-DE1075
Pin No.
Pin Name
I/O
Description
60, 61
SDO1, SDO2
O
Audio serial data output to the D/A converter (IC1201)
62
KFSIO
I/O
Audio clock signal (384fs/256fs) in/out terminal
63
LRCKO
O
L/R sampling clock signal output to the D/A converter (IC1201, 1202)
64
BCKO
O
Bit clock signal output to the D/A converter (IC1201, 1202)
65
VDDI
—
Power supply terminal (+2.5V)
66
VSS
—
Ground terminal
67, 68
D18, D17
I/O
Two-way data bus with the S-RAM (IC1602)
69, 70
A10, A9
O
Address signal output to the S-RAM (IC1602)
71
CAS
O
Column address strobe signal output terminal Not used (open)
72
RAS
O
Row address strobe signal output terminal Not used (open)
73
VDDI
—
Power supply terminal (+2.5V)
74
HDIN
I
Host serial data input from the system contrller (IC1703)
75
HCLK
I
Host clock signal input from the system contrller (IC1703)
76
HCS
I
Host chip select input from the system contrller (IC1703)
77, 78
A8, A7
O
Address signal output to the S-RAM (IC1602)
79
D16
I/O
Two-way data bus with the S-RAM (IC1602)
80
D15
I/O
Two-way data bus terminal Not used (open)
81
VSS
—
Ground terminal
82
HDOUT
O
Host serial data input from the system contrller (IC1703)
83
HACN
O
Host acknowledge signal output to the system controller (IC1703)
84
CSO
O
Chip select signal output to the S-RAM (IC1602)
85
WEO
O
Write enable signal output to the S-RAM (IC1602)
86
A6
O
Address signal output to the S-RAM (IC1602)
87 to 89
D14 to D12
I/O
Two-way data bus terminal Not used (open)
90
VDDE
—
Power supply terminal (+3.3V)
91
VSS
—
Ground terminal
92 to 94
D11 to D9
I/O
Two-way data bus terminal Not used (open)
95
A5
O
Address signal output to the S-RAM (IC1602)
96
VDDI
—
Power supply terminal (+2.5V)
97
TCK
I
Emulation clock signal input terminal Not used (open)
98
TDI
I
Emulation data input terminal Not used (open)
99
TDO
O
Emulation data input terminal Not used (open)
100
TMS
I
Emulation data input start/end select Not used (open)
101
XTRST
I
Emulation break signal input terminal Not used (open)
102
VSS
—
Ground terminal
103, 104
D8, D7
I/O
Two-way data bus terminal Not used (open)
105, 106
A4, A3
O
Address signal output to the S-RAM (IC1602)
107, 108
GP10, GP9
—
Not used (open)
109
VDDI
—
Power supply terminal (+2.5V)
110
GP8
—
Not used (open)
111
GP7
I
Serial clock signal input terminal
112
GP6
—
Not used (open)
113, 114
A2, A1
O
Address signal output to the S-RAM (IC1602)
115, 116
D6, D5
I/O
Two-way data bus terminal Not used (open)
117
VSS
—
Ground terminal
118, 119
GP5, GP4
—
Not used (open)
55
STR-DE1075
Pin No.
Pin Name
I/O
Description
120
GP3
O
Error signal output to the system controller (IC1703)
121
NC
—
Not used (open)
122
A0
O
Address signal output to the S-RAM (IC1602)
123 to 125
D4 to D2
I/O
Two-way data bus terminal Not used (open)
126
VDDE
—
Power supply terminal (+3.3V)
127
VSS
—
Ground terminal
128, 129
D1, D0
I/O
Two-way data bus terminal Not used (open)
130
GP2
—
Not used (open)
131
GP1
I
Clock signal input from the digital audio interface receiver (IC1408)
132
GP0
I
Serial clock signal input terminal
133
SDCLK
O
Not used (open)
134
CLKEN
O
Not used (open)
135
DQM
O
Not used (open)
136
EXLOCK
I
External lock signal input from the system controller (IC1703)
137
VDDI
—
Power supply terminal (+2.5V)
138
VSS
—
Ground terminal
139
MCLK2
O
System clock output terminal (13.5MHz)
140
PM
I
PLL initialize signal input from the system controller (IC1703)
141
BST
I
Boot strap signal input from the system controller (IC1703)
142
BOOT
I
Boot mode control signal input terminal Not used (fixed at “L”)
143
TST
I
Not used (fixed at “L”)
144
MCLK1
I
System clock output terminal (13.5MHz)
56
STR-DE1075
•
DIGITAL BOARD IC1703 MB91154PMT2-G-102-E1 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
H.P IN
I
Headphone detect signal input from the HP jack (J749) “H”: active
2
SP A RY
O
Front speaker A relay drive signal output terminal “H”: relay on
3
H/P RY
O
Headphone relay drive signal output terminal “H”: relay on
4
WOOFER RY
O
Woofer speaker relay drive signal output terminal “H”: relay on
5
REAR RY
O
Rear speaker drive signal output terminal “H”: relay on
6
CENTER RY
O
Center and surround back speakers drive signal output terminal “H”: relay on
7
2ND AUDIO RY
O
2nd audio relay drive signal output terminal “H”: relay on
8
PRE RY
O
Pre relay drive signal output terminal “H”: relay on
9
VSS
—
Ground terminal
10
SB RY
I
Center and surround back speakers drive signal output terminal “H”: relay on
11
C.JOG
I
Jog dial pulse input from the RV1901 (jog dial) A phage input
12
C.JOG
I
Jog dial pulse input from the RV1901 (jog dial) B phage input
13
F.JOG
I
Jog dial pulse input from the RV1801 (FUNCTION) A phage input
14
F.JOG
I
Jog dial pulse input from the RV1801 (FUNCTION) B phage input
15
V.JOG
I
Jog dial pulse input from the RV1802 (MASTER VOLUME) A phage input
16
V.JOG
I
Jog dial pulse input from the RV1802 (MASTER VOLUME) B phage input
17
SP.SW
I
Speaker ON/OFF signal input terminal “L”: speaker on
18
POWER.RY
O
Power relay drive signal output terminal “H”: relay on
19
TUNER AUTO STOP
I
Tuned display auto stop detect signal input from the FM/AM tuner unit “L”: active
20
TUNER MUTE
O
Muitng control signal output to the FM/AM tuner unit “L”: muting
21
DATA
O
Serial data output to the FM/AM tuner unit, LED drive (IC1602), function switch (IC101,
102, 105, 201) and electrical volume (IC401, 501, 601, 701)
102, 105, 201) and electrical volume (IC401, 501, 601, 701)
22
CLK
O
Serial data transfer clock signal output to the FM/AM tner unit, LED drive (IC1602), function
switch (IC101, 102, 105, 201) and electrical volume (IC401, 501, 601, 701)
switch (IC101, 102, 105, 201) and electrical volume (IC401, 501, 601, 701)
23
TUNER DATA IN
I
PLL data input from the FM/AM tuner unit
24
F. SW LAT
O
Serial data latch pulse output to the function switch (IC101, 102, 105, 201) and electrical
volume (IC401, 501, 601, 701) “H”: active
volume (IC401, 501, 601, 701) “H”: active
25
TUNER STEREO
I
FM stereo detection signal input from the FM/AM tuner unit “L”: stereo
26
VSS
—
Ground terminal
27
VCC
—
Power supply terminal (+3.3V)
28
RDS DATA
O
RDS sireal data output terminal Not used (fixed at “L”)
29
VIDEO SW1
O
Video select signal output to the video switch (IC308) and S-VIDEO switch (IC750, 752)
30
VIDEO SW2
O
Video select signal output to the video switch (IC308) and S-VIDEO switch (IC750, 752)
31
VIDEO SW3
O
Video select signal output to the video select switch (IC308) and S-VIDEO select switch
(IC750, 752)
(IC750, 752)
32
VIDEO SW4
O
Video select signal output to the video select switch (IC308) and S-VIDEO select switch
(IC750, 752)
(IC750, 752)
33
VSYNC
I
Vertical synchronized signal input terminal Not used (fixed at “L”)
34
P/N
O
NTSC/PAL select signal output terminal “L”: NTSC, “H”: PAL (fixed at “L”)
35
HDOUT1
I
Host serial data input from the audio DSP1 (IC1501)
36, 37
OPT B, OPT A
O
Digital input select signal output to the select switch (IC1406)
38
LED CE
O
Chip enable signal output to the LED driver (IC1602)
39
LED CLR
O
Clear signal output to the LED driver (IC1602)
40
TUNER LAT
O
Tuner latch signal output to the FM/AM tuner unit
41
M STATUS
O
STATUS (M BUS) control signal output to the select switch (IC751)
42
D.POWER
O
Power ON/OFF control signal output terminal (digital section power)
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