Sony STR-DA6400ES Service Manual ▷ View online
STR-DA6400ES
STR-DA6400ES
29
29
SECTION 6
DIAGRAMS
6-1. BLOCK DIAGRAM - CONTROL Section -
: AUDIO (ANALOG)
: AUDIO (DIGITAL)
: AUDIO (DIGITAL)
1 D3
3 D1
2 D2
3 D1
2 D2
15 D4
10
A1
11
A0
9
A2
5
Y
OPTICAL
RECEIVER
IC2201
OPTICAL
RECEIVER
IC2202
OPTICAL
RECEIVER
IC2203
OPTICAL
RECEIVER
IC241
14 D5
WAVE
SHAPER
IC2209
J2201
DIGITAL OUT
SWITCH
IC2206
5
DSEL1
4
DSEL0
6
DSEL2
7
REQ
11
CLK
12
LA
T
13
OE
DIGITAL
ASSIGNABLE
(INPUT ONLY)
14
S-IN
2 RX0
10 RX6/UI
8 RX4
4 RX2
1 RXOUT
SI_A
21
RDATA
17
RBCK
20
RLRCK
27
XMCK
16
RMCK
DIR_NONAU
33
AUDIO/VO
DIGITAL AUDIO INTERFACE RECEIVER
IC2208
INPUT
SELECTOR
IC2207
DATA DECODER
IC2210
39
CE
37
DO
36
RERR
56
DIR ERROR
D595 LA
T
D595 OE
55
65 64
DIR DO
54
DIR CE (LA
T)
34
CKST
59
DIR CKST
41
XMODE
53
DIR XMODE (RESET)
168
FSRA
TE1
COM1-CLK
COM1-DA
T
40
CL
COM1-CLK
D1001
38
DI
COM1-DA
T
COM2 DATA
COM1 DATA
COM1 CLK
67
66
66
FUNC LAT 94
MIC ON 15
COM2 CLK
COM1-DA
T
COM1-CLK
16
SYSTEM CONTROLLER
IC2513 (1/4)
MD
OPTICAL OUT
VIDEO 1
OPTICAL IN
OPTICAL
RECEIVER
IC2204
MD
OPTICAL IN
4 D0
OPTICAL
RECEIVER
IC2225
TV
OPTICAL IN
SAT
OPTICAL IN
TAPE
OPTICAL IN
SA-CD/CD
COAXIAL IIN
5 RX3
BD
COAXIAL IN
DVD
COAXIAL IIN
VIDEO 2 IN/
PORTABLE AV IN
DIGITAL (OPT)
D1002
D1005
D1004
D1003
72
HDMI-ERROR
60
MCK_X1/X2_SEL
32
SPDIF/DSD_SEL
10
9
ANA/DIGI
ERR
79 PREOUT RY
17
5
PREOUT-RY
85 HP-RY
80
SP-A-RY
81
SP-B-RY
82
C-RY
83
SB-RY
84
REAR-RY
SP-A-RY
SP-B-RY
SP-B-RY
C-RY
SB-RY
SR-RY
20 HP IN
HPSW
4
PROTECTOR
PROTECTOR
75
86
86
4/8 RY
4/8_RY
HP-RY
172
XM-DA_LAT
XM_DACLAT
FUNC-LAT
MIC
MIC
COM2_CLK
COM2_DATA
VOL LAT 77
78
93
92
93
92
96
95
95
2ND RELAY
CCD_RY
2ND-RY
3RD RELAY
3ND-RY
CCD_RY
VOL-LAT
COM1_CLK
COM1_DATA
63
24MHz
FUNC2_LAT 102
FUNC2_LAT
D.MIX-LAT 76
DMIX_LAT
OPTICAL
TRANSCEIVER
IC2205
15
DSP_SEL
1
ANA/DIGI
XIN
29
XOUT
28
X2201
24.576MHz
FM 75
Ω
COAXIAL
AM
ANTENNA
TUNER (FM/AM)
TUN-L
TUN_DO
TUN_CE
TUNED
TU-L
3
110 TUN_DO
107 TUN_LAT
106 TUNED
106 TUNED
TUN_DATA
108 TUN_DATA
TUN_CLK
109 TUN_CLK
TUN-R
R-CH
R-CH
ADFL
HDMI_ERROR
19 AINL
AINR
BCK
LRCK
LRCK
MCK
16
6
3
3
1
A/D CONVERTER
IC2217
D OUT 2
BUFFER
IC2211
2 A0
3 B0
3 B0
SD0
6 B1
SD1
5 A1
SI_B
D/A MCK
BCK
LRCK
DIR-ERR
MCK
DATA SELECTOR
IC2213
Y0 4
SI_C
Y1 7
SI_D
Y2 9
SI_E
Y3 12
SELECT 1
14 A3
A2
11
DATA SELECTOR
IC2212
Y3 12
Y2 9
A1
5
B1
6
B2
10
B3
HDMI_MCK
HDMI_LRCK
HDMI_BCK
HDMI_BCK, HDMI_LRCK,
HDMI_MCK
HDMI_MCK
13
Y1 7
7
6
51
8
36
1
SELECT
1
SELECT
1
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
2 A0
3 B0
3 B0
HDMI_SPDIF
6 B1
5 A1
DATA SELECTOR
IC2228
Y0 4
Y1 7
10 B2
SD2
11 A2
13 B3
SD3
NON_LPCM
14 A3
2 A0
3 B0
3 B0
6 B1
5 A1
DATA SELECTOR
IC2214
Y0 4
Y1 7
Y2 9
SELECT 1
10 B2
11 A2
COM2_CLK
COM2_DATA
15
CLOCK
SWITCH
IC2226
RDS_DATA
RDS_CLK
111 RDS_DATA
165 RDS_CLK
(AEP, UK)
(Page 35)
(Page 42)
(Page 39)
(Page 35)
(Page 31)
(Page 33)
(Page 32)
(Page 32)
(Page 32)
(Page 34)
(Page 30)
(Page 31)
(Page 31)
(Page 37)
(Page 36)
Ver. 1.1
STR-DA6400ES
STR-DA6400ES
30
30
6-2. BLOCK DIAGRAM - DSP Section -
DSP1
IC5002
DPSIB
DPSIA
DPSID
DPSIC
DPSOB
DPSOA
DPSOD
DPSOC
DPSIE
DPDVBCK
DPDVLRCK
P_ERROR
SPIDS A11
FLAG0 F2
RESET B10
DPBCK
DPLRCK
DPLRCK
D5001
FLAG1
DPFSCK
NONAUDIO
DPFSCK
NONAUDIO
SI_B
SI_A
SI_D
SI_C
SI_E
BCK
LRCK
DIR-ERR
MCK
DIR_NONAU
DSP1_MOSI
93
DSP1_MISO
92
RDA
TA0
1
DSP1_SPICLK
94
DSP1_SPIDS
11
DSP1_INT
83
DSP1_RESET
12
DSP1_BOOTCFG0
13
DSP1_BOOTCFG1
DSP1_MOSI
DSP1_MISO
DSP1_SPICLK
DSP1_SPIDS
DSP1_INT
DSP1_RESET
DSP1_BOOTCFG0
DSP1_BOOTCFG1
14
DSP2_BOOTCFG0
25
DSP2_BOOTCFG1
26
SF2_DSP2_MAS
17
SF2_CPU_CE
20
DSP2_MOSI
100
DSP2_MISO
99
DSP2_SPICLK
101
DSP2_SPIDS
21
DSP2_INT
84
DSP2_RESET
DSP2_BOOTCFG0
DSP2_BOOTCFG1
9
DSP2_SIB_SEL
10
P_ERROR
SF2_DSP2_MAS
SF2_CPU_CE
DSP2_MOSI
DSP2_MISO
DSP2_SPICLK
DSP2_SPIDS
DSP2_INT
DSP2_RESET
22
DSP CONTROLLER
IC5208
BOOTCFG1 C1
XIN 58
XOUT 57
DSP1_SPIDS
DSP1_SPICLK
DSP1_MOSI
DSP1_MISO
DSP1_BOOTCFG1
DSP1_INT
DSP1_RESET
BOOTCFG0 C2
DSP1_BOOTCFG0
SPICLK B9
MOSI A9
MISO A10
X5202
12.5MHz
: AUDIO (DIGITAL)
SIGNAL PATH
DSP2
IC5202
DPSIC
DPSIB
DPSIE
DPSIA
DPSIA
DPSID
DPSOB
DPSOA
DPSOD
DPSOC
DPDVBCK
DPDVLRCK
SPIDS A11
FLAG0 F2
RESET B10
SF2_DSP2_CE
SPICLK
MOSI
CE#
1
SCK
6
SI
5
SO
2
FLIP-FLOP
IC5212
SF2_CPU_CE
SF2_DSP2_MAS
DSP2_MOSI
DSP2_MISO
DSP2_SPICLK
BUFFER
IC5211
SERIAL FLASH
IC5213
DSP2_SPIDS
DSP2_INT
DSP2_RESET
C1
DSP2_BOOTCFG1
BOOTCFG0
BOOTCFG1
C2
DSP2_BOOTCFG0
DPBCK
DPLRCK
DPLRCK
FLAG1
DPFSCK
DPFSCK
P_ERROR
DPSOE
SI3
102
SO3
103
SDA
SCL
SCL
41
MD_BUSY
63
MD_INT
82
DM_BUSY
64
MD2
52
DRST_TRG
36
XRESET
55
D232C_RX
D232C_TX
DUCOM SDA
MD_BUSY
MD_INT
DM_BUSY
MD2
DRST_TRG
DUCOM_RESET
DUCOM SCL
42
SDO2
SDO1
SDO4
SDO3
LRCK
BCK
20
9
19
18
AD8 – AD15
ALE
LE
N2
M2
N3
11
DAI_P4 N10
S-RAM
IC5007
IC5007
CE#
ADDRESS LATCH
IC5010
IC5012
ADDRESS LATCH
IC5009
AD0 – AD7
LE
11
FLASH MEMORY
IC5006
O6 13
26
CE
8
OE
37
WE#
11
WE
15
OE#
28
RESET#
I/O0 – I/O7
DQ0 – DQ7
D0 – D7
D0 – D6
O0 – O7
O0 – O4
DQ15/A-1,
A0 – A18,
NC (A19)
A0 – A18,
NC (A19)
A0 – A18
12
ALE
DAI_P1
AD0 – AD7
LE
11
S-RAM
IC5207
IC5207
OE
ADDRESS LATCH
IC5210
ADDRESS LATCH
IC5209
RD
AD8 – AD15
LE
WR
11
DSP1_A16
41
WE
17
P10
M13
M14
M14
L14
K14
P14
K14
P14
G14
H13
H13
F1
DAI_P4
F14
F13
P11
P12
P13
P12
P13
H14
J14
N2
N3
M2
M2
B9
A9
A9
SF2_DSP2_MAS P9
MISO A10
E14
P7
P14
M13
M14
M14
L14
K14
K14
G14
H13
H13
F1
F14
F13
F13
P11
P10
P12
P13
N14
P13
N14
H14
J14
E14
X5001
12.288MHz
XTAL
CLKIN
B4
A2
X5201
25MHz
XTAL
CLKIN
B4
A2
WR
RD
RD
11 3A
10 3B
10 3B
3 1B
2 1A
DATA SELECTOR
IC5013
3Y 9
1Y 4
2Y 7
SELECT 1
6 2B
5 2A
D0 – D7
A0 – A16
I/O0 – I/O7
I/O8 – I/O15
O0 – O7
D0 – D7
O0 – O7
N10
(Page 29)
(Page 31)
(Page 31)
(Page 31)
STR-DA6400ES
STR-DA6400ES
31
31
6-3. BLOCK DIAGRAM - DIGITAL AUDIO Section -
52
DA-MUTE
51
50
49
TA-LA
T
TA-SIO
TA-RST
131
INITX
STB +3.3V
126
RST_TRG
RESET SIGNAL
BUFFER
IC2509
SYSTEM MUTING
SWICTH
Q2205, 2206
ERR
ANA/DIGI
ANA/DIGI
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
: AUDIO (DIGITAL)
: AUDIO (ANALOG)
SYSTEM CONTROLLER
IC2513 (2/4)
SD-RAM
IC2224
LIP SYNC ADJUST
IC2223
5 DIB
4 DIA
20
DOB
19
DOA
DOD
WEN
A0 – A10, BA
DQ0 – DQ15
CSN
SI
SCLK
DMUTEN
RSTN
SIO
XCS
DOC 21
22
43
40
40
3
2
2
10
9
14
15
11
15
11
8
BCK
LRCK
27
VOUT1
11 DATA2
12 DATA3
13 DATA4
12 DATA3
13 DATA4
7 BCK
8 LRCK
8 LRCK
5 SCK
4 SDA
DEV_I2C2_SDA
1 ZR1
DAC_ZERODATA
3 SCL
DEV_I2C2_SCL
26
VOUT2
LOW-PASS
FILTER
IC2222
D/A-L
R-CH
22
VOUT3
21
VOUT4
LOW-PASS
FILTER
IC2221
D/A-SL
R-CH
16
VOUT7
15
VOUT8
LOW-PASS
FILTER
IC2219
D/A-SBL
R-CH
20
VOUT5
19
VOUT6
LOW-PASS
FILTER
IC2220
D/A-C
D/A-SW
D/A CONVERTER
IC2218
64
COM1_DATA
COM1_CLK
COM1_CLK
17
24MHz
63
10
6 DATA1
SDO2
20
21
RX232C
TX232C
30
D232C_RX
D232C_TX
D232C_TX
18
NET-UART_NET/M
NET-UART_M/NET
NET-UART_SEL
71
SDO1
7 DID
6 DIC
SDO4
SDO3
DATA SELECTOR
IC2506
2C0 10
2C2 12
1Y 7
2C1 11
B
2
2
A
14
5 1C2
9 2Y
4 1C1
BCKI
MCKI
MCKI
D/A MCK
RESET
SWITCH
IC2512
RESET SIGNAL
GENERATOR
IC2510
J1499
RS-232C
2
3
RS-232C DRIVER
IC1499
T1OUT 14
R1IN 13
T1IN
11
232C-MIN 134
R1OUT
12
LEVEL SHIFT
IC2504
232C-MOUT 135
232C-SEL2 170
232C-SEL1
MD2 128
15
18
18
WE
CS
CS
27
30
31
HA
TS AMCK_SEL
HA
TS MIDDLE
HA
TS RESET
29
HA
TS MUTE
DSP M-D BUSY
46
DSP M-D INT
33
DSP D-M BUSY
47
DSP UCOM MODE
35
DSP UCOM END-FLAG
34
DSP_UCOM_RESET
48
MD_BUSY
MD_INT
DUCOM SDA
6
DUCOM SCL
7
DUCOM SDA
DUCOM SCL
DM_BUSY
MD2
DRST_TRG
DUCOM_RESET
19
CASN
RASN
RASN
42
41
41
16
17
17
CAS
RAS
RAS
CLKO
CKE
30
29
29
35
34
34
CLK
CKE
CKE
DQM 31
36
14
14
UDQM
LDQM
LDQM
A0 – A11
DQ1 – DQ16
FIELD PROGRAMMABLE
GATE ARRAY
IC2003
42 SD1IN
40 SD0IN
18
31
31
45 SD3IN
43 SD2IN
BCKIN
LRCKIN
LRCKIN
25
SD1OUT
24
SD0OUT
9
7
7
28
SD3OUT
27
SD2OUT
BCKOUT
LRCKOUT
4
AMCKOUT
17
MCLKIN
88
SCL
72
SDA
22
AMCKIN
SD-RAM
IC2002
XWE
A0 – A10
D0 – D15
XCS
81
76
76
15
18
18
XWE
BA0
74
19
BA0
XCS
XCAS
XRAS
XRAS
80
79
79
16
17
17
XCAS
XRAS
XRAS
CLK
CKE
CKE
143
144
144
35
34
34
CLK
CKE
LDQM
86
14
LDQM
UNQM
142
36
UDQM
FLASH MEMORY
IC2004
∗DCLK
∗nCS0
∗nCS0
15
2
6
1
1
DCLK
nCS
∗DATA0
14
2
DATA
∗ASD0
1
5
ASDI
A0 – A10
DQ0 – DQ15
21
57
MIDDLE
XRESET
65
MUTE
3
MUTEOUT
MUTING
SWITCH
SWITCH
IC2227
CLOCK
SELECT
IC2005
CLOCK
BUFFER
IC2006
X2001
22.5792MHz
90
SYSCLK
BUFFER
IC2216
DATA SELECTOR
IC2507
1Y 7
2C0
2C1
10
11
5 1C1
9
61
2Y
6 1C0
BUFFER
IC2505
OUT3 5
IN1 1
IN2 6
IN2 6
3 IN3
7 OUT1
2 OUT2
2 OUT2
A
14
(Page 30)
(Page 30)
(Page 29)
(Page 29)
(Page 41)
(Page 29)
(Page 36)
(Page 30)
(Page 34)
(Page 38)
STR-DA6400ES
STR-DA6400ES
32
32
6-4. BLOCK DIAGRAM - HDMI Section (1/2) -
• SIGNAL PATH
: AUDIO (DIGITAL)
: VIDEO
VIDEO SYSTEM CONTROLLER
IC3610 (1/3)
CN3501
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 5
CN3502
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 4
(for AUDIO)
CN3503
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 3
CDT0P
CDT0N
CDT0N
CDT1P
CDT1N
CDT1N
CDT2P
CDT2N
CDT2N
CCLKP
CCLKN
CCLKN
52
51
51
7
9
9
55
54
54
4
6
6
58
57
57
1
3
3
49
48
48
10
DATA0+
DATA0–
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
15
HDMI INPUT
SELECTOR
IC3503
45
46
46
71
70
70
7
9
9
74
73
73
4
6
6
77
76
76
1
3
3
68
67
67
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
15
63
19
64
9
8
8
7
9
9
12
11
11
4
6
6
15
14
14
1
3
3
6
5
5
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
CEC
13
12
16
15
15
SDA_C
2
SCL_C
3
HDMI RECEIVER
IC3511
(1/2)
HDMI TRANSMITTER
IC3513
34
35
35
40
39
39
YDT0P 31
YDT0N
YDT1P
YDT1N
YDT2P
YDT2N
YCLKP
YCLKN
32
44
43
43
28
29
29
48
47
47
25
26
26
52
R0XC+
R0XC–
R0XC–
R0X0+
R0X0–
R0X0–
R0X1+
R0X1–
R0X1–
R0X2+
R0X2–
R0X2–
DSDA0
DSCL0
51
33
R0PWR5V
35
DSCL1
29
DSDA1
28
R1PWR5V
DSCL
DSDA
30
34
CSDA
CSCL
26
27
SCL_SINK 38
SDA_SINK 39
HPD_SINK 40
OUTDIS 42
SELA 23
SELB 22
SELC 21
1444_SELB1
100
1444_SELA1
99
1444_OEB1
94
1444_HPD1
93
101
1444_SELC1
1444_SELB[1]
1444_SELA[1]
1444_OEB[1]
1444_HPD[1]
1444_SELC[1]
1444_SELB[1]
1444_SELA[1]
1444_OEB[1]
1444_HPD[1]
1444_SELC[1]
DATA SELECTOR
IC3508
EEPROM
IC3509
2Y3
4
2Y1
5
1Y3
11
1Y1
14
3
2–COM
13
1–COM
5 SDA
6 SCL
10
A
9
B
7
WP
8
TX_RST1
30
CEC_SEL
172
TX_INT1
123
TX_RST2
170
TX_INT2
169
UC3V_SCL
118
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SDA,
UC3V_SCL
117
EDIO_SEL1
EDIO_SEL0
173
REPEA
T_P
ATH_SEL
9
2Y0
1
1Y0
12
+5V POWER SELECT
IC3526
1Y1
14
1Y2
15
2Y1
5
2Y2
2
13
1–COM
3
2–COM
9
B
10
A
1Y3
11
2Y3
+5V POWER 3
+5V POWER 2
+5V POWER 1
+5V POWER 2
+5V POWER 1
4
Q0 – Q15
98 – 90,
86 – 80
D0 – D15
79 – 77
75 – 67,
63 – 56
D16 – D35
ODCK 5
HSYNC 20
VSYNC 21
DE
FLI_ODCK[1]
FLI_ODCK[2]
HSYNC
VSYNC
DE
19
SPDIF 78
SD0 –SD3
4
4
4
MCLK 89
SCK 86
WS 85
IDCK
88
HSYNC
2
VSYNC
3
DE
1
81 –84
SPDIF
DL0, DR1,
DL1, DR2
DL1, DR2
4
DL2
21
SD0 – SD3
MCLK
5
SCK
11
WS
10
DCLK
15
DR0
16
9 – 6
17 – 20
TX0+ 34
TX0– 33
TX0– 33
7
9
9
TX1+ 37
TX1– 36
TX1– 36
4
6
6
TX2+ 40
TX2– 39
TX2– 39
1
3
3
TXC+ 31
TXC– 30
TXC– 30
10
HPD
DATA0+
DATA0–
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
SCL (5V)
HOT PLUG DET
CEC
51
19
12
16
15
15
13
DSDA 47
DSCL 46
INT 24
RESET# 25
CSDA 49
CSCL 48
CEC DATA
SWITCH
Q2501 – 2504
CN3511
HDMI
ASSIGNABLE
(INPUT ONLY)
OUT A
TX_INT[1]
TX_RST[1]
TX_INT[1]
TX_RST[1]
TX_INT[2]
TX_RST[2]
CEC_RX
HDMI_SPDIF
HDMI_LRCK
HDMI_MCK
HDMI_BCK
SD0 –SD3
HDMI_BCK, HDMI_LRCK,
HDMI_MCK
HDMI_SPDIF
95
94
XTALIN
XTALOUT
X3501
28.322MHz
32
33
8
SD0
HDMI_SPDIF
SD0
SD2
SD2
SD1
SD1
SD3
SD3
1
36
CEC_TX
24
RX_HSYNC
RX_VSYNC
RX_DE
RX_ODCK[3]
D[2] – D[1
1],
D[14], D[15],
31
37
75
19
19
44
62
HPD_C
BDT0P
BDT0N
BDT0N
BDT1P
BDT1N
BDT1N
BDT2P
BDT2N
BDT2N
BCLKP
BCLKN
BCLKN
SDA_B
SCL_B
SCL_B
HPD_B
ADT0P
ADT0N
ADT0N
ADT1P
ADT1N
ADT1N
ADT2P
ADT2N
ADT2N
ACLKP
ACLKN
ACLKN
SDA_A
SCL_A
SCL_A
HPD_A
80
+5V_SELB
96
+5V_SELA
95
BUFFER
IC3525
LEVEL SHIFT
Q3501
LEVEL SHIFT
Q3500
BUFFER
IC3524
D[16] – D[23],
D[26] – D[35]
Q[2] – Q[1
1],
Q[14], Q[15],
Q[16] – Q[23],
Q[26] – Q[35]
16 – 13,
10 – 7,
3 – 1,144,
141 – 138
BUS
SWITCH
IC3858
BUS
SWITCH
IC3859
CLOCK GENERATOR
IC3862
RELAY DRIVE
IC3860
135 – 132,
129 – 126,
123 – 120,
117 – 1
14,
11
1 – 108
Q16 – Q35
RY3601
HDMI TRANSMITTER
IC3514
UC3V_SCL
UC3V_SDA
98 – 90,
86 – 80
D0 – D15
79 – 77
75 – 67,
63 – 56
D16 – D35
4
4
IDCK
88
HSYNC
2
VSYNC
3
DE
1
SPDIF
DL0, DR1,
DL1, DR2
DL1, DR2
4
DL2
21
SD0 –SD3
MCLK
5
SCK
11
WS
10
DCLK
15
DR0
16
9 – 6
17 – 20
TX0+ 34
TX0– 33
TX0– 33
7
9
9
TX1+ 37
TX1– 36
TX1– 36
4
6
6
TX2+ 40
TX2– 39
TX2– 39
1
3
3
TXC+ 31
TXC– 30
TXC– 30
10
HPD
DATA0+
DATA0–
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
SCL (5V)
HOT PLUG DET
51
19
12
16
15
15
DSDA 47
DSCL 46
INT 24
RESET# 25
CSDA 49
CSCL 48
CN3512
HDMI
ASSIGNABLE
(INPUT ONLY)
OUT B
TX_INT[2]
TX_RST[2]
REF
1
CLK1 3
CLK3 5
CLK2 2
CLOCK SELECT
IC3864
2D+
3
1D+
1
1D–
2
2D–
4
S
9
D+ 8
D– 7
D– 7
D–VIDEO BUS
(Page 33)
(Page 33)
(Page 33)
(Page 34)
(Page 41)
(Page 34)
(Page 29)
(Page 29)
(Page 29)
Click on the first or last page to see other STR-DA6400ES service manuals if exist.