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Model
STR-DA5600ES
Pages
127
Size
19.3 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
str-da5600es.pdf
Date

Sony STR-DA5600ES Service Manual ▷ View online

STR-DA5600ES
STR-DA5600ES
33
33
5-4.  BLOCK  DIAGRAM - HDMI Section (1/2) -
‡6,*1$/3$7+
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:$9(
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(Page 30)
(Page 34)
(Page 34)
(Page 34)
(Page 35)
(Page 43)
(Page 35)
STR-DA5600ES
STR-DA5600ES
34
34
5-5.  BLOCK  DIAGRAM - HDMI Section (2/2) -
VIDEO SYSTEM CONTROLLER
IC3610 (2/4)
AUDIO MUTE REQ
D3502
D3512
HDMI_ERROR
BUFFER
IC3518
13
TX 5VPWR1
TX_5VPWR1
82
HDSEL_POWER
HDSEL_POWER
15
TX 5VPWR2
TX_5VPWR2
20
46
NON LPCM
45
2
‡ SI*NAL PATH
 AUDIO (DI*ITAL)
: VIDEO
CN3505
HDMI
ASSI*NABLE
(INPUT ONLY)
IN 2
CN3506
HDMI
ASSI*NABLE
(INPUT ONLY)
IN 1
CN852
HDMI IN 6
R0X0+
R0X0–
R0X1+
R0X1–
R0X2+
R0X2–
R0XC+
R0XC–
130
129
7
9
132
131
4
6
134
133
1
3
128
127
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLU* DET
18
CEC
13
12
16
15
HDMI RECEIVER
IC3511 (2/2)
40
39
139
138
7
9
141
140
4
6
143
142
1
3
137
136
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLU* DET
18
CEC
13
12
16
15
44
19
43
112
111
7
9
114
113
4
6
116
115
1
3
110
109
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLU* DET
18
CEC
CEC
13
12
16
15
DSDA0
32
DSCL0
31
INT
22
RESET#
21
RX INT
48 16
RX RST
13
19
19
38
42
R3X0+
R3X0–
R3X1+
R3X1–
R3X2+
R3X2–
R3XC+
R3XC–
DSDA3
DSCL3
HPD3
41 R3PWR5V
R2X0+
R2X0–
R2X1+
R2X1–
R2X2+
R2X2–
R2XC+
R2XC–
DSDA2
DSCL2
HPD2
37 R2PWR5V
LEVEL SHIFT
IC851
HDMI OUTPUT SELECTOR
IC3111
C8 de_a
A8 hsync_a
B8 vsync_a
A9 clk_a
out_o<0> – out_o<35>
36
HPD0
30
R0PWR5V
29
in_a<0> – in_a<35>
A7, C7, 
A6, B6, C6, 
A5, C5, C4, B4, 
A4, B3, 
A3,
C2, C1, D1, E1, D3, E2, E3, F3, F1, 
*
1, 
*
2, H1,
*
3, H3, 
-2, 
-3, 
-1, K1, L1, M1, K3, L2, L3, M3
B12 de_b
A12 hsync_b
A11 vsync_b
C9 clk_b
in_b<2> – in_b<1
1>,
in_b<14> – in_b<23>,
in_b<26> – in_b<35>
A14, B15, C12, C13, D14, C15, C16, D15, D16, E16,
F14, 
*
14, F16, 
*
16, H16, 
-16, H15, H14, 
-14, K14,
L16, M16, L14, M15, M14, N14, N16, P15, P16, R15
14
D–VIDEO BUS2
RX_VSYNC
RX_HSYNC
RX_DE
RX_ODCK[1]
Q[0] – Q[35]
19
D–VIDEO BUS3
FLI_VSYNC
FLI_HSYNC
FLI_DE
FLI_ODCK
D[2] – D[11],
D[14] – D[23],
D[26] – D[35]
36
30
P1, P2, R1, 
T2, R3, 
T3, P4, 
T4, N4, P5, N6, N7, R5, 
T5, P6, 
T6, P7, N8, 
T8, P8, N9, N10, P10, N1
1, P9, 
T10,
T1
1, R1
1, P1
1, P12, N12, P13, R13, 
T13, R14, 
T14
T9
clk_o<1>
T7
clk_o<0>
N3
vsync_o
N2
hsync_o
N1
de_o
16
D–VIDEO BUS4
S_VSYNC
S_HSYNC
S_DE
S_ODCK[1]
S_ODCK[2]
S[0] – S[35]
p_sel
D12
81
REPEA
T_P
ATH_SEL
p_th
D13
83
HSYNC_TH
reset
D9
80
HDSEL_RESET
*PIO3/
MUTEOUT 107
NON_LPCM
(Page 30)
(Page 33)
(Page 33)
(Page 33)
(Page 35)
(Page 45)
STR-DA5600ES
STR-DA5600ES
35
35
5-6.  BLOCK  DIAGRAM - DIGITAL VIDEO Section (1/2) -
VIDEO SYSTEM CONTROLLER
IC3610 (3/4)
VIDEO PROCESSOR1
IC3601
YAMAHA
 W
AIT_N
Faroudja UCOM BUSY
72
FSCLKP
D5
FSCLKN
C5
FLASH MEMORY
IC3615
SD-RAM
IC3618
A3P
AF4
C1P
AC1
B1P
AC2
C3P
AF5
CVBS OUT1
AIP_RAW_HS_CS AF12
AIP_RAW_VS AE12
MSTR1_SDA
CY OUT1
CB OUT1
2ND_CVBS
AND
GATE
IC3609
BUFFER
IC3620
PD0 – PD23, JT
AG_BS_TMS,
JT
AG_BS_TDO, GPIO_44,
JT
AG_BS_TDI, JT
AG_BS_RST
,
JT
AG_BS_TCK
N23 – N26, L23 – L26, K23 – K26,
J23, J24, G23 –G26, F23 – F26,
E23, E24, 
T24 – 
T26, R23 – R25
DCLK P24
DHS P25
DVS R26
FLI_ODCK
FLI_HSYNC
FLI_VSYNC
DEN P26
FLI_DE
C26 TCLK
F_D [0] – F_D [15]
F_A [1] – F_A [21]
FSDATA [16] – FSDATA [31]
FSADDR [0] – FSADDR [12]
FSADDR [0] – FSADDR [12]
FSCKE
C4
FSBKSEL0
C21
FSBKSEL1
C20
FSCS0
D21
FSRAS
C24
FSCAS
D24
FSWE
C23
FSDQM3
B22
FSDQM2
B17
FSDQS3
A22
45
46
44
26
27
24
23
22
21
20
47
16
A17
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
51
ROM_CS_N AD24
OCN_RE_N AC25
OCN_WE_N AC26
26
28
11
CE
OE
WE
12 RESET
FSDQS2 
SD-RAM
IC3602
FSDATA [0] – FSDATA [15]
CLKP
CLKN
CKE
FSBKSEL0
FSBKSEL1
FSCS0
RAS
CAS
WE
CLKP
CLKN
CKE
FSBKSEL0
FSBKSEL1
FSCS0
RAS
CAS
WE
FSDQM1
A11
FSDQM0
A6
FSDQS1
B11
45
46
44
26
27
24
23
22
21
20
47
16
B6
51
FSDQS0 
FSDATA16 – 
FSDATA31
FSDATA0 – 
FSDATA15
DQ0 – DQ15
A0 – A12
DQ0 – DQ15
A0 – A20
I/O0 –
I/O15
A0 –
A16
DQ0 – DQ15
A0 – A12
FSADDR0 – 
FSADDR12
OCMDATA0 – 
OCMDATA15
OCMADDR1 – 
OCMADDR21
137
136
HSYNC_N
VSYNC_N
SV1P AB2
SV2P AE1
SV3P AE4
103
104
105
R
G
B
W
AIT_N
23
YAMAHA
 INT_N
INT_N
25
YAMAHA
 RESET
YAMAHA
 CE
RESET_N
39
CS_N
28
WR_N
29
RD_N
30
Faroudja Power DETECT
71
MSTR1_SCL A3
Faroudja UCOM UART TX
150
OCM_UDI_1 B3
MAIN Faro wake
73
LBADC_IN1 AF10
Faroudja UCOM UART RX
151
OCM_UDO_1 B2
Faroudja UCOM RESET
70
RESET AD9
56
96
IREF
106
67
15 – 22
D0 – D7
106 – 121
SRAM IO0 – SRAM IO7,
SRAM IO8/Y
AMAHA
 D0 –
SRAM IO15/Y
AMAHA
 D7
122 – 131, 134 – 141
YAMAHA
 PS0,
SRAM A0/Y
AMAHA
 PS1,
SRAM A1/Y
AMAHA
 PS2,
SRAM 
A2 – SRAM 
A16
33 – 31
PS0 – PS2
DIR
1
XOE
19
87
BUFFER
IC3619
XOE
19
YAMAHA_D [0] –
YAMAHA_D [7]
YAMAHA_A [0] –
YAMAHA_A [2]
SRAM CE
CE
6
86
SRAM LB,WE
1
95
SRAM_UB,WE/Y
AMAHA
 WR_N
2
94
SRAM OE,UB,LB/Y
AMAHA
 RD_N
93
3
10 9
8
12 13
11
17
40
39
WE
UB
LB
41
OE
DD [8] – DD [15]
DD [0] – DD [15]
DD [0] – DD [15]
A [0] – 
A [2]
A [0] – 
A [17]
A [1] – 
A [17]
FLASH MEMORY
IC3603
EEPROM
IC3621
34
13
74
73
OE
WE
MOE_N
MWE_N
Y_D [0] – Y_D [15]
Y_A [0] – Y_A [23]
OSD CONTROLLER
IC3604
142
141
XOUT
XIN
X3601
33.2MHz
S-RAM
IC3611
DATA BUS
DATA BUS
ADDRESS BUS
DA
TA
 BUS
ADDRESS
BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
A1P
AB1
CR OUT1
A2P
AF1
B2P
AE2
C2P
AF2
CR
CB
Y/G
14 RESET
22
B3P
AE5
EXT VIDEO
44
23 P_HSYNC
50 S_HSYNC
24 P_VSYNC
49 S_VSYNC
V
Y/G
RESET
33
39
CVBS  IN1
CY  IN1
CB/R 38
CB  IN1
CR/B 37
CR  IN1
FLI_HSYNC
FLI_VSYNC
FLI_DE
FLI_ODCK
4 – 9, 12, 13,
16 – 18, 26 – 30
Y0 – Y7, 
C0 – C7 
25 P_BLANK
48 S_BLANK
32 CLKIN_A
FREQUENCY
MULTIPLIER
IC3854
D/A CONVERTER
IC3850
2
8
5
IN
OUT2
FS1
24
SDA 21
UC3V_SDA
SCLK 22
UC3V_SCL
VIDEO DAC RESET
169
DAC CLOCK SEL
171
30
16
15
18
‡6,*1$/3$7+
: VIDEO
A2
MSTR0_SDA AA23
SDA
5
MSTR0_SCL AA24
SCL
6
D[2] – D[11],
D[14] – D[23],
D[26] – D[35] 
ADA
TA0 – 
ADA
TA23,
BDA
TA0 – BDA
TA5
B1, C1 – C3, D2, D3,
P1 – P3, R1 – R4, 
T1 – 
T4,
U1 – U4, V1 – V4, W1 – W4, 
Y4
IPCLK1
P4
AVS
Y1
AHS
Y2
RX_ODCK[3]
RX_VSYNC
RX_HSYNC
AHREF_DE
Y3
RX_DE
30
Q[2] – Q[11],
Q[14] – Q[23],
Q[26] – Q[35] 
D[16] - D[23],
D[28] - D[35] 
DQ0 – DQ15
A0 – A23
MD0 – MD15
MA1 – MA24
D-VIDEO BUS1
21
19
D-VIDEO BUS3
CONSTANT
CURRENT
CIRCUIT
Q3601, 3602
HDMI SYS +3.3V
OCM_UDO_0
W26
OCM_UDI_0
W25
FLI_CLK
FLI_UDO
FLI_UDI
23
(Page 33)
(Page 33)
(Page 34 )
(Page 42)
(Page 36)
(Page 39)
(Page 42)
STR-DA5600ES
STR-DA5600ES
36
36
5-7.  BLOCK  DIAGRAM - DIGITAL VIDEO Section (2/2) -
VIDEO SYSTEM CONTROLLER
IC3610 (4/4)
VIDEO PROCESSOR2
IC3606
2nd Faroudja UCOM BUSY
77
FSCLKP
D5
FSCLKN
C5
FLASH MEMORY
IC3627
SD-RAM
IC3624
A3P
AF4
C1P
AC1
B1P
AC2
A1P
AB1
CVBS OUT2
MSTR1_SDA
CY OUT2
CB OUT2
CR OUT2
PD8 – PD23
K23 – K26, J23, J24, 
G23 –G26, F23 – F26,
E23, E24
DCLK P24
DHS P25
DVS R26
DEN P26
C26 TCLK
X3602
19.6608MHz
ZF_D [0] – ZF_D [15]
ZZF_A [1] – ZZF_A [21]
ZFSDATA [16] – ZFSDATA [31]
ZFSADDR [0] – ZFSADDR [12]
ZFSADDR [0] – ZFSADDR [12]
FSCKE
C4
FSBKSEL0
C21
FSBKSEL1
C20
FSCS0
D21
FSRAS
C24
FSCAS
D24
FSWE
C23
FSDQM3
B22
FSDQM2
B17
FSDQS3
A22
45
46
44
26
27
24
23
22
21
20
47
16
A17
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
51
ROM_CS_N AD24
OCN_RE_N AC25
OCN_WE_N AC26
26
28
11
CE
OE
WE
12 RESET
FSDQS2 
SD-RAM
IC3607
ZFSDATA [0] – ZFSDATA [15]
ZCLKP
ZCLKN
ZCKE
ZFSBKSEL0
ZFSBKSEL1
ZFSZCS0
ZRAS
ZCAS
ZWE
ZCLKP
ZCLKN
ZCKE
ZFSBKSEL0
ZFSBKSEL1
ZFSZCS0
ZRAS
ZCAS
ZWE
FSDQM1
A11
FSDQM0
A6
FSDQS1
B11
45
46
44
26
27
24
23
22
21
20
47
16
B6
51
FSDQS0 
FSDATA16 – 
FSDATA31
FSDATA0 – 
FSDATA15
DQ0 – DQ15
A0 – A12
DQ0 – DQ15
A0 – A20
DQ0 – DQ15
A0 – A12
FSADDR0 – 
FSADDR12
OCMDATA0 – 
OCMDATA15
OCMADDR1 – 
OCMADDR21
2nd Faroudja Power DETECT
76
MSTR1_SCL A3
2nd Faroudja UCOM UART TX
154
OCM_UDI_1 B3
2nd Faro wake
78
LBADC_IN1 AF10
Faroudja UCOM UART RX
155
OCM_UDO_1 B2
2nd Faroudja UCOM RESET
75
RESET AD9
54
53
MAIN UCOM SDA 162
MAIN UCOM SCL 164
MAIN UCOM BUSY 163
VIDEO_UCOM_SDA
VIDEO_UCOM_SCL
VUCOM_BUSY
STOP IN 157
INIT
39
STOP
VUCOM_RST
ENDFLAG
52
VUCOM_FLG
MD0
40
VUCOM_MD
EEPROM
IC3628
42
43
XO
XI
X3603
4MHz
DATA BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
A2P
AF1
B2P
AE2
C2P
AF2
CR
CB
Y/G
29
28
26
44
23 P_HSYNC
50 S_HSYNC
24 P_VSYNC
49 S_VSYNC
V
Y/G
SDA
21
SCLK
22
RESET
33
39
CVBS  IN2
CY  IN2
CB/R 38
CB  IN2
CR/B 37
CR  IN2
HSYNC_Z
VSYNC_Z
DE_Z
ODCK_Z
4 – 9, 12, 13,
16 – 18, 26 – 30
Y0 – Y7, 
C0 – C7 
25 P_BLANK
48 S_BLANK
32 CLKIN_A
FREQUENCY
MULTIPLIER
IC3857
D/A CONVERTER
IC3855
2
8
5
IN
OUT2
FS1
27
2nd VIDEO DAC RESET
170
4052_SEL_A
174
4052_SEL_B
175
2nd DAC CLOCK SEL
172
16
16
‡ SIGNAL PATH
: VIDEO
A2
MSTR0_SDA AA23
SDA
5
MSTR0_SCL AA24
SCL
6
Z[16] – Z[23], Z[28] – Z[35] 
25
DATA SELECTOR
IC3630
Y-COM 3
X-COM 13
B
9
A
10
12 0X
14 1X
15 2X
1 0Y
5 1Y
2 2Y
OCM_UDO_0 W26
OCM_UDI_0 W25
UPDATE_SEL/D-VIDEO
UPDATE_D-VIDEO/SEL
30
Flash Update 
Tx
Flash Update Rx
DAC SCL
168
DAC SDA
166
CLOCK
BUFFER
IC3531
FLI_CLK
FLI_UDO
FLI_UDI
23
(Page 35)
(Page 43)
(Page 43)
(Page 45)
(Page 39)
(Page 42)
(Page 42)
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