Sony STR-DA5500ES Service Manual ▷ View online
STR-DA5500ES
STR-DA5500ES
25
25
5-4. BLOCK DIAGRAM - HDMI Section (1/2) -
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7;±
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(Page 26)
(Page 26)
(Page 27)
(Page 26)
(Page 34)
(Page 27)
(Page 22)
(Page 22)
(Page 22)
STR-DA5500ES
STR-DA5500ES
26
26
5-5. BLOCK DIAGRAM - HDMI Section (2/2) -
VIDEO SYSTEM CONTROLLER
IC3610 (2/3)
HDMI BUFFER
IC8305
AUDIO MUTE REQ
D3502
D3512
HDMI_ERROR
BUFFER
IC3518
13
TX 5VPWR1
TX_5VPWR1
82
HDSEL_POWER
HDSEL_POWER
15
TX 5VPWR2
TX_5VPWR2
53
46
7
SI*NAL PATH
AUDIO (DI*ITAL)
: VIDEO
CN3505
HDMI
ASSI*NABLE
(INPUT ONLY)
IN 2
CN3506
HDMI
ASSI*NABLE
(INPUT ONLY)
IN 1
CN8308
HDMI IN 6
R0X0+
R0X0–
R0X0–
R0X1+
R0X1–
R0X1–
R0X2+
R0X2–
R0X2–
R0XC+
R0XC–
R0XC–
130
129
129
7
9
9
132
131
131
4
6
6
134
133
133
1
3
3
128
127
127
10
DATA0+
DATA0–
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLU* DET
18
CEC
13
12
16
15
15
HDMI RECEIVER
IC3511 (2/2)
40
39
39
139
138
138
7
9
9
141
140
140
4
6
6
143
142
142
1
3
3
137
136
136
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLU* DET
18
CEC
13
12
16
15
15
44
19
43
112
111
111
7
9
9
114
113
113
4
6
6
116
115
115
1
3
3
110
109
109
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLU* DET
18
CEC
CEC
F-HDMI +3.3V
13
12
16
15
15
DSDA0
32
DSCL0
31
INT
22
RESET#
21
RX INT
48 16
RX RST
31
19
19
38
42
R3X0+
R3X0–
R3X0–
R3X1+
R3X1–
R3X1–
R3X2+
R3X2–
R3X2–
R3XC+
R3XC–
R3XC–
DSDA3
DSCL3
DSCL3
HPD3
41 R3PWR5V
R2X0+
R2X0–
R2X0–
R2X1+
R2X1–
R2X1–
R2X2+
R2X2–
R2X2–
R2XC+
R2XC–
R2XC–
DSDA2
DSCL2
DSCL2
HPD2
37 R2PWR5V
34
33
33
40
39
39
46
45
45
4
AP
AN
AN
BP
BN
BN
CP
CN
CN
DP
DN
DN
WP
WN
WN
XP
XN
XN
YP
YN
YN
ZP
ZN
ZN
3
23
24
24
20
21
21
16
17
17
13
14
14
LEVEL SHIFT
IC8306
HDMI OUTPUT SELECTOR
IC3111
C8 de_a
A8 hsync_a
B8 vsync_a
A9 clk_a
A8 hsync_a
B8 vsync_a
A9 clk_a
out_o<0> – out_o<35>
36
HPD0
30
R0PWR5V
29
+3.3V
RE*ULATOR
IC8307
in_a<0> – in_a<35>
A7, C7,
A6, B6, C6,
A5, C5, C4, B4,
A4, B3,
A3,
C2, C1, D1, E1, D3, E2, E3, F3, F1,
*
1,
*
2, H1,
*
3, H3,
-2,
-3,
-1, K1, L1, M1, K3, L2, L3, M3
B12 de_b
A12 hsync_b
A11 vsync_b
A12 hsync_b
A11 vsync_b
C9 clk_b
in_b<2> – in_b<1
1>,
in_b<14> – in_b<23>,
in_b<26> – in_b<35>
A14, B15, C12, C13, D14, C15, C16, D15, D16, E16,
F14,
*
14, F16,
*
16, H16,
-16, H15, H14,
-14, K14,
L16, M16, L14, M15, M14, N14, N16, P15, P16, R15
11
D–VIDEO BUS2
RX_VSYNC
RX_HSYNC
RX_DE
RX_ODCK[1]
Q[0] – Q[35]
12
D–VIDEO BUS3
FLI_VSYNC
FLI_HSYNC
FLI_DE
FLI_ODCK
D[2] – D[11],
D[14] – D[23],
D[26] – D[35]
D[14] – D[23],
D[26] – D[35]
36
30
P1, P2, R1,
T2, R3,
T3, P4,
T4, N4, P5, N6, N7, R5,
T5, P6,
T6, P7, N8,
T8, P8, N9, N10, P10, N1
1, P9,
T10,
T1
1, R1
1, P1
1, P12, N12, P13, R13,
T13, R14,
T14
T9
clk_o<1>
T7
clk_o<0>
N3
vsync_o
N2
hsync_o
N1
de_o
13
D–VIDEO BUS4
S_VSYNC
S_HSYNC
S_DE
S_ODCK[1]
S_ODCK[2]
S_ODCK[2]
S[0] – S[35]
p_sel
D12
81
REPEA
T_P
ATH_SEL
p_th
D13
83
HSYNC_TH
reset
D9
80
HDSEL_RESET
*PIO3/
MUTEOUT 107
(Page 22)
(Page 25)
(Page 27)
(Page 25)
(Page 25)
(Page 35)
STR-DA5500ES
STR-DA5500ES
27
27
5-6. BLOCK DIAGRAM - VIDEO PROCESSOR Section -
VIDEO SYSTEM CONTROLLER
IC3610 (3/3)
VIDEO PROCESSOR
IC3601
YAMAHA
W
AIT_N
Faroudja UCOM BUSY
72
FSCLKP
D5
FSCLKN
C5
FLASH MEMORY
IC3615
SD-RAM
IC3618
A3P AF4
C1P AC1
B1P AC2
A1P AB1
CVBS
AIP_RAW_HS_CS AF12
AIP_RAW_VS AE12
MSTR1_SDA
CY
CB
CR
AND
GATE
IC3609
BUFFER
IC3620
PD0 – PD23, JT
AG_BS_TMS,
JT
AG_BS_TDO, GPIO_44,
JT
AG_BS_TDI, JT
AG_BS_RST
,
JT
AG_BS_TCK
L23 – L26, N23 – N26, K23 – K26,
J23, J24, G23 –G26, F23 – F26,
E23, E24,
T24 –
T26, R23 – R25
DCLK
P24
DHS
P25
DVS
R26
FLI_ODCK
FLI_HSYNC
FLI_VSYNC
FLI_VSYNC
DEN
P26
FLI_DE
C26
TCLK
X3602
19.6608MHz
F_D [0] – F_D [15]
F_A [1] – F_A [21]
FSDATA [16] – FSDATA [31]
FSADD [0] – FSADD [12]
FSADD [0] – FSADD [12]
FSCKE
C4
FSBKSEL0
C21
FSBKSEL1
C20
FSCS0
D21
FSRAS
C24
FSCAS
D24
FSWE
C23
FSDQM3
B22
FSDQM2
B17
FSDQS3
A22
45
46
44
26
27
24
23
22
21
20
47
16
46
44
26
27
24
23
22
21
20
47
16
A17
CLK
/CLK
CKE
BA0
BA1
BA1
CS
RAS
CAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
/CLK
CKE
BA0
BA1
BA1
CS
RAS
CAS
CAS
WE
LDM
UDM
LDQS
UDQS
51
ROM_CS_N AD24
OCN_RE_N AC25
OCN_WE_N AC26
26
28
11
28
11
CE
OE
WE
OE
WE
12 RESET
FSDQS2
SD-RAM
IC3602
FSDATA [0] – FSDATA [15]
CLKP
CLKN
CKE
FSBKSEL0
FSBKSEL1
FSBKSEL1
FSCS0
RAS
CAS
CAS
WE
CLKP
CLKN
CKE
FSBKSEL0
FSBKSEL1
FSCS0
RAS
CAS
WE
FSDQM1
A11
FSDQM0
A6
FSDQS1
B11
45
46
44
26
27
24
23
22
21
20
47
16
46
44
26
27
24
23
22
21
20
47
16
B6
51
FSDQS0
FSDATA16 –
FSDATA31
FSDATA31
FSDATA0 –
FSDATA15
FSDATA15
DQ0 – DQ15
A0 – A12
DQ0 – DQ15
A0 – A20
I/O0 –
I/O15
A0 –
A16
DQ0 – DQ15
A0 – A12
FSADDR0 –
FSADDR12
FSADDR12
OCMDATA0 –
OCMDATA15
OCMADDR1 –
OCMADDR21
137
136
136
HSYNC_N
VSYNC_N
VSYNC_N
SV1P AB2
SV2P AE1
SV3P AE4
SV2P AE1
SV3P AE4
103
104
105
104
105
R
G
B
G
B
W
AIT_N
23
YAMAHA
INT_N
INT_N
25
YAMAHA
RESET
YAMAHA
CE
RESET_N
39
CS_N
28
WR_N
29
RD_N
30
Faroudja Power DETECT
71
MSTR1_SCL A3
Faroudja UCOM UART TX
150
OCM_UDI_1 B3
MAIN Faro wake
73
LBADC_IN1 AF10
Faroudja UCOM UART RX
151
OCM_UDO_1 B2
Faroudja UCOM RESET
70
RESET AD9
56
96
IREF
106
67
15 – 22
D0 – D7
106 – 121
SRAM IO0 – SRAM IO7,
SRAM IO8/Y
AMAHA
D0 –
SRAM IO15/Y
AMAHA
D7
122 – 131, 134 – 141
YAMAHA
PS0,
SRAM A0/Y
AMAHA
PS1,
SRAM A1/Y
AMAHA
PS2,
SRAM
A2 – SRAM
A16
33 – 31
PS0 – PS2
DIR
1
XOE
19
87
BUFFER
IC3619
XOE
19
YAMAHA_D [0] –
YAMAHA_D [7]
YAMAHA_D [7]
YAMAHA_A [0] –
YAMAHA_A [2]
YAMAHA_A [2]
SRAM CE
CE
6
86
SRAM LB,WE
1
95
SRAM_UB,WE/Y
AMAHA
WR_N
2
94
SRAM OE,UB,LB/Y
AMAHA
RD_N
93
3
10 9
8
12 13
11
17
40
39
WE
UB
LB
41
OE
Flash Update Rx
54
Flash Update Tx
53
MAIN UCOM SDA 162
MAIN UCOM SCL 164
MAIN UCOM BUSY 163
DD [8] – DD [15]
DD [0] – DD [15]
DD [0] – DD [15]
A [0] –
A [2]
A [0] –
A [17]
A [1] –
A [17]
VIDEO_UCOM_SDA
VIDEO_UCOM_SCL
VUCOM_BUSY
VIDEO_UCOM_SCL
VUCOM_BUSY
STOP IN 157
INIT
39
STOP
VUCOM_RST
ENDFLAG
52
VUCOM_FLG
MD0
40
VUCOM_MD
FLASH MEMORY
IC3603
EEPROM
IC3621
34
13
13
74
73
73
OE
WE
WE
MOE_N
MWE_N
Y_D [0] – Y_D [15]
Y_A [0] – Y_A [23]
OSD CONTROLLER
IC3604
142
141
XOUT
XIN
X3601
33.2MHz
42
43
XO
XI
X3603
4MHz
S-RAM
IC3611
IC3611
DATA BUS
DATA BUS
ADDRESS BUS
DA
TA
BUS
ADDRESS
BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
A2P AF1
B2P AE2
C2P AF2
CR
CB
Y/G
14 RESET
26
NON LPCM
45
NON_LPCM
51
38
B3P AE5
EXT_IN
UC3V_SCL
UC3V_SDA
44
23 P_HSYNC
50 S_HSYNC
24 P_VSYNC
49 S_VSYNC
50 S_HSYNC
24 P_VSYNC
49 S_VSYNC
V
Y/G
SDA
21
SCLK
22
RESET
33
39
CVBS OUT1
CY OUT1
CB/R 38
CB OUT1
CR/B 37
CR OUT1
FLI_HSYNC
FLI_VSYNC
FLI_DE
FLI_ODCK
DAC_CLK_SEL
VDAC_RESET
4 – 9, 12, 13,
16 – 18, 26 – 30
Y0 – Y7,
C0 – C7
25 P_BLANK
48 S_BLANK
48 S_BLANK
32 CLKIN_A
FREQUENCY
MULTIPLIER
IC3854
D/A CONVERTER
IC3850
2
8
5
IN
OUT2
FS1
41
VIDEO DAC RESET
169
4052_SEL_A
174
4052_SEL_B
175
DAC CLOCK SEL
171
DAC_CLK_SEL
VDAC_RESET
30
16
32
UC3V_SDA,
UC3V_SCL
33
SIGNAL PATH
: VIDEO
A2
MSTR0_SDA AA23
SDA
5
MSTR0_SCL AA24
SCL
6
D[2] – D[11],
D[14] – D[23],
D[26] – D[35]
D[14] – D[23],
D[26] – D[35]
ADA
TA0 –
ADA
TA23,
BDA
TA0 – BDA
TA5
B1, C1 – C3, D2, D3,
P1 – P3, R1 – R4,
T1 –
T4,
U1 – U4, V1 – V4, W1 – W4,
Y4
IPCLK1
P4
AHS
Y1
AVS
Y2
RX_ODCK[1]
RX_HSYNC
RX_VSYNC
RX_HSYNC
RX_VSYNC
AHREF_DE
Y3
RX_DE
30
Q[2] – Q[11],
Q[14] – Q[23],
Q[26] – Q[35]
Q[14] – Q[23],
Q[26] – Q[35]
D[16] - D[23],
D[28] - D[35]
D[28] - D[35]
DQ0 – DQ15
A0 – A23
MD0 – MD15
MA1 – MA24
D-VIDEO BUS1
70
12
D-VIDEO BUS3
REFERENCE
VOLTAGE
REGULATOR
Q001, 002
HDMI SYS +3.3V
DATA SELECTOR
IC3630
0X 13
0Y 1
1X 14
1Y 5
B
9
9
A
10
13 X-COM
3 Y-COM
RX232C
TX232C
TX232C
30
OCM_UDO_0 W26
OCM_UDI_0 W25
(Page 25)
(Page 26)
(Page 30)
(Page 33)
(Page
33)
(Page
25)
(Page
24)
(Page
22)
(Page
34)
STR-DA5500ES
STR-DA5500ES
28
28
5-7. BLOCK DIAGRAM - ANALOG AUDIO Section (1/2) -
20
MD OUT
L
J430
J660 (1/2)
PHONO
IN
TAPE
IN
J550
J620 (2/2)
J262 (1/2)
EQ AMP
IC440
BUFFER
IC672
BUFFER
IC520
BUFFER
IC540
BUFFER
IC560
BUFFER
IC620
R-CH
R-CH
R-CH
R-CH
R-CH
R-CH
R-CH
R-CH
6 TAPE IN
5 TUNER
23 TAPE IN
8 MD IN
21 MD IN
11 V1 IN
18 V1 IN
10 TV
19 TV
11 V1 IN
18 V1 IN
10 TV
19 TV
4 V2
25 V2
26 MIC
17
OUT
12
OUT
17
OUT
J650 (2/2)
J241
MD
OUT
AUTO
CAL MIC
R-CH
ADFL
AUDIO INPUT SELECTOR
IC402
5
V1 OUT
J620 (1/2)
MIC AMP
IC703
LINE AMP
Q708
R-CH
15
DATA
14
CLK
6
16
LAT
DATA
CLK
FUNC_LAT
MIC
SI*NAL PATH
R-CH LV RPLWWHG GXH WR VDPH DV L-CH
AUDIO (ANALO*)
R
L
R
J650 (1/2)
MD
IN
BUFFER
IC640
R-CH
L
R
L
R
L
R
L
R
L
R
L
R
SAT
AUDIO
IN
BD
AUDIO
IN
DVD
AUDIO
IN
BUFFER
IC600
R-CH
L
R
VIDEO 1
AUDIO
IN
VIDEO 1
AUDIO
OUT
L
R
22
TAPE OUT
J660 (2/2)
TAPE
OUT
R-CH
L
R
L
R
TU-L
3
BUFFER
IC261
2ND-R
Y
LINE AMP
IC622
XML
43
SIRUS_L
44
DM-L1
42
EWK_L
72
L
J470 (1/2)
ZONE 2
AUDIO OUT
R-CH
R-CH
R
RELAY DRIVE
TR506
RY506
24 TUNER
2 SACD/CD
27 SACD/CD
SOURCE-L
SA-CD/CD-L
2ND-L
62
AUDIO BUS
12
OUT
6 TAPE IN
5 TUNER
23 TAPE IN
8 MD IN
21 MD IN
11 V1 IN
18 V1 IN
10 TV
19 TV
11 V1 IN
18 V1 IN
10 TV
19 TV
4 V2
25 V2
AUDIO INPUT SELECTOR
IC392
15
DATA
14
CLK
16
LAT
DATA
CLK
FUNC2_LAT
3RD-RY
LINE AMP
IC480
L
J470 (2/2)
ZONE 3
AUDIO OUT
R-CH
R-CH
R
RELAY DRIVE
TR486
RY486
24 TUNER
2 SACD/CD
27 SACD/CD
8 DM1
10 XM
19 XM
19 XM
7 SLULXV
22 SLULXV
6 PHONO
23 PHONO
4 SAT
25 SAT
12
OUT
17
OUT
AUDIO INPUT SELECTOR
IC401
15
DATA
14
CLK
16
LAT
DATA
CLK
FUNC_LAT
21 DM1
3 DVD
26 DVD
2 BD
27 BD
11 EWK
18 EWK
11 EWK
18 EWK
8 DM1
10 XM
19 XM
19 XM
7 SLULXV
22 SLULXV
6 PHONO
23 PHONO
4 SAT
25 SAT
21 DM1
3 DVD
26 DVD
2 BD
27 BD
11 EWK
18 EWK
11 EWK
18 EWK
AUDIO INPUT SELECTOR
IC391
15
DATA
14
CLK
16
LAT
DATA
CLK
FUNC2_LAT
LINE AMP
IC590
TV
IN
VIDEO 2 IN
AUDIO
(Page 34)
(Page 30)
(Page 34)
(Page 30)
(Page
22)
(Page
29)
(Page 22)
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