Sony STR-DA2000ES / STR-DB2000 Service Manual ▷ View online
77
STR-DA2000ES/DB2000
IC2862
CXD9725M
– CIS Board –
IC871
ADM3222ARU-REEL
11
NC
14
NC
12
T2IN
10 R2OUT
9 R2IN
R2
R1
8 T2OUT
7 V-
6 C2-
5 C2+
4 C1-
3 V+
2 C1+
VCC
1 EN
T2
13
T1IN
15
R1OUT
16
R1IN
17
T1OUT
18
GND
19
VCC
20
SD
T1
TRIM VOLUME
0-+24dB/
1dB STEP
TRIM VOLUME
0-+24dB/
1dB STEP
5 to 25 DECODER
&
LATCH CIRCUIT
4 to 13 DECODER
&
LATCH CIRCUIT
4 to 16 DECODER
&
LATCH CIRCUIT
24 BIT
SHIFT REGISTER
CIRCUIT
LEVEL SHIFT
CIRCUIT
5 to 25 DECODER
&
LATCH CIRCUIT
4 to 13 DECODER
&
LATCH CIRCUIT
4 to 16 DECODER
&
LATCH CIRCUIT
2
VSS
3
TRIM
4
TRIM
5
TRIM
6
OUT
7
VRGND
9
VRIN
8
NC
11
CS1
10
NC
14
NC
1
NC
12
GND
13
CLK
26 TRIM
25 TRIM
24 TRIM
23 OUT
22 VRGND
20 VRIN
21 NC
28 NC
18 CS2
19 NC
15 NC
17 LAT
16 DATA
26 VDD
MAIN
VOLUME
0- –95dB/
0.5dB STEP
MAIN
VOLUME
0- –95dB/
0.5dB STEP
78
STR-DA2000ES/DB2000
– DISPLAY Board –
IC1001
M66003-921FP
2
CS
1
RESET
3
SCK
4
SDATA
9
SEG34
10
SEG33
11
SEG32
12
SEG31
13
SEG30
14
SEG29
15
SEG28
16
SEG27
7
XIN
6
XOUT
5
VSS
8
VCC1
SERIAL
RECEPTION
CIRCUIT
DISPLAY
CONTROL
CIRCUIT
DIGIT
OUTPUT
CIRCUIT
CIRCUIT
CODE RAM
(60 CHARACTOR)
CLOCK
GENERATOR
CIRCUIT
25
S
EG19
24
S
EG20
23
S
EG21
22
S
EG22
21
S
EG23
20
S
EG24
19
S
EG25
18
VCC2
17
S
EG26
32
S
EG12
31
S
EG13
30
S
EG14
29
S
EG15
28
S
EG16
27
S
EG17
26
S
EG18
33 SEG11
34 SEG10
35 SEG9
36 SEG8
37 SEG7
38 SEG6
39 SEG5
40 SEG4
41 SEG3
42 SEG2
43 SEG1
44 SEG0
CGROM
(166 CHARACTOR)
CGRAM
(16 CHARACTOR)
SEGMENT
OUTPUT
CIRCUIT
CIRCUIT
45 SEG35
46 DIG17/SEG36
47 DIG16/SEG37
48 DIG15/SEG38
CODE/
COMMAND
CONTROL
CIRCUIT
DIGIT/
SEGMENT
OUTPUT
CIRCUIT
CIRCUIT
53
DIG10
54
DIG9
55
DIG8
56
DIG7
57
DIG6
58
DIG5
59
DIG4
60
DIG3
61
DIG2
62
DIG1
63
DIG0
64
VP
49
DIG14/SEG39
50
DIG13/SEG40
51
DIG12/SEG41
52
DIG11/SEG42
35
35
8
8
79
STR-DA2000ES/DB2000
6-53.
IC PIN FUNCTION DESCRIPTION
•
MULTI-VIDEO BOARD IC1241 MB90089F-G-238-BND (OSD DRIVER)
Pin No.
Pin Name
I/O
Description
1
YIN
I
Y (luminance) signal input terminal
2
CIN
I
C (color) signal input terminal
3
VIN
I
Composite video signal input terminal
4
AVCC
—
Power supply terminal (+5V) (for analog system)
5
FSCO
O
Internal color burst phase display signal output terminal Not used
6
VBLK
O
Vertical blanking period signal output terminal Not used
7
VCC
—
Power supply terminal (+5V)
8
EXS
I
Input terminal from the clock generator for external color burst connected to crystal vibrator
(NTSC: 14.31 MHz terminal, PAL: 17.734 MHz)
(NTSC: 14.31 MHz terminal, PAL: 17.734 MHz)
9
XS
O
Output terminal from the clock generator for external color burst connected to crystal vibrator
(NTSC: 14.31 MHz, PAL: 17.734 MHz) Not used
(NTSC: 14.31 MHz, PAL: 17.734 MHz) Not used
10
HSYNC
O
Horizontal sync signal output terminal Not used
11
VSYNC
O
Vertical sync signal output terminal Not used
12
EXHSYN
I
External horizontal sync signal input terminal Not used
13
EXVSYN
I
External vertical sync signal input terminal Not used
14
VSS
—
Ground terminal
15
EXD
I
Dot clock generator connecting terminal for display
16
XD
O
Dot clock generator connecting terminal for display
17
VOB
O
Character and background period signal output terminal Not used
18 to 20
VOC2 to VOC0
O
Color signal output terminal Not used
21
TEST
I
Setting terminal for the test “L”: test (normally: fixed at “H”)
22
SCLK
I
Serial data transfer clock signal input from the main system controller
23
SIN
I
Serial data input from the main system controller
24
CS
I
Serial data latch pulse signal input from the main system controller
25
VOUT
O
Composite video signal output terminal
26
COUT
O
C (color) signal output terminal
27
YOUT
O
Y (luminance) signal output terminal
28
AVSS
—
Ground terminal (for analog system)
80
STR-DA2000ES/DB2000
•
DIGITAL BOARD IC2201 CXD9718Q (DSP)
Pin No.
Pin Name
I/O
Description
1
VSS
—
Ground terminal
2
XRST
I
System reset signal input from the main system controller “L”: reset
3
EXTIN
I
Master clock signal input terminal Not used
4
LRCKI3
I
L/R sampling clock signal (44.1 kHz) input terminal Not used
5
VDDI
—
Power supply terminal (+2.6V)
6
BCKI1
I
Bit clock signal (2.8224 MHz) input terminal Not used
7
PLOCK
O
Internal PLL lock signal output terminal Not used
8
VSS
—
Ground terminal
9
MCLK1
I
System clock input terminal (13.5 MHz)
10
VDDI
—
Power supply terminal (+2.6V)
11
VSS
—
Ground terminal
12
MCLK2
O
System clock output terminal (13.5 MHz)
13
MS
I
Master/slave setting terminal “L”: internal clock, “H”: external clock
Fixed at “L” in this set
Fixed at “L” in this set
14
SCKOUT
O
Internal system clock output terminal Not used
15
LRCKI1
I
L/R sampling clock signal (44.1 kHz) input from the A/D converter and digital audio interface
receiver
receiver
16
VDDE
—
Power supply terminal (+3.3V)
17
BCKI1
I
Bit clock signal (2.8224 MHz) input from the A/D converter and digital audio interface receiver
18
SDI1
I
Audio serial data input from the A/D converter
19
LRCKO
O
L/R sampling clock signal (44.1 kHz) output terminal
20
BCKO
O
Bit clock signal (2.8224 MHz) output terminal
21
VSS
—
Ground terminal
22
KFSIO
I
Audio clock signal (12.288 MHz) input from the digital audio interface receiver
23 to 26
SDO1 to SDO4
O
Audio serial data output to the GPR
27
SPDIF
O
SPDIF signal output terminal Not used
28
LRCKI2
I
L/R sampling clock signal (44.1 kHz) input from the A/D converter and digital audio interface
receiver
receiver
29
BCKI2
I
Bit clock signal (2.8224 MHz) input from the A/D converter and digital audio interface receiver
30
SDI2
I
Audio serial data input from the digital audio interface receiver
31
VSS
—
Ground terminal
32
HACN
O
Acknowledge signal output to the main system controller
33
HDIN
I
Serial data input from the main system controller
34
HCLK
I
Serial data transfer clock signal input from the main system controller
35
HDOUT
O
Serial data output to the main system controller
36
HCS
I
Chip select input from the main system controller
37
GP12
I
Write signal input from the main system controller
38
GP13
O
Not used
39
GP14
O
Not used
40
VDDI
—
Power supply terminal (+2.6V)
41
VSS
—
Ground terminal
42
GP15
O
Not used
43
DQM/OE0
O
Output terminal of data input/output mask Not used
44
CS0
O
Chip select signal output to the S-RAM
45
WE0
O
Write enable signal output to the S-RAM
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