Sony SRS-NWGU50 Service Manual ▷ View online
SRS-NWGU50
SRS-NWGU50
13
13
4-7. SCHEMATIC DIAGRAM - PANEL Section -
BOARD
(1/2)
MAIN
A
CN100
BOARD
MAIN
CN300
(2/2)
B
BOARD
MAIN
CN301
(2/2)
C
3.3
3.3
3
D+
22P
(WM-PORT)
6
D-
RESERVE
5
CN400
5P
CN500
GND
4
RESERVE
7
V_IN
8
RXD
9
AD
10
TXD
11
USB_DET
12
UNREG_OUT
13
AU-L_IN
14
AU-L_OUT
15
AU-COM
16
AU-R_IN
17
AU-R_OUT
18
VIDEO_GND
19
VIDEO_OUT
20
DC_IN
21
DIGITAL
22
GND
1
GND
2
4.7k
R400
0
FB400
FB401
FB402
FB403
FB404
FB405
FB406
0
FB407
47
R600
D400
D401
D402
PAT001
PAT002
PAT003
PAT004
PAT005
PAT006
PAT007
PAT008
PAT009
L_OUT
WM_TXD
WM_RXD
V_BUS
GND
GND
COM
R_OUT
F_GND
DOCK BOARD
LED BOARD
S500
S501
D500
SML-D12M8WT86SM
D501
SML-D12D8WT86SQ
POWER_LED
3
FUNCTION_SW
4
POWER_SW
5
GND
1
LINE_LED
2
7P
CN600
VOL BOARD
S600
S601
D600
SML-D12V8WT86SM
IC600
NJL21V400A-M
C601
100p
R601
100
D601
SML-D12D8WT86SQ
MUTE_LED
3
R_OUT
4
VOL+_SW
5
VOL-_SW
6
R_VCC
7
GND
1
BASS_LED
2
C600
10
GND VCC
OUT
2
3
1
IC600
REMOTE CONTROL
RECEIVER
/
/
INPUT
INPUT
VOL -
VOL +
BASS
%
4
B
6
D
3
5
C
F
1
E
8
G
A
2
7
(Page 10)
(Page 11)
(Page 11)
SRS-NWGU50
SRS-NWGU50
14
14
• IC Block Diagrams
– MAIN Board –
IC101 SI-8008TM-TLS
IC102, 103 NJM2521V (TE2)
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
ON/OFF
SOFT
START
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
ADJ
5
SOFT
ST
AR
T
VOUT
VCC
VIN3 (MUTE)
1
2
3
4
5
6
7
GND
BUFFER
VIN1
VIN2
SW1
SW2
8
BIAS
IC105 TK11133CSCL-G
IC106 TK11150CSCL-G
IC106 TK11150CSCL-G
CONTROL
CIRCUIT
BANDGAP
REFERENCE
+
–
OVER HEAT &
OVER CURRENT
PROTECTION
1
VCONT
3
NP
2
GND
4
VOUT
5
VIN
IC108 PCM1808PWR
DELTA-SIGMA
MODULATOR
DELTA-SIGMA
MODULATOR
ANTIALIAS
LOW-PASS FILTER
ANTIALIAS
LOW-PASS FILTER
AGND
VCC
2
3
3
VDD
DGND
4
5
5
LRCK 7
REFERENCE
u1/64
DECIMATION
FILTER
WITH
HIGH-PASS
FILTER
SERIAL
INTERFACE
&
MODE/FORMAT
CONTROL
FMT
12
VINR
14
VINL
13
MD1
11
MD0
10
DOUT
9
BCK
8
CLOCK & TIMING CONTROL
POWER
SUPPLY
SUPPLY
SCKI 6
VREF 1
IC109 TAS5706PAPR
SERIAL
AUDIO
PORT
7 ABQs
PDAP
MIXERS BASS
MANAGEMENT
MICROCONTROLLER
BASED SYSTEM
CONTROL
SAMPLE RATE
AUTODETECT
AND PLL
SERIAL
CONTROL
TERMINAL CONTROL
4th
ORDER
NOISE
SHAPER
AND
PWM
2 ABQ
HIGH
PRECISION
VOLUME
SRC
SDIN1
25
SDIN2
24
VR_DIG
27
DVSS
26
SCLK
23
LRCLK
22
MUTE
21
DVSS
20
OSC_RES
19
VREG_EN
18
PDN
17
SCL
29
SDA
28
STEST
31
HPSEL
30
TEST2
BYPASS
AGND
VCLAMP_CD
BST_D
AVCC
BST_A
VCLAMP_AB
BST_B
PVCC_B
PVCC_B
PVCC_B
OUT_B
PVCC_C
BST_C
OUT_C
PVCC_C
OUT_C
32
56
57
54
55
55
58
59
60
61
60
61
62
63
63
64
52
53
50
51
49
7 ABQs
R
SUB
L
BQ
DRC
DRC
LOUDNESS
BQ
2x HB
FET OUT
2x HB
FET OUT
CLICK AND POP
CONTROL
DVDD
33
MCLK
34
BKND_ERR
35
VALID
36
HPL_PWM
37
HPR_PWM
38
SUB_PWM-
39
SUB_PWM+
40
PVCC_D
41
PVCC_D
42
PGND_D
43
PGND_D
44
OUT_D
45
OUT_D
46
PGND_C
47
PGND_C
48
OUT_B
1
PGND_B
2
PGND_B
3
OUT_A
4
OUT_A
5
PGND_A
6
PGND_A
7
PVCC_A
8
PVCC_A
9
AVDD
10
AVSS
11
PLL_FLTM
12
PLL_FLTP
13
VR_ANA
14
DVDD
15
RESET
16
SRS-NWGU50
15
IC110 TK11128CSCL-G
5
1
2
3
REG
4
VOLTAGE
CONTROL
COMP
VIN
VOUT
CONTROL
GND
NOISE
BYP
ASS
A1 3
VCCA 1
GND 2
B1
4
XOE
5
LOGIC
LEVEL
LEVEL
CONVERTER
VCCB
6
IC302 PST3660UL
–
+
Vref
1
GND
2
VDD
4 OUT
3 CD
IC111 TC7SP3125TU (5RSO, F
SRS-NWGU50
16
• IC Pin Function Description
MAIN BOARD IC300 R5F3640DDA04FAR-128 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1 to 3
NO USE
-
Not used
4
SIRCS_IN
I
SIRCS signal input from the remote control receiver
5 to 7
NO USE
-
Not used
8
BYTE
I
External data bus width selection signal input terminal
9
CNVSS
I
Change processor mode setting signal input terminal
10, 11
NO USE
-
Not used
12
RESET
I
System reset signal input from the reset signal generator “L”: reset
13
XOUT
O
System clock output terminal (5 MHz)
14
VSS
-
Ground terminal
15
XIN
I
System clock input terminal (5 MHz)
16
VCC1
-
Power supply terminal (+3.3V)
17
NMI
I
Not used
18
DAMP_RESET
O
Reset signal output to the digital power amplifi er “L”: reset
19
DAMP_PDN
O
Power down signal output to the digital power amplifi er “L”: power down
20
AC_CUT
I
AC cut detection signal input terminal “L”: AC cut
21
DAMP_MUTE
O
Muting on/off control signal output to the digital power amplifi er “L”: muting on
22
DAMP_SCL
O
Serial data transfer clock signal output to the digital power amplifi er
23
DAMP_VALID
I
Valid signal input from the digital power amplifi er “H”: valid
24
DAMP_SDA
O
Serial data output to the digital power amplifi er
25 to 30
NO USE
-
Not used
31
TXD1
-
Not used
32
RXD1
-
Not used
33
CLK1
-
Not used
34
RTS1
-
Not used
35
WM-PORT_TX
O
Serial data output to the WM-PORT connector
36
WM-PORT_RX
O
Serial data input from the WM-PORT connector
37
WM-PORT_DET
I
WM-PORT connection detection signal input terminal “L”: WM-PORT is connected
38 to 45
NO USE
-
Not used
46
CE
-
Not used
47
I2C_DATA
-
Not used
48
I2C_CLK
-
Not used
49, 50
NO USE
-
Not used
51
PWR CTL
O
Power supply on/off control signal output terminal "H": power on
52 to 56
NO USE
-
Not used
57
DC_DET
O
Speaker DC detection signal input terminal “L”: DC detect
58 to 61
NO USE
-
Not used
62
VCC2
-
Power supply terminal (+3.3V)
63
NO USE
-
Not used
64
VSS
-
Ground terminal
65 to 68
LED_MUTING
O
LED drive signal output terminal for muting indicator “H”: LED on
69 to 72
LED_BASS
O
LED drive signal output terminal for BASS indicator “H”: LED on
73
NO USE
-
Not used
74
KEY_POWER
I
POWER key input terminal
75, 76
NO USE
-
Not used
77 to 80
LED_LINE
O
LED drive signal output terminal for INPUT indicator “H”: LED on
81 to 83
NO USE
-
Not used
84, 85
ASEL0, ASEL1
O
Audio input selection signal output terminal
86 to 88
NO USE
-
Not used
89 to 92
LED_POWER
O
LED drive signal output terminal for power indicator “H”: LED on
93
NO USE
-
Not used
94
KEY_VOL–
I
VOL – key input terminal
95
KEY_VOL+
I
VOL + key input terminal
96
AVSS
-
Ground terminal
97
KEY_INPUT
I
INPUT key input terminal
98
VREF
I
Reference voltage (+3.3V) input terminal
99
AVCC
-
Power supply terminal (+3.3V)
100
NO USE
-
Not used
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