Sony SCD-XE680 Service Manual ▷ View online
SCD-XE680
17
17
CLV Jitter Check (CD only)
Connection:
Checking Method:
Under the condition of RF level check mode in step 3, connect the
oscilloscope to the TP516 (RFCK) (CH1), TP517 (WFCK) (CH2),
and the TP808 (DG) (GND) on the MAIN board to check that the
value A of the waveform satisfies the specification.
Under the condition of RF level check mode in step 3, connect the
oscilloscope to the TP516 (RFCK) (CH1), TP517 (WFCK) (CH2),
and the TP808 (DG) (GND) on the MAIN board to check that the
value A of the waveform satisfies the specification.
Note:
Take care not to leave the test disc in the set.
Specified Value:
Disc
A
PATD-012 or
35
µsec or less
YEDS-18
Checking and Connecting Location:
A
CLV jitter waveform
MAIN board
TP516 (RFCK)
TP517(WFCK)
TP808 (DG)
+
+
–
oscilloscope
(CH2)
(CH1)
RF Level Check
Connection:
Checking Method:
1. Under the condition of traverse waveform check mode in step
1. Under the condition of traverse waveform check mode in step
4, press the
[ AMS ]
dial.
2. Connect an oscilloscope to the TP703 (RFAC) and TP704
(AGND) on the MAIN board.
3. After “WAIT” is displayed, the RF waveform check mode will
become active and “PLAY 5th TRACK” (for the SACD, “RF
MODE ON”) will be displayed, and the 5th music on the disc
will be played.
MODE ON”) will be displayed, and the 5th music on the disc
will be played.
4. Check that the RF waveform is clear and the level satisfies the
specification.
5. Press the
[ AMS ]
dial (for the SACD, “RF JITTER
(5th)” will be displayed, and further press the AMS dial), and
“OUTSIDE TRACK” will be displayed and the outward track
of the disc will be played.
“OUTSIDE TRACK” will be displayed and the outward track
of the disc will be played.
6. Check that the RF waveform is clear and the level satisfies the
specification.
7. Press the
[ AMS ]
dial, and “INSIDE TRACK” will be
displayed and the inward track of the disc will be played.
8. Check that the RF waveform is clear and the level satisfies the
specification.
9. After checking, press the
[ AMS ]
dial, and the test is
over when “BU MEASURE” is displayed.
10. Press the
[OPEN/CLOSE ]
button to open the tray, and re-
move the test disc.
11. Using each type of disc, repeat from step 1 of S curve wave-
form check up to step 10 of RF level check.
12. When the check is over, press the
[POWER]
button to turn the
power off.
Note:
Take care not to leave the test disc in the set.
Specified Value:
Disc
A
SATD-S5 or
SATD-S4
PATD-012 or
0.9 to 1.4 Vp-p
YEDS-18
Note:
Clear RF waveform refers to the waveform where
◊ shapes should
be distinctively observed in the center.
Checking and Connecting Location : See page 19.
MAIN board
TP703 (RFAC)
TP704 (AGND)
+
–
–
oscilloscope
VOLT/DIV: 200 mV
TIME/DIV: 500 ns
TIME/DIV: 500 ns
RF signal waveform
A
l
L
l
L
l
L
l
L
A
Traverse Check
Connection:
Checking Method:
1. Under the condition of S curve waveform check mode in step
1. Under the condition of S curve waveform check mode in step
5, press the
[ AMS ]
dial.
2. After “WAIT” is displayed, the traverse waveform check mode
will become active and “TRV MODE ON” will be displayed.
3. Connect an oscilloscope to the TP513 (TE) and TP504 (AVC)
on the MAIN board.
4. Check that the level A and B of waveform on the oscillo-
scope satisfy the specification.
Specified Value:
Disc
A
B
SATD-S5 or
SATD-S4
PATD-012 or
0.9 to 1.4 Vp-p
–0.1 to +0.1V
YEDS-18
Checking and Connecting Location : See page 17.
MAIN board
TP513 (TE)
TP504 (AVC)
+
–
–
oscilloscope
A
B
VC
Center fo the waveform
Traverse waveform
l
L
– MAIN Board (Component Side) –
TP506
(FE)
TP513
(TE)
TP504
(AVC)
TP704
(AGND) TP703
(RFAC)
TP514
(RFCK)
TP517
(WFCK)
TP808 (DG)
IC703
IC701
IC509
IC801
SCD-XE680
18
18
SECTION 5
DIAGRAMS
5-1.
BLOCK DIAGRAM – RF/SERVO Section –
MUTE LOAD
DETECTOR
1
63
3
4
5
6
9
10
11
12
14
15
16
13
18
17
61
62
53
52
54
55
59
60
DVDRFP
RFSIN
A2
B2
C2
D2
CD E
CD F
A
B
C
D
A
B
C
D
A
B
C
C
D
A
B
C
D
CD A
CD B
CD C
CD C
CD D
DVDLD
CDPD
CDLD
DVDPD
DVDPDSW
MUX
ATT
ATON
ATOP
FNP
FNN
INPUT
BIAS,
AGC
PROGRAMMABLE
EQ FILTER
DIFFERENTIATOR
AIP
AIN
DIP
DIN
SUMMING AMP
IC004 (1/4)
SUMMING AMP
IC004 (2/4)
GCA
MUX
DUAL
APC
GCA,
EQ
GCA
L. P. F.
+
–
–
PHASE
DETECTOR
COMPARATOR
MUX
+
–
–
+
–
–
+
+
+
+
+
+
+
+
+
+
–
–
CLAMP&
ENVELOPE
LEVEL DAC
GCA
SUB
GCA
SEL
L. P. F.
OFFSET
CANCEL
MUX
BOTTOM
ENVELOPE
INPUT
BUFFER
PEAK/
BOTTOM
HOLD
SERIAL
PORT
REGISTER
57
27
31
32
39
47
46
48
FULL WAVE
RECTIFER
AGC
CHARGE PUMP
AVC BUFFER
IC004 (4/4)
AVC
(+1.65V)
A+3.3V
WAVRB BUFFER
IC503 (1/2)
WAVRB
D+5V
VC
(+2.5V)
VC
AGCO
SACD/CD RF AMP,
FOCUS/TRACKING ERROR AMP
IC001
OPTICAL PICK-UP
BLOCK
(KHM-234AMA)
MODULE
CIRCUIT
2AXIS
DEVICE
FOCUS/
FOCUS/
TRACKING
COIL
21
22
23
12
5
11
6
9
AUTOMATIC POWER
CONTROL (FOR CD)
Q003
AUTOMATIC POWER
CONTROL (FOR SACD)
Q001
FOCUS COIL
DRIVE
14
2
13
3
TRACKING COIL
DRIVE
17
24
18
23
33
34
20
22
21
19
8
40 41 39 43
31
32
29
30
20
SLED MOTOR
DRIVE
FOCUS/TRACKING COIL DRIVE,
SLED MOTOR DRIVE
IC502
M
M2
(SLED)
8
9
SPINDLE MOTOR
DRIVE
M
M
M3
(SPINDLE)
6
5
LOADING MOTOR
DRIVE
M
M
M151
(LOADING)
16
17
13
FOCUS/TRACKING/SLED
PWM GENERATOR
FFDR
FRDR
TFDR
TRDR
SFDR
SRDR
SERVO
INTERFACE
SERVO AUTO
SEQUENCER
A/D
CONVERTER
FOCUS
TRACKING/SLED
SERVO DSP
DFCT, FOK
DETECTOR
26
SE
TE
FE
RFDC
TE
FE
PI
26
DIGITAL SERVO
PROCESSOR
IC509 (1/2)
TO CPU INTERFACE
D+3.3V
S1
(LIMIT)
MIRR
FOK
DFCT
COUT
SCLK
SSTP
STBY1
STBY2
RF
A
B
C
D
E
F
G
H
DVD LD
CD LD
DVD/CD PD
DVD VR
FCS+
FCS–
TRK+
TRK–
D
C
B
A
AGCO
RFAC
MIRR
MIN
MEVO
PI
FE
TE
TE
SDATA
SCLK
SDEN
LDON
LOAD OUT
LOAD IN
MUTE 2D
SPDA
F JMP1
F JMP2
• SIGNAL PATH
: SACD PLAY
: CD PLAY
2
RFAC
(Page 19)
3
TE, FE, PI
(Page 20)
4
SDATA, SCLK, SDEN
(Page 20)
5
LDON
(Page 19)
DVDPDSW, CDPDSW
(Page 20)
10
SPDA, F JMP1/2
(Page 19)
11
SPIN
(Page 19)
12
MUTE 2D, SP ON, MUTE LOAD
(Page 20)
13
LOAD IN/OUT
(Page 20)
8
FOK, MIRR,
COUT, SCLK
(Page 20)
TRKSW
(Page 20)
DRVC BUFFER
IC503 (2/2)
DRVC
(+2.5V)
D+5V
SPINDLE MOTOR
DRIVE
42
MNTR
FE
PI
PI
FE
TE
SDATA
SCLK
SDEN
MIRR
FOK
COUT
SCLK
9
(Page 20)
LIM SW
BUFFER
BUFFER
2
SP ON
MUTE2
MUTE1
SPINDLE/LOADING MOTOR DRIVE
IC512
21
22
24
15
23
L. P. F.
GCA
OFFSET
CANCEL
40
L. P. F.
OFFSET
CANCEL
38
PI ERROR AMP
IC004 (3/4)
24
PHOTO DIODE
CONTROL SWITCH
(FOR SACD)
Q005
CD VR
PHOTO DIODE
CONTROL SWITCH
(FOR CD)
Q004
TRACKING COIL DRIVE
CONTROL SWITCH
IC501
1
2
4
1
2
CDPDSW
7
6
TRACKING COIL DRIVE
CONTROL SWITCH
IC505
27
26
1
(Page 19)
SP ERR
25
4
SCD-XE680
19
19
5-2.
BLOCK DIAGRAM – SERVO Section –
53 55 52 54 12
50
49
48
24
75
100
25
4 6 5 7 15 79 80 76 77
10 11 13
34 35 36 9 26
33 37
71
3
2
138
68
64
17
14
65
67
66
71
72
69
16
43 44
64
58
85 84 12 22 23
117
111
7 8
89 – 96
14 – 21
A0 – A7
D0 – D7
142
144
140
135
147
148
150
151
137
153 146 155 163 158 160
164
26
46
51
54
62
63
49
48
53
23
162
29
44, 41, 39, 35,
32, 30, 27, 24
31, 34, 37,
40, 43, 45
59, 56, 60
157
159
93
92
94
76
78
95
33
34
170
17
18
35
21 – 24, 27 – 32
79, 80, 82 – 87,
89, 91
41 – 44, 46 – 49
96, 97, 99, 101,
102, 104 – 106
2 – 5, 7 – 10
5, 7, 9 – 14
172 – 176, 1, 2, 4
66 – 69, 71,
73 – 75
169
167
109
107
16
21
20
19
18
17
113 114 115
2
FILTER
ASYMMETRY
CORRECTOR
EFM
DEMODULATOR
32K
RAM
D/A
DIGITAL
INTERFACE
CLOCK
GENERATOR
ERROR
CORRECTOR
DIGITAL
OUT
SUBCODE
PROCESSOR
DIGITAL CLV
PROCESSOR
PROCESSOR
CPU INTERFACE
DIGITAL PLL
INTERNAL BUS
C4M
XTSL
DIGITAL SIGNAL
PROCESSOR
IC509 (2/2)
RFAC
RFAC
ASYI
ASYO
ASYO
FILO
PCO
XPCK
FILI
CLTV
D+3.3V
XTAO
XTAI
PCMD
WDCK
DOUT
XRST
C2PO
LRCK
BCK
MDAT
LRCK
BCLK
XRST DVD
OPTICAL
TRANSCEIVER
IC309
18
17
19
20
DIGITAL (CD)
OUT OPTICAL
(Page 20)
(Page 20)
(Page 21)
(Page 20)
21
(Page 20)
SD0 – SD7
SDEF
22
(Page 20)
23
(Page 20)
24
(Page 20)
25
(Page 20)
RFAC
768FS (33.8688MHz)
MDAT, BCLK, LRCK
XRST CD, MUTE CD, XRST DVD
HOST INTERFACE
DLRC
DDAT
MA10/MNT1
XMOE
XCAS
MA0 – MA9
MDB8, MDB9,
MDBA – MDBF
MDB0 – MDB7
DASYO
DASYI
ASF1
ASF2
XRAS
XMWR
MA11/MNT2
DBCK
XSAK,
XSHD,
XDCK,
XDCK,
XSRQ
WPK
XTAL
HDB0 –
HDB7
HDB7
HDB8
HDB9
HDBA –
HDBF
HDBF
HA0 –
HA2
HA2
XSAK
XHRS
XSRQ
XDCK
XSHD
HCS1
HCS0
HINT
REDY
• SIGNAL PATH
: SACD PLAY
: CD PLAY (ANALOG)
: CD PLAY (DIGITAL OUT)
ATAPI
PACKET FIFO
ATAPI
REGISTER
DMA
FIFO
DAC
INTERFACE
CD ESP
OE
UCAS
WE
RAS
LCAS
A0 – A9
I/O8 – I/O15
I/O0 – I/O7
D-RAM
IC706
AUTHENTICATION
CPU
INTERFACE,
DMA
CONTROLLER
XTL1
XTL2
XTAL
APEO
GFS
XWAIT
XRD
XWR
XCS
XINT0
XINT0
XINT1
DATA BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
INTEGRATOR
IC703 (1/2)
16
(Page 20)
15
(Page 20)
14
(Page 20)
10
(Page 18)
5
(Page 18)
XHRD, XHWR
A0
D0 – D7
SPDA, F JMP1/2
LDON
11
(Page 18)
SPIN
F JMP1
SPDA
F JMP2
TO SERVO AUTO
SEQUENCER
LOCK
MDP
DATA
SQCK
WFCK
EMPH
MUTE
GFS
RFCK
SQSO
EXCK
SBSO
SCOR
SENS
XLAT
CLOK
LOCK CD
DATA CD
CLOK CD
XLAT CD
SENS CD
SCOR CD
SQSO CD
SQCK CD
GFS CD
3
DOCTRL
LD ON
SPDA
APDO
JITTER
GFS DVD
XRD
XWR
XCS DVD
INIT0 DVD
INIT1 DVD
XHRD
XHWR
XCS
XINT0
XINT1
FCS JMP1
FCS JMP2
SPINDLE MOTOR DRIVE
IC708 (2/2)
SYNC
CONTROL
SUBCODE
DEINTERLEAVE & ECC
DESCRAMBLE
BUFFER
IC708 (1/2)
FFM
DEMODULATOR
RF
ASSYMMETRY
PLL
FILTER
ANALOG
MIXER
SPINDLE
CONRTOL
CD DSP INTERFACE
MDSOUT
MDIN1
MDPOUT
CLVS
SPO
MDIN2
WFCK
SCOR
SBIN
EXCK
XRCI
GSCOR
C2PO
LRCK
BCLK
MDAT
XRST
WFCK
SCOR
SBSO
EXCK
A0 – A7
D0 – D7
SACD DECODER
IC701
RFIN
CPU
IC901 (1/3)
63
MD2
MAIN DATA ECC & EDC
DVD-ROM CD-ROM
59
1
(Page 18)
SP ERR
SP ERR
DMA CONTROLLER
(PRIORITY RESOLVE & SEQUENCER)
(Page 18)
XRST CD
MUTE CD
XHRD
XHWR
XCS
XINT0
XINT0
XINT1
XSAK
XSRQ
XDCK
XSHD
DVC BUFFER
IC703 (2/2)
DVC
(+1.65V)
A+3.3V
SCD-XE680
20
20
5-3.
BLOCK DIAGRAM – MAIN Section –
11 – 18
DQ0 – DQ7
169 – 176
2 – 9
B1 –
B8
B8
A1 –
A8
A8
2
18
3
17
4
5
15
16
64
LEVEL SHIFT
IC814
164
11
12
11
2
13
1
3
16
17
15
34
D-RAM
IC808
LEVEL SHIFT
IC813
LEVEL SHIFT
IC812
DSD DECODER
IC801
3-MULTIPLYING
IC811
21
(Page 19)
3
(Page 18)
8
(Page 18)
4
(Page 18)
22
(Page 19)
23
(Page 19)
24
(Page 19)
17
(Page 19)
25
(Page 19)
18
(Page 19)
20
(Page 19)
74
83
77
74
25
29
72
65
67
SDATA
SDEN
SCLK
FOK
MIRR
COUT
SCLK
TE
FE
10
4
9
5
8
6
6
4
3
2
10
7
48
49
50
47
51
27
11
52
35
78
79
38
EEPROM
IC903
5
6
SDA
SCL
RESET SIGNAL
GENERATOR
IC905
9
10
11
24
25
31
32
768FS (33.8688MHz)
XTAL
XSAK
XSHD
XDCK
XSRQ
SDEF
SD0 – SD7
SDATA, SCLK, SDEN
FOK, MIRR, COUT, SCLK
TE, FE, PI
XRST CD, MUTE CD, XRST DVD
12 – 16, 19 – 21
DATA BUS
27
(Page 21)
14
(Page 19)
15
(Page 19)
16
(Page 19)
45
46
13
(Page 18)
• SIGNAL PATH
: SACD PLAY
A1
A2
A3
B1
B2
B3
A4
B4
A0 – A11
CAS
RAS
WE
CKE
DQ0 – DQ7
A0 – A11
SD0 – SD7
SDCK
SDEF
XSAK
XSHD
XSRQ
WCK
XCAS
XRAS
XWE
DCKE
DSAL
MCKI
DSALS
MSDATO
MSDATI
MSCK
XMSLAT
SMUTE
MSREADY
SDATAL
SDATALS
DATA RF
CLK RF
FOK CD
MIRR RF
COUT CD
SCLK CD
TE
FE
SIN DSD
SOUT DSD
SCK DSD
XLAT DSD
MUTE DSD
RDY DSD
CPU
IC901 (2/3)
XCS IO
XDIS IO
EEPSIO
EEPSCL
XRST
SDEN
XCS
RST
RST DSD
RST DVD
RST CD
XRD
XWR
D0 – D7
LOAD IN
LOAD OUT
PROGRAMMABLE
LOGIC DEVICE
IC904
XRST CD
SDATAL, SDATAR, SDATALS, SDATARS,
SDATAC, SDATALF, 64FS
D0 – D7
A0
XHRD, XHWR
LOAD IN/OUT
66
PI
PI
98
97
LATCH DF
INIT DF
22
A
166
165
167
168
XASK, XSHD,
XDCK, XSRQ
XDCK, XSRQ
126 WARFI
REAC
WPK
2, 3, 5, 6,
8, 9, 11, 12
139 – 136,
134 – 131
21 – 24, 27 – 32,
20, 19
162 – 159, 157 – 154,
152, 151, 149, 148
144
145
143
142
35
CLK
DCLK
141
66
DSAR
SDATAR
76
DSARS
SDATARS
69
DSAC
SDATAC
71
DSASW
SDATALF
61
PHREFI
64FS
59
BCKAI
128FS
26
(Page 21)
34
MULTI
30
(Page 21)
3
4
FS64
FS128
5
YO
64FS
128FS
XHRD
XHWR
2
41
28
(Page 21)
ZEROL
ZEROR
ZEROL, ZEROR
ZEROL
ZEROR
38
37
29
(Page 21)
LMUTE
RMUTE
LMUTE, RMUTE
LMUTE
RMUTE
33
23
6
(Page 18)
DVDPDSW
CDPDSW
DVDPDSW, CDPDSW
DVDPDSW
CDPDSW
LOAD IN
LOAD OUT
40 XTAL
41 EXTAL
X901
20MHz
DATA
CLK
LATCH
INIT
32
(Page 21)
DATA, CLK,
LATCH, INIT
26
31
(Page 22)
RST DP
XRST DP
36 ISBTEST
12
(Page 18)
MUTE 2D, SP ON, MUTE LOAD
115
TEST1
XRST 9
43 ZDFR
42 ZDFL
63
ZDFL
ZDFR 65
XRST DVD
123
MULTI
1
TRKSW
7
(Page 18)
TRKSW
44
LIM SW
9
(Page 18)
LIMSW
256FS
30
31
S152
(LOADING IN)
S151
(LOADING OUT)
IN SW
OUT SW
4
MUT 2D
6
SP ON
1
MUT LOAD
MUTE 2D
73
MUTE CD
MUTE CD
SP ON
MUTE LOAD
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