Sony SCD-XB940 Service Manual ▷ View online
19
Pin No.
Pin Name
I/O
Description
55, 56
EXPO0, EXPO1
O
Not used (open)
57
SPDLSTOP
O
Spindle motor control signal output terminal
58
GND
—
Ground terminal
59
MCK
I
Clock input terminal (27MHz)
60
GND
—
Ground terminal
61
DSLED
O
Not used (open)
62
XHDSPCS
O
Not used (open)
63
OSCW2
I
Open/close switch (S1) (close) input terminal
64
OSCW1
I
Open/close switch (S1) (open) input terminal
65 to 67
TSW3 to TSW1
I
Not used (open)
68
DSW1
I
Not used (fixed at “L”)
69, 70
TRNS, TRMP
O
Not used (fixed at “H”)
71
AVDRST
O
Reset signal output to the DSD decoder (IC617) “L”: reset
72
AVDWT
I
Not used (fixed at “H”)
73
XJGWT
I
Not used (fixed at “H”)
74
XJGCS
O
Not used (open)
75
AVDRQ1IN
I
Not used (fixed at “H”)
76
AVDRQ0IN
I
Not used (fixed at “H”)
77
AVDADO
O
Not used (open)
78
NC
—
Not used (open)
79, 80
GND
—
Ground terminal
81
VDD
—
Power supply terminal (+3.3V)
82
NC
—
Not used (open)
83
CKSW2
I
Not used (fixed at “H”)
84, 85
EXPI1, EXPI2
I
Not used (fixed at “L”)
86
UCSW
I
Not used (fixed at “L”)
87
DLSW
I
Not used (fixed at “L”)
88
CKSW1
I
Not used (fixed at “H”)
89, 90
CKMM, CKMP
O
Not used (open)
91, 92
LDMM, LDMP
O
Loading motor (M1) control signal output to the loading motor drive (IC615)
93
XDRVMUTE
O
Muting signal output terminal “L”: muting
94
SPGAIN
O
Spindle gain control signal output terminal
95
KARAOKEON
O
Not used (open)
96
XDACS2
O
Not used (open)
97
XDACS3
O
Not used (open)
98
MUTE
O
Muting signal output to the RF signal decoder (IC622)
99
MD2
O
Mode control signal output to the RF signal decoder (IC622)
100
VDD
—
Power supply terminal (+3.3V)
101
GND
—
Ground terminal
102
NORF
I
RF signal input from the RF signal decoder (IC622)
103
DFCT
O
Defect signal output to the RF signal decoder (IC622)
104
FWON
I
Control signal input from the RF signal decoder (IC622)
105
LOCK
I
FG reference clock signal input from the RF signal decoder (IC622)
106
ARPRST
O
Reset signal output to the RF signal decoder (IC622) “L”: reset
107
ARPINT
I
Interrupt signal input from the RF signal decoder (IC622)
108
ARPWT
I
Wait signal input from the RF signal decoder (IC622)
109
ARPWR
O
Write enable signal output to the RF signal decoder (IC622)
20
Pin No.
Pin Name
I/O
Description
110
ARPRD
O
Read data output to the RF signal decoder (IC622)
111
ARPCS
O
Chip select signal output to the RF signal decoder (IC622) “L”: active
112
XRAMOE
O
Data enable signal output to the S-RAM (IC609) and ROM (IC632)
113
XRAMWE
O
Data write enable signal output to the S-RAM (IC609)
114
SDPRST
O
Reset signal output to the servo digital signal processor (IC607) “L”: reset
115
SDPINT
I
Interrupt signal input from the servo digital signal processor (IC607)
116
SDPWR
O
Data write strobe signal output to the servo digital signal processor (IC607)
117
SDPRD
O
Data read strobe signal output to the servo digital signal processor (IC607)
118
SDPCS
O
Chip select signal output to the servo digital signal processor (IC607) “L”: active
119
NC
—
Not used (open)
120
VDD
—
Power supply terminal (+3.3V)
121, 122
GND
—
Ground terminal
123
NC
—
Not used (open)
124
RAMUB
O
Upper byte write enable signal output to the S-RAM (IC609)
125
RAMLB
O
Low byte write enable signal output to the S-RAM (IC609)
126 to 133
HD7 to HD0
I/O
Two-way data bus with the system controller (IC605), S-RAM (IC609), RF signal decoder
(IC622), and ROM (IC632)
(IC622), and ROM (IC632)
134
GND
—
Ground terminal
135
CPUCK
I
Clock signal input from the system controller (IC605)
136
GND
—
Ground terminal
137
HDAK1IN
I
Not used (fixed at “H”)
138
HDAK0IN
I
Not used (fixed at “H”)
139
HDRQ1OUT
O
Not used (open)
140
HDRQ0OUT
O
Not used (open)
141
CS1
I
Chip select signal output to the system controller (IC605) “L”: active
142
CS4
I
Chip select signal output to the system controller (IC605) “L”: active
143
LWR
I
Write strobe 1 signal output to the system controller (IC605)
144
HWR
I
Write strobe 0 signal output to the system controller (IC605)
145
HRD
I
Read strobe signal output to the system controller (IC605)
146 to 154
I
Address signal output to the system controller (IC605)
155
XINT3
O
Interrupt signal 3 output to the system controller (IC605)
156
XINT1
O
Interrupt signal 1 output to the system controller (IC605)
157
WAIT
O
Wait signal output to the system controller (IC605)
158
NC
—
Not used (open)
159, 160
GND
—
Ground terminal
HA19 to HA18,
HA5 to HA0
21
Pin No.
Pin Name
I/O
Description
1
XSRQ
O
Data request signal output to the RF signal decoder (IC622)
2
XSHD
I
Header flag signal input from the RF signal decoder (IC622)
3
VDD
—
Power supply terminal (+3.3V)
4
VSS
—
Ground terminal
5
SDCK
I
Serial data clock signal input from the RF signal decoder (IC622)
6
SMUTE
I
Muting signal input from the system controller (IC605) “L”: muting
7
XMSLAT
I
Latch signal input from the system controller (IC605)
8
MSCK
I
Clock signal input from the system controller (IC605)
9
MSDATI
I
Serial data input from the system controller (IC605)
10
MSDATO
O
Serial data output to the system controller (IC605)
11
MSREDY
O
Ready signal input from the system controller (IC605) “L”: ready
12
XMSDOE
O
Data enable signal output terminal Not used (open)
13
XRST
I
Reset signal input from the expander (IC612)
14
MCKI
I
Master clock signal input terminal
15
VSS
—
Ground terminal
16
CK75S
I
Master clock select signal input terminal “L”: 512fs, “H”: 768fs (fixed at “H” in this set)
17
EXCKO1
O
External clock 1 signal output terminal Not used (open)
18
EXCKO2
O
External clock 2 signal output terminal Not used (open)
19
LRCK
I/O
Clock signal input/output terminal (44.1kHz) Not used (open)
20
NC
—
Not used (open)
21
MNT2
O
Monitor 2 signal output terminal Not used (open)
22
TRST
I
Reset signal input from the expander (IC612) “L”: reset
23
TCK
I
Clock signal input terminal for test (normally: fixed at “L”)
24
TDI
I
Data input terminal for test (normally: open)
25
TENA1
I
Data enable signal input terminal for test (normally: open)
26
TDO
O
Data output terminal for test (normally: open)
27
VST
—
Ground terminal for test (normally: fixed at “L”)
28
VDD
—
Power supply terminal (+3.3V)
29
VSS
—
Ground terminal
30
MNT1
O
Monitor 1 signal output terminal Not used (open)
31
MNT0
O
Monitor 0 signal output terminal Not used (open)
32
XBIT
O
Monitor signal output terminal Not used (open)
33
F75HZ
O
Clock output terminal (75Hz) Not used (open)
34
SUPDAT
O
Serial data output terminal Not used (open)
35
XSUPAK
O
Data flag signal output terminal Not used (open)
36
SUPEN
O
Data enable signal output terminal Not used (open)
37
TEST1
I
Test 1 signal input terminal for test (normally: fixed at “L”)
38
VSS
—
Ground terminal
39
TEST2
I
Test 2 signal input terminal for test (normally: fixed at “L”)
40, 41
VSS
—
Ground terminal
42
BCKD
I
Phase reference signal input terminal
43 to 45
NC
—
Not used (open)
46
BCKA
I
Shift clock signal input terminal
47
DSAL
O
DSD data (Lch) output terminal
48
DSAR
O
DSD data (Rch) output terminal
49
ZDFLGL
O
Data (Lch) flag detect signal output terminal
• MAIN BOARD IC617 CXD2751Q (DSD DECODER)
22
Pin No.
Pin Name
I/O
Description
50
ZDFLGR
O
Data (Rch) flag detect signal output terminal
51, 52
A0, A1
O
Address signal output to the D-RAM (IC625)
53
VDD
—
Power supply terminal (+3.3V)
54
VSS
—
Ground terminal
55 to 63
A2 to A10
O
Address signal output to the D-RAM (IC625)
64
NC
—
Not used (open)
65
VSS
—
Ground terminal
66
XWE
O
Write enable signal output to the D-RAM (IC625)
67
XCAS
O
Column address strobe signal output to the D-RAM (IC625)
68
XRAS
O
Row address strobe signal output to the D-RAM (IC625)
69
XOE
O
Read enable signal output to the D-RAM (IC625)
70 to77
DQ0 to DR7
I/O
Two-way data bus with the D-RAM (IC625)
78
VDD
—
Power supply terminal (+3.3V)
79
VSS
—
Ground terminal
80
WCK
I
Clock signal input terminal for disk mark detect
81
WRFD
I
RF data signal input terminal for disk mark detect
82 to 89 WAD0 to WAD7
I
A/D data signal input from the A/D converter (IC620) for disk mark detect
90
VSS
—
Ground terminal
91 to 98
SD7 to SD0
I
Stream data signal input from the RF signal decoder (IC622)
99
SDEF
I
Error flag signal input from the RF signal decoder (IC622)
100
XSAK
I
Data flag signal input from the RF signal decoder (IC622)
SCD-XB940
