Sony SCD-C222ES Service Manual ▷ View online
SCD-C222ES
29
29
TP506
(FE)
TP513
(TE)
TP516
(RFCK)
TP704
(AGND)
TP703
(RFAC)
TP808
(DG)
TP517
(WFCK)
TP504
(AVC)
IC509
IC701
IC801
IC703
Checking and Connecting Location:
– MAIN Board (Component Side) –
SCD-C222ES
30
30
MUTE LOAD
DETECTOR
1
63
3
4
5
6
9
10
11
12
14
15
16
13
18
17
61
62
53
52
54
55
59
60
DVDRFP
RFSIN
A2
B2
C2
D2
CD E
CD F
A
B
C
D
A
B
C
D
A
B
C
C
D
CD A
CD B
CD C
CD C
CD D
CDLD
CDPD
DVDLD
DVDPD
MUX
ATT
ATOP
ATON
FNP
FNN
INPUT
BIAS,
AGC
PROGRAMMABLE
EQ FILTER
DIFFERENTIATOR
AIP
AIN
DIP
DIN
SUMMING AMP
IC004 (1/4)
SUMMING AMP
IC004 (2/4)
GCA
MUX
DUAL
APC
GCA,
EQ
GCA
L. P. F.
+
–
–
PHASE
DETECTOR
COMPARATOR
MUX
+
–
–
+
–
–
+
+
+
+
+
+
+
+
+
+
–
–
CLAMP&
ENVELOPE
LEVEL DAC
GCA
SUB
GCA
SEL
L. P. F.
L. P. F.
L. P. F.
OFFSET
CANCEL
GCA
MUX
OFFSET
CANCEL
OFFSET
CANCEL
BOTTOM
ENVELOPE
INPUT
BUFFER
PEAK/
BOTTOM
HOLD
SERIAL
PORT
REGISTER
57
27
31
32
38
40
39
47
46
48
PI ERROR AMP
IC004 (3/4)
FULL WAVE
RECTIFER
AGC
CHARGE PUMP
AVC BUFFER
IC004 (4/4)
AVC
(+1.65V)
A+3.3V
DRVC BUFFER
IC503
DRVC
(+2.5V)
D+5V
VC
(+2.5V)
VC
AGCO
SACD/CD RF AMP,
FOCUS/TRACKING ERROR AMP
IC001
OPTICAL PICK-UP
BLOCK
(KHM-230AAA)
LASER
DIODE
(FOR CD)
LASER
DIODE
(FOR SACD)
2AXIS
DEVICE
FOCUS/
FOCUS/
TRACKING
COIL
22
24
21
23
12
5
11
6
9
AUTOMATIC POWER
CONTROL (FOR SACD)
Q001
AUTOMATIC POWER
CONTROL (FOR CD)
Q003
MODULE
CIRCUIT B+
FOCUS COIL
DRIVE
14
2
13
3
TRACKING COIL
DRIVE
17
24
18
23
33
34
20
22
21
19
8
40 41 39 43
31
32
29
30
20
SLED MOTOR
DRIVE
FOCUS/TRACKING COIL DRIVER,
SLED MOTOR DRIVER
IC502
M
M
M2
(SLED)
8
9
SPINDLE MOTOR
DRIVE
M
M
M3
(SPINDLE)
8
9
LOADING MOTOR
DRIVE
M
M
M10
(LOADING)
15
16
17
13
FOCUS/TRACKING/SLED
PWM GENERATOR
FFDR
FRDR
TFDR
TRDR
SFDR
SRDR
SERVO
INTERFACE
SERVO AUTO
SEQUENCER
A/D
CONVERTER
FOCUS
TRACKING/SLED
SERVO DSP
DFCT, FOK
DETECTOR
26
SE
TE
FE
RFDC
TE
FE
PI
26
DIGITAL SERVO
PROCESSOR
IC509 (1/2)
TO CPU INTERFACE
LOADING/TRAY MOTOR DRIVE
IC11
D+3.3V
S1
(LIMIT)
MIRR
FOK
DFCT
COUT
SCLK
SSTP
STBY1
STBY2
RF
A
B
C
D
E
F
G
H
CD LD
CD PD
DVD LD
DVD PD
VMOD
FCS+
FCS–
TRK+
TRK–
D
C
B
A
AGCO
RFAC
MIRR
MIN
MEVO
PI
FE
TE
SDATA
SCLK
SDEN
LDON
LOAD IN
LOAD OUT
MUTE 2D
SPDA
FJMP1
FJMP2
• SIGNAL PATH
: SACD PLAY
: CD PLAY
1
RFAC
(Page 31)
2
TE, FE
(Page 32)
3
SDATA, SCLK, SDEN
(Page 32)
4
LDON
(Page 31)
5
VMOD
(Page 32)
8
SPDA, FJMP1/2
(Page 31)
9
SPIN
(Page 31)
10
MUTE 2D, SP ON, MUTE LOAD
(Page 32)
11
LOAD I/O, TBLL, TBLR
(Page 32)
6
FOK, MIRR,
COUT, SCLK
(Page 32)
B+ SWITCH
Q002, 005
A +5V
42
MNTR
FE
FE/PI
PI
FE
TE
SDATA
SCLK
SDEN
MIRR
FOK
COUT
SCLK
7
(Page 32)
LIM SW
BUFFER
2
SP ON
MUTE2
MUTE1
SPINDLE MOTOR DRIVE
IC512
2
3
OUT1+
OUT1–
FIN1
RIN1
11
10
TRAY MOTOR
DRIVE
M
M
M11
(TRAY)
16
17
OUT2+
OUT2–
RIN2
FIN2
TBLL
TBLR
SECTION 6
DIAGRAMS
6-1.
BLOCK DIAGRAM – RF/SERVO Section –
SCD-C222ES
31
31
53 55 52 54 12
50
49
48
24
75
51
25
4 6 5 7 15 79 80 76 77
10 11 13
26 37 27 9 34
33 35
71
3
2
3
138
68
63
64
17
14
65
67
66
71
72
69
16
43 44
64
58
85 84 12 22 23
117
111
7 8
89 – 96
14 – 21
A0 – A7
D0 – D7
142
144
140
135
147
148
150
151
137
153 146 155 163 158 160
164
26
46
51
54
62
63
49
48
53
23
162
29
44, 41, 39, 35,
32, 30, 27, 24
31, 34, 37,
40, 43, 45
59, 56, 60
157
159
93
92
94
76
78
95
33
34
170
17
18
35
21 – 24, 27 – 32
79, 80, 82 – 87,
89, 91
41 – 44, 46 – 49
96, 97, 99, 101,
102, 104 – 106
2 – 5, 7 – 10
5, 7, 9
–
14
172
–
176, 1, 2, 4
66 – 69, 71,
73 – 75
169
167
109
107
16
21
20
19
18
17
113 114 115
1
FILTER
ASYMMETRY
CORRECTOR
EFM
DEMODULATOR
32K
RAM
D/A
DIGITAL
INTERFACE
CLOCK
GENERATOR
ERROR
CORRECTOR
DIGITAL
OUT
SUBCODE
PROCESSOR
DIGITAL CLV
PROCESSOR
PROCESSOR
CPU INTERFACE
DIGITAL PLL
INTERNAL BUS
C4M
XTSL
DIGITAL SIGNAL
PROCESSOR
IC509 (2/2)
RFAC
RFAC
ASYI
ASYO
ASYO
FILO
PCO
XPCK
FILI
CLTV
D+3.3V
XTAO
XTAI
PCMD
WDCK
DOUT
MD2
XRST
C2PO
LRCK
BCK
MDAT
LRCK
BCLK
XRST CD,
MUTE CD
XRST DVD
WAVE SHAPER
Q302
OPTICAL
TRANSCEIVER
IC309
16
15
17
18
DIGITAL (CD)
OUT OPTICAL
DIGITAL (CD)
OUT COAXIAL
J303
(Page 32)
(Page 32)
(Page 33)
(Page 32)
19
(Page 32)
SD0 – SD7
SDEF
20
(Page 32)
21
(Page 32)
22
(Page 32)
23
(Page 32)
RFAC
768FS (33.8688MHz)
MDAT, BCLK, LRCK
XRST CD, MUTE CD, XRST DVD
HOST INTERFACE
DLRC
DDAT
MA10/MNT1
XMOE
XCAS
MA0
–
MA9
MDB8, MDB9,
MDBA
–
MDBF
MDB0
–
MDB7
DASYO
DASYI
ASF1
ASF2
WPK
XRAS
XMWR
MA11/MNT2
DBCK
XSAK,
XSHD,
XDCK,
XDCK,
XSAQ
WPK
XTAL
HDB0 –
HDB7
HDB7
HDB8
HDB9
HDBA –
HDBF
HDBF
HA0 –
HA2
HA2
HDRQ
XHRS
XHAC
XHWR
XHRD
HCS1
HCS0
HINT
REDY
• SIGNAL PATH
: SACD PLAY
: CD PLAY (ANALOG OUT)
: CD PLAY (DIGITAL OUT)
ATAPI
PACKET FIFO
ATAPI
REGISTER
DMA
FIFO
DAC
INTERFACE
CD ESP
OE
UCAS
WE
RAS
LCAS
A0 – A9
I/O8 – I/O15
I/O0 – I/O7
D-RAM
IC706
AUTHENTICATION
CPU
INTERFACE,
DMA
CONTROLLER
XTL1
XTL2
XTAL
APEO
GFS
XWAIT
XRD
XWR
XCS
XINT0
XINT0
XINT1
DATA BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
INTEGRATOR
IC703 (1/2)
CENTER VOLTAGE
GENERATOR
IC703 (2/2)
A+3.3V
DVC
(+1.65V)
14
(Page 32)
13
(Page 32)
12
(Page 32)
8
(Page 30)
4
(Page 30)
XHRD, XHWR
A0 – A2
D0 – D7
SPDA, FJMP1/2
LDON
9
(Page 30)
SPIN
FJMP1
SPDA
FJMP2
TO SERVO AUTO
SEQUENCER
LOCK
MDP
DATA
SQCK
WFCK
EMPH
MUTE
GFS
RFCK
SQSO
EXCK
SBSO
SCOR
SENS
XLAT
CLOK
LOCK CD
DATA CD
CLOK CD
LAT CD
SENS CD
SCOR
SUBQ
XQCK
GFS CD
LDON
SPDA
APDO
JIT
JIT
GFS DVD
XRD
XWR
XCS DVD
INIT0 DVD
INIT1 DVD
XHRD
XHWR
XCS
XINT0
XINT1
FCS JMP 1
FCS JMP 2
DOCTRL
SPINDLE MOTOR DRIVE
IC708 (2/2)
SYNC
CONTROL
SUBCODE
DEINTERLEAVE & ECC
DESCRAMBLE
BUFFER
IC708 (1/2)
FFM
DEMODULATOR
RF
ASSYMMETRY
PLL
FILTER
ANALOG
MIXER
SPINDLE
CONRTOL
CD DSP INTERFACE
MDSOUT
MDIN1
MDPOUT
CLVS
SPO
MDIN2
WFCK
SCOR
SBIN
EXCK
XRCI
GSCOR
C2PO
LRCK
BCLK
MDAT
XRST
WFCK
SCOR
SBSO
EXCK
A0 – A7
D0 – D7
SACD DECODER
IC701
RFIN
CPU
IC901 (1/3)
MAIN DATA ECC & EDC
DVD-ROM CD-ROM
DMA CONTROLLER
(PRIORITY RESOLVE & SEQUENCER)
APDO
(Page 30)
XRST CD
MUTE CD
XHRD
XHWR
XCS
XINT0
XINT0
XINT1
XSAK
XSAQ
XDCK
XSHD
6-2.
BLOCK DIAGRAM – SERVO Section –
SCD-C222ES
32
32
11
–
18
DQ0
–
DQ7
169
–
176
2
–
9
B1 –
B8
B8
A1 –
A8
A8
2
18
3
17
4
5
15
16
64
LEVEL SHIFT
IC814
164
11
12
11
2
13
1
3
16
17
15
34
D-RAM
IC808
LEVEL SHIFT
IC813
LEVEL SHIFT
IC812
DSD DECODER
IC801
3-MULTIPLYING
IC811
19
(Page 31)
2
(Page 30)
6
(Page 30)
3
(Page 30)
20
(Page 31)
21
(Page 31)
22
(Page 31)
15
(Page 31)
23
(Page 31)
16
(Page 31)
18
(Page 31)
74
83
77
100
99
98
2
28
24
74
32
29
72
65
67
SDATA
SDEN
SCLK
FOK
MIRR
COUT
SCLK
TE
FE
10
4
9
5
8
6
6
4
3
2
10
7
48
49
50
46
45
47
11
52
1
86
80
26
81
78
79
38
CN709
EEPROM
IC903
5
6
SDA
SCL
RESET SIGNAL
GENERATOR
IC905
43
42
41
39
18
61
20
21
768FS (33.8688MHz)
XTAL
XSAK
XSHD
XDCK
XSAQ
SDEF
SD0 – SD7
SDATA, SCLK, SDEN
FOK, MIRR, COUT, SCLK
TE, FE
XRST DVD, XRST CD, MUTE CD
44
–
46
28
–
30, 33
–
37
DATA BUS
25
(Page 33)
26
(Page 33)
12
(Page 31)
ADDRESS BUS
13
(Page 31)
14
(Page 31)
15
13
11
(Page 30)
5
(Page 30)
• SIGNAL PATH
: SACD PLAY
A1
A2
A3
B1
B2
B3
A0
–
A11
CAS
RAS
WE
CKE
DQ0
–
DQ7
A0
–
A11
SD0
–
SD7
SDCK
SDEF
XSAK
XSHD
XSRQ
WCK
XCAS
XRAS
XWE
DCKE
DSAL
MCKI
DSALS
MSDATO
MSDATI
MSCK
XMSLAT
SMUTE
MSREADY
DSL
DSLS
256FS
SDATA RF
SDCLK RF
FOK CD
MIRR
COUT CD
SCLK CD
TE
FE/PI
SDIN DSD
SDOUT DSD
SCK DSD
XMSLAT
MUTE DSD
READY DSD
CPU
IC901 (2/3)
SCDATA DF
SHIFT DF
LATCH DF
AMUTE
DATA
SHIFT
LATCH
AMUTZ
A1 IN
T SENS
XCS IO
XDIS IO
MODE DF
PWE
RXD
TXD
EEPSIO
EEPSCL
RST
SDEN
XCS
XDIS
RST DSD
LIM SW
RST DVD
RST CD
XRD
XWR
A0
–
A2
D0
–
D7
LOAD IN
LOAD OUT
I/O
EXPANDER
IC902
XRST CD
DSL, DSR, DSLS, DSRS, DSC,
DSLF, E64FSO, E128FSO
DATA, SHIFT,
LATCH, AMUTZ
D0 – D7
A0 – A2
XHRD, XHWR
LOAD IN/OUT,TBLL, TBLR
VMOD
166
165
167
168
XASK, XSHD,
XDCK, XSAQ
XDCK, XSAQ
126 WARFI
REAC
WPK
2, 3, 5, 6,
8, 9, 11, 12
139
–
136,
134
–
131
21
–
24, 27
–
32,
20, 19
162
–
159, 157
–
154,
152, 151, 149, 148
144
145
143
142
35
CLK
DCLK
141
66
DSAR
DSR
76
DSARS
DSRS
69
DSAC
DSC
71
DSALFE
DSLF
61
PHREFI
E64FSO
59
BCKAI
E128FSO
ZMCKI
24
(Page 33)
TABLE
SENSOR
D10
A1 OUT
25
MULTI
16
D306
D307
27
(Page 33)
6
7
TBLL
TBLR
53
52
XZLAT
CDMODESEL
51
HDMODESEL
28
(Page 33)
XZLAT, CDMODE, HDMODESEL
XHRD
XHWR
LOAD IN
LOAD OUT
TBLL
TBLR
XZLAT
CDMODESEL
HDMODESEL
40 XTAL
41 EXTAL
X901
20MHz
SHRRDY
MSCK
MSDATI
MSDATO
29
(Page 33)
SHRRDY, MSCK,
MSDATI, MSDATO,
XRST DSD
19
30
(Page 34)
RST DP
XRST DP
27 ISBTEST
7
(Page 30)
LIM SW
MUTE CD
10
11
MUTE 2D
8
9
MUTE LOAD
6
5
SP ON
4
3
10
(Page 30)
MUTE 2D, MUTE LOAD, SP ON
IC802
10
D SENS
DISC
SENSOR
D11
59
OUT SW
3 MUT LOAD
1 MUT CD
2 MUT 2D
4 SP ON
S11
(OPEN/CLOSE DETECT)
11
S1
12
S2
22
VMOD
S200
ROTARY ENCODER
BU, TABLE
ADDRESS DETECT
S902
(FLASH WRITING)
115
TEST1
XRST 9
XRST DVD
XRST DVD
J381
CONTROL A1
II
123
MUTE
ZMCKI, 256FS
Q704
SIRCS
BUFFER
Q381
Q703
OPEN
CLOSE
FOR
RS-232C
WRITING
IMPOSSIBLE
WRITING
POSSIBLE
6-3.
BLOCK DIAGRAM – MAIN Section –
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