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Model
SCD-555ES
Pages
94
Size
20.17 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
scd-555es.pdf
Date

Sony SCD-555ES Service Manual ▷ View online

53
• MAIN BOARD  IC801  CXD2751Q (DSD DECODER)
Pin No.
Pin Name
I/O
Description
1
XSRQ
O
Serial data transfer request signal output to the SACD decoder (IC701)
2
XSHD
I
Header flag signal input from the SACD decoder (IC701)
3
VDD
Power supply terminal (+3.3V) (digital system)
4
VSS
Ground terminal (digital system)
5
SDCK
I
Serial data transfer clock signal input from the SACD decoder (IC701)
6
SMUTE
I
Muting signal input from the CPU (IC901)    “L”: muting
7
XMSLAT
I
Latch signal input from the CPU (IC901)
8
MSCK
I
Serial data transfer clock signal input from the CPU (IC901)
9
MSDATI
I
Serial data input from the CPU (IC901)
10
MSDATO
O
Serial data output to the CPU (IC901)
11
MSREDY
I
Ready signal input from the CPU (IC901)    “L”: ready
12
XMSDOE
O
Data enable signal output terminal    Not used (open)
13
XRST
I
Reset signal input from the expander (IC902)    “L”: reset
14
MCKI
I
Master clock signal input terminal
15
VSS
Ground terminal (digital system)
16
CK75S
I
Master clock selection signal input terminal    “L”: 512fs, “H”: 768fs (fixed at “H” in this set)
17
EXCKO1
O
External clock 1 signal output terminal
18
EXCKO2
O
External clock 2 signal output terminal    Not used (open)
19
LRCK
I/O
L/R sampling clock signal (44.1kHz) input/output terminal    Not used (open)
20
UBIT
Not used (open)
21
MNT2
O
Monitor 2 signal output terminal    Not used (open)
22
TRST
I
Reset signal input terminal     “L”: reset    Not used  (fixed at “L”)
23
TCK
I
Clock signal input terminal for test (normally: fixed at “L”)
24
TDI
I
Serial data input terminal for test (normally: open)
25
TENA1
I
Enable signal input terminal for test (normally: open)
26
TDO
O
Serial data output terminal for test (normally: open)
27
VST
Ground terminal for test (digital system)
28
VDD
Power supply terminal (+3.3V) (digital system)
29
VSS
Ground terminal (digital system)
30
MNT1
O
Monitor 1 signal output terminal    Not used (open)
31
MNT0
O
Monitor 0 signal output terminal    Not used (open)
32
XBIT
O
Bit clock signal (2.8224 MHz) output terminal    Not used (open)
33
F75HZ
O
Clock signal (75 Hz) output terminal    Not used (open)
34
SUPDAT
O
Serial data output terminal    Not used (open)
35
SUPAK
O
Acknowledge signal output terminal    Not used (open)
36
SUPEN
O
Enable signal output terminal    Not used (open)
37
TEST1
I
Test 1 signal input terminal for test (normally: fixed at “L”)
38
VSS
Ground terminal (digital system)
39
TEST2
I
Test 2 signal input terminal for test (normally: fixed at “L”)
40, 41
VSS
Ground terminal (digital system)
42
BCKD
I
Shift clock signal input from the digital filter (IC301)
43
DSDL
Not used (open)
44
DSDR
Not used (open)
45
MUDAT
Not used (open)
46
BCKA
I
Shift clock signal input from the digital filter (IC301)
47
DSAL
O
DSD data (Lch) output to the digital filter (IC301)
54
Pin No.
Pin Name
I/O
Description
48
DSAR
O
DSD data (Rch) output to the digital filter (IC301)
49
ZDFLGL
O
Data (Lch) flag detection signal output terminal    Not used (open)
50
ZDFLGR
O
Data (Rch) flag detection signal output terminal    Not used (open)
51, 52
A0, A1
O
Address signal output to the D-RAM (IC808)
53
VDD
Power supply terminal (+3.3V) (digital system)
54
VSS
Ground terminal (digital system)
55 to 63
A2 to A10
O
Address signal output to the D-RAM (IC808)
64
NC
Not used (open)
65
VSS
Ground terminal (digital system)
66
XWE
O
Write enable signal output to the D-RAM (IC808)
67
XCAS
O
Column address strobe signal output to the D-RAM (IC808)
68
XRAS
O
Row address strobe signal output to the D-RAM (IC808)
69
XOE
O
Output enable signal output to the D-RAM (IC808)
70 to 77
DQ0 to DQ7
I/O
Two-way data bus with the D-RAM (IC808)
78
VDD
Power supply terminal (+3.3V) (digital system)
79
VSS
Ground terminal (digital system)
80
WCK
I
Clock signal input terminal for disc mark detection
81
WRFD
I
RF data signal input terminal for disc mark detection
82 to 89 WAD0 to WAD7
I
A/D data signal input from the A/D converter (IC804) for disc mark detection
90
VSS
Ground terminal (digital system)
91 to 98
SD7 to SD0
I
Stream data signal input from the SACD decoder (IC701)
99
SDEF
I
Error flag signal input from the SACD decoder (IC701)
100
XSAK
I
Serial data transfer acknowledge signal input from the SACD decoder (IC701)
55
• MAIN BOARD  IC901 CXP973064-207R (CPU)
Pin No.
Pin Name
I/O
Description
1
MODE DF
O
SACD/CD mode selection signal output to the digital filter (IC301) and D/A converter (IC302)
“L”: CD mode, “H”: SACD mode
2
AMUTE
O
Muting signal output to the analog line circuit    “H”: muting
3
DOCTRL
O
Digital out on/off control signal output to the CXD3008Q (IC509)
“L”: digital out off, “H”: digital out on
4
LAT DAC
O
Latch signal output to the D/A converter (IC904)
5
DATA DAC
O
Serial data output to the D/A converter (IC904)
6
CLK DAC
O
Clock signal output to the D/A converter (IC904)
7
FCS JMP 1
O
Focus jump 1 signal output to the BA5983FP (IC502)
8
FCS JMP 2
O
Focus jump 2 signal output to the BA5983FP (IC502)
9
SENS CD
I
Internal status (SENSE) signal input from the CXD3008Q (IC509)
10
XCS DRAM
O
Chip select signal output terminal    Not used (pull up)
11
XCS IO
O
Chip select signal output to the expander (IC902)
12
XCS DVD
O
Chip select signal output to the SACD decoder (IC701)
13
VSS
Ground terminal (digital system)
14 to 21
D0 to D7
I/O
Two-way data bus with the SACD decoder (IC701)  and expander (IC902)
22
INT0 DVD
I
Interrupt signal input from the SACD decoder (IC701)
23
INT1 DVD
I
Interrupt signal input from the SACD decoder (IC701)
24
T SENS
I
Disc tray status detection signal input terminal    Not used (open)
25
MON DVD
I
Monitor signal input from the SACD decoder (IC701)
26
DATA CD
O
Serial data output to the CXD3008Q (IC509)
27
XLAT CD
O
Latch signal output to the CXD3008Q (IC509)
28
A1IN
I
Control A1 signal input terminal    Not used (fixed at “H”)
29
CONT CD
I
Numbers of track counted signal input from the CXD3008Q (IC509)
30
IN SW
I
Loading in switch (S001) input terminal    “L”: loading in
31
OUT SW
I
Loading out switch (S002) input terminal    “L”: loading out
32
MIRR RF
I
Mirror signal input from the CXD3008Q (IC509)
33
SUBQ CD
I
Subcode Q data input from the CXD3008Q (IC509)
34
SCOR CD
I
Subcode sync OR signal input from the CXD3008Q (IC509)
35
SQCLK CD
O
Subcode Q data reading clock signal output to the CXD3008Q (IC509)
36
Not used (open)
37
CLOK CD
O
Clock signal output to the CXD3008Q (IC509)
38
XRST
I
System reset signal input from the reset signal generator (IC905)    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
39
VSS
Ground terminal (digital system)
40
XTAL I
System clock input terminal (20 MHz)
41
EXTAL O
System clock output terminal (20 MHz)
42
VDD
Power supply terminal (+3.3V) (digital system)
43
LDON RF
O
Laser diode on/off control signal output to the CXD1881R (IC001)
“L”: laser diode off, “H”: laser diode on
44
XDIS IO
O
Reset signal output to the expander (IC902)    “L”: reset
45
MUTE DSD
O
Muting signal output to the DSD decoder (IC801)    “L”: muting
46
XLAT DSD
O
Latch signal output to the DSD decoder (IC801)
47
READY DSD
O
Ready signal output to the DSD decoder (IC801)    “L”: ready
48
SDIN DSD
I
Serial data input from the DSD decoder (IC801)
49
SOUT DSD
O
Serial data output to the DSD decoder (IC801)
Ver. 1.1
56
Pin No.
Pin Name
I/O
Description
50
SCK DSD
O
Serial data transfer clock signal output to the DSD decoder (IC801)
51
BUSY DP
I
Busy signal input from the CXP84120 (IC1001)
52
SIN DP
I
Serial data input from the CXP84120 (IC1001)
53
SOUT DP
O
Serial data output to the CXP84120 (IC1001)
54
SCLK DP
O
Serial data transfer clock signal output to the CXP84120 (IC1001)
55
VSS
Ground terminal (digital system)
56
REQ DP
O
Request signal output to the CXP84120 (IC1001)
57
FCS BST
O
Focus boost signal output terminal    Not used (open)
58
GFS DVD
I
Guard frame sync signal input from the SACD decoder (IC701)
59
MUTE CD
O
Muting signal output to the CXD3008Q (IC509)    “H”: muting
60
MUTE 2D
O
Muting signal output to the BA5938FP (IC502)
61
MUTE LOAD
O
Muting signal output to the BA5912AFP (IC512)
62
FG
I
FG signal input terminal    Not used (open)
63
MUTE SP
O
Muting signal output to the BA5912AFP (IC512)
64
JITTER
I
Jitter signal input terminal
65
TE
I
Tracking error signal input from the CXD1881R (IC001)
66
MON RF
I
Monitor signal input from the CXD1881R (IC001)
67
FE
I
Focus error signal input from the CXD1881R (IC001)
68
AVSS
Ground terminal (for A/D converter)
69
AVREF
I
Reference voltage input terminal (for A/D converter)
70
AVDD
Power supply terminal (+3.3V) (for A/D converter)
71
GFS CD
I
Guard frame sync signal input from the CXD3008Q (IC509)
72
SCLK CD
O
Serial data transfer clock signal output to the CXD3008Q (IC509)
73
DFCT CD
I
Defect signal input terminal    Not used (open)
74
FOK CD
I
Focus OK signal input from the CXD3008Q (IC509)
75
LOCK CD
I
GFS sampled by 460 Hz    “H” input when GFS is “H”
76
XRF AD CE
O
Chip enable signal output to the A/D converter (IC804)
77
DFCT SW
O
Defect selection signal output terminal
78
EEPSIO
I/O
Two-way data bus with the EEPROM (IC903)
79
EEPSCL
O
Clock signal output to the EEPROM (IC903)
80
SIN PC
I
Serial data input from the RS-232C (for check)
81
SOUT PC
O
Serial data output to the RS-232C (for check)
82
SCLK RF
I
Clock signal input from the CXD1881R (IC001)
83
SDATA RF
I/O
Two-way data bus with the CXD1881R (IC001)
84
XWR
O
Write strobe signal output to the SACD decoder (IC701) and expander (IC902)
85
XRD
O
Read strobe signal output to the SACD decoder (IC701) and expander (IC902)
86
NC
Not used (fixed at “H” )
87
VDD
Power supply terminal (+3.3V)  (digital system)
88
VSS
Ground terminal (digital system)
89 to 91
A0 to A2
O
Address signal output to the SACD decoder (IC701) and expander (IC902)
92 to 96
A3 to A7
O
Address signal output to the SACD decoder (IC701)
97
INIT DF
O
Initial signal output to the digital filter (IC301)
98
LATCH DF
O
Latch signal output to the digital filter (IC301)
99
SHIFT DF
O
Shift signal output to the digital filter (IC301)
100
SCDATA DF
O
Serial data output to the digital filter (IC301)
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