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Model
NW-E303
Pages
40
Size
2.07 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
nw-e303.pdf
Date

Sony NW-E303 Service Manual ▷ View online

25
NW-E303
1
GND
2
CE
4
VDD
10k
3 VOUT
Vref
+
Current Limit
1
V1
2
GND
3
EN
5
SW
4
FB
R1
REF
Skip Comparator
Conpensation
Gm
VREF=0.5V
Comparator High
Comparator
S
R
Comparator Low
Comparator Low2
+
+
Undervoltage
Lockout
Blas Supply
V
I
Sawtooth
Generator
+
V(Comp)
Control Logic
Comparator High
Comparator Low
Comparator Low2
1MHz
Oscillator
Soft Start
+
REF
Current Limit Comparator
+
Driver
Shoot-Through
Logic
+
1 VIN
2 VSS
R1
each circuit
R2
Current
Limit
3 CE
4
NC
5
VOUT
+
Voltage
Reference
ON/OFF
Control
IC503  MM3032JRRE
IC509  XC6219B232MR
IC505, IC506  TPS62200DBVR
26
NW-E303
• IC Pin Function Description
MAIN BOARD  IC400  (CXR704060-252GA SYSTEM CONTROLLER, NAND FLASH INTERFACE, USB INTERFACE, AD/DA
CONVERTER, SERIAL INTERFACE)
Pin No.
Pin Name
I/O
Description
1
VDIO0
Power supply terminal (+2.8V)
2
PM4/A12
O
Address bus output to NOR flash memory (IC450)
3
PM5/A13
O
Address bus output to NOR flash memory (IC450)
4
PM6/A14
O
Address bus output to NOR flash memory (IC450)
5
PM7/A15
O
Address bus output to NOR flash memory (IC450)
6
PN0/A16
O
Address bus output to NOR flash memory (IC450)
7
PN1/A17
O
Address bus output to NOR flash memory (IC450)
8
PN2/A18
O
Address bus output to NOR flash memory (IC450)
9
PN3/A19
O
Address bus output to NOR flash memory (IC450)
10
PN4/A20
O
Address bus output to NOR flash memory (IC450)
11
PN5/A21
O
Address bus output (Not used. Fixed +2.8V)
12
PN6/A22
O
Address bus output (Not used. Fixed +2.8V)
13
PN7/A23
O
Address bus output (Not used. Fixed +2.8V)
14
DVSS7
Ground terminal
15
FAD0
I/O
Two-way data bus for NAND flash memory (IC461)
16
FAD1
I/O
Two-way data bus for NAND flash memory (IC461)
17
FAD2
I/O
Two-way data bus for NAND flash memory (IC461)
18
FAD3
I/O
Two-way data bus for NAND flash memory (IC461)
19
FAD4
I/O
Two-way data bus for NAND flash memory (IC461)
20
FAD5
I/O
Two-way data bus for NAND flash memory (IC461)
21
FAD6
I/O
Two-way data bus for NAND flash memory (IC461)
22
FAD7
I/O
Two-way data bus for NAND flash memory (IC461)
23
FCLE
O
CLE signal output to NAND flash memory (IC461)
24
FALE
O
ALE signal output to NAND flash memory (IC461)
25
VDIODF
Power supply terminal (+2.8V)
26
FWE
O
WE signal output to NAND flash memory (IC461)
27
FRE
O
RE signal output to NAND flash memory (IC461)
28
FWP
O
WP signal output to NAND flash memory (IC461)
29
FCE0
O
CE signal output to NAND flash memory (IC461)
30
FRB0
I
RB signal input from NAND flash memory (IC461)
31
FCE1
O
CE signal output to NAND flash memory (IC461)
32
FRB1
I
RB signal input from NAND flash memory (IC461)
33
PP0
O
Battery sensor control signal output
34
PP1
Not used. (Fixed +2.8V)
35
DVDD0
Power supply terminal (+1.2V)
36
DVSS1
Ground terminal
37
VDIO1
Power supply terminal (+2.8V)
38
PO0/D0
I/O
Two-way data bus for NAND flash memory (IC450) and EL display
39
PO1/D1
I/O
Two-way data bus for NAND flash memory (IC450) and EL display
40
PO2/D2
I/O
Two-way data bus for NAND flash memory (IC450) and EL display
41
PO3/D3
I/O
Two-way data bus for NAND flash memory (IC450) and EL display
42
PO4/D4
I/O
Two-way data bus for NAND flash memory (IC450) and EL display
43
PO5/D5
I/O
Two-way data bus for NAND flash memory (IC450) and EL display
44
PO6/D6
I/O
Two-way data bus for NAND flash memory (IC450) and EL display
45
PO7/D7
I/O
Two-way data bus for NAND flash memory (IC450) and EL display
46
PB0/D8
I/O
Two-way data bus for NAND flash memory (IC450)
47
PB1/D9
I/O
Two-way data bus for NAND flash memory (IC450)
27
NW-E303
Pin No.
Pin Name
I/O
Description
48
PB2/D10
I/O
Two-way data bus for NAND flash memory (IC450)
49
PB3/D11
I/O
Two-way data bus for NAND flash memory (IC450)
50
PB4/D12
I/O
Two-way data bus for NAND flash memory (IC450)
51
PB5/D13
I/O
Two-way data bus for NAND flash memory (IC450)
52
PB6/D14
I/O
Two-way data bus for NAND flash memory (IC450)
53
PB7/D15
I/O
Two-way data bus for NAND flash memory (IC450)
54
PA0/PWM
I/O
Port A (Not used. Fixed +2.8V)
55
PA1/SDA
I/O
Port A (Not used. Fixed +2.8V)
56
PA2/SCL
I/O
Port A (Not used. Fixed +2.8V)
57
PC0/SCK0
I/O
Port C (Not used. Fixed +2.8V)
58
PC1/SO0
I/O
Port C (Not used. Fixed +2.8V)
59
PC2/SI0
I/O
Port C (Not used. Fixed +2.8V)
60
PC3/SCS0
I/O
Port C (Not used. Fixed +2.8V)
61
DVSS2
Ground terminal
62
VDIO2
Power supply terminal (+2.8V)
63
KDI
I
Serial data input for EEPROM (Not used. Fixed +2.8V)
64
KRB
I
Ready/Busy signal input for EEPROM (Not used. Fixed ground)
65
KCLK
O
Serial clock output for EEPROM (Not used. Fixed open)
66
KCS
O
Chip select signal output to EEPROM (Not used. Fixed open)
67
KDO
O
Serial data output for EEPROM (Not used. Fixed open)
68
TEST4
I
Input terminal for the test mode setting (Not used. Fixed ground)
69
PE0/TxD0
O
Transmit data output to UART(CH0) (Not used. TP402 TXD0)
70
PE1/RxD0
I
Recieve data input from UART(CH0) (Not used. TP403 RXD0)
71
PE2/TXD1
O
Transmit data output to UART(CH0) (Not used. TP404 TXD1)
72
PE3/RXD1
I
Recieve data input from UART(CH0) (Not used. TP405 RXD1)
73
PE4/SCK1
O
Serial clock output to real time clock (IC401)
74
PE5/SO1
O
Serial data output to real time clock (IC401)
75
PE6/SI1
I
Serial data input from real time clock (IC401)
76
PE7/SCS1
O
Chip enable signal output to the real time clock (IC401)
77
TEST5
O
Test mode output terminal (Not used. Fixed open)
78
DVDD1
Power supply terminal (+1.2V)
79
DVSS3
Ground terminal
80
VDIO3
Power supply terminal (+2.8V)
81
PF0/EC0/INT3
I
Interruput request signal input terminal (Not used. TP705 GROUP)
82
PF1/T1
O
8 bit timer (CH1) output terminal (Not used. Fixed ground)
83
PF2/EC2/INT4
I
PLAY/STOP key input terminal
84
PF3/T3
O
Battery charge control signal output (H:USB charge 500mA)
85
PF4/BEEP
O
Beep signal output
86
PG0/DACK0
I
Battery charge control signal input (L:charging)
87
PG1/DREQ0/INT5
I
HOLD switch input
88
PG2/DACK1/INT6
I
Interruput request signal input terminal (Not used. Fixed +2.8V)
89
PG3/DREQ1/INT7
I
Interruput request signal input terminal (Not used. Fixed ground)
90
TEST2
I
Input terminal for the test mode setting (Not used. Fixed ground)
91
TEST3
I
Input terminal for the test mode setting (Not used. Fixed ground)
92
TEST0
I
Input terminal for the test mode setting (Not used. Fixed ground)
93
TEST1
I
Input terminal for the test mode setting (Not used. Fixed ground)
94
TEST6
O
Test mode output terminal (Not used. Fixed open)
95
EVA
I
EVA mode select input (Fixed ground)
96
AVSAD
Ground terminal for A/D converter
28
NW-E303
Pin No.
Pin Name
I/O
Description
97
AVDAD
Power supply terminal (+2.3V) for A/D convertor
98
AN0
I
ADC analog input terminal (Not used)
99
AN1
I
ADC analog input terminal
100
AN2
I
ADC analog input terminal (Not used)
101
AN3
I
ADC analog input terminal
102
AN4
I
ADC analog input terminal
103
AN5
I
ADC analog input terminal
104
AN6/INT8
I
ADC analog input terminal
105
AN7/INT9
I
ADC analog input terminal
106
RST
I
Reset signal input
107
RAMBK
I
RAM backup control signal input terminal (Not used. Fixed 1.2V)
108
VDBK
I
Power supply terminal (+1.2V) for RAM backup
109
TDI
I
Data input terminal for JTAG (Not used. Fixed +2.8V)
110
TMS
I
Test mode control signal input terminal for JTAG (Not used. Fixed +2.8V)
111
TCK
I
Clock signal input terminal for JTAG (Not used. Fixed +2.8V)
112
TRST
I
Reset signal input terminal for JTAG (Not used. Fixed ground)
113
TDO
O
Data output terminal for JTAG (Not used. Fixed open)
114
VDIOJT
Power supply terminal (+2.8V) for JTAG
115
DVDD2
Power supply terminal (+1.2V)
116
DVSS4
Ground terminal
117
VDIO4
Power supply terminal (+2.8V)
118
PD0/CONNECT
O
Read/Write control signal output to tuner (IC1)
119
PD1/XVDATA
O
Serial clock output to tuner (IC1)
120
PD2/DPLS
I/O
Two-way Serial data terminal for tuner (IC1)
121
PD3/DMNS
O
Enable signal output to tuner (IC1)
122
PD4/TXDPLS
O
Not used (TP407 PD4)
123
PD5/TXDMNS
O
Not used (Fixed +2.8V)
124
PD6/TXENL
O
Not used (Fixed +2.8V)
125
PD7/SUSPEND
O
Not used (Fixed +2.8V)
126
VBUS
I
USB power signal input terminal
127
VDIOUS
Power supply terminal (+3.3V) for USB
128
UDM
I/O
Two-way data signal for USB D–
129
UDP
I/O
Two-way data signal for USB D+
130
TRON
O
UDP pull-up resistor control terminal
131
AVSDA
Ground terminal
132
VREFR
O
DAC reference voltage output (R-ch)
133
AOUTR
O
DAC analog audio signal output (R-ch)
134
AOUTL
O
DAC analog audio signal output (L-ch)
135
VREFL
O
DAC reference voltage output (L-ch)
136
AVDDA
Power supply terminal (+2.3V) for D/A convertor
137
XTAL
O
Main system clock output terminal
138
EXTAL
I
Main system clock input terminal
139
AVDMO
Power supply terminal (+2.3V) for main system clock
140
AVSOSC
Ground terminal
141
TX
O
Sub system clock output terminal
142
TEX
I
Sub system clock input terminal
143
AVDUO
Power supply terminal (+2.8V) for sub system clock
144
AVSPLL
Power supply terminal (+2.8V) for PLL
145
AVDPLL
Ground terminal
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