Sony MHC-RG222 (serv.man2) Service Manual ▷ View online
43
MHC-RG222(HCD-RG222)
IC101 BD3401KS2 (PLACA PRINCIPAL)
IC201 BA3126N (PLACA PRINCIPAL)
1
REC SW1
2
3
PB SW1
GND
4
CONT
5
GND
6
V
CC
7
PB SW2
8
GND
9
REC SW2
IC371 BU2099FV (PLACA PRINCIPAL)
V
SS
N.C.
DATA
CLOCK
LCK
OUTPUT BUFFER (Open Drain)
12BIT SHIFT REGESTER
Q0
Q1
Q2
Q3
Q4
12BIT STORAGE
RAGESTER
RAGESTER
CONTOROL
CIRCUIT
L. P. F
V
DD
OE
SO
Q11
Q10
Q9
Q8
Q7
Q6
Q5
1
2
3
5
6
7
8
4
10
16
15
14
13
12
11
9
17
18
19
20
0
+
TNF2
TNF1
SUR1
SUR2
LINEOUT2
LINEOUT1
SAOUT2
SAOUT1
CAP
MIC
GAME L
GAME R
TUNER L
TUNER R
MD L
MD R
VOLOUT1
TONE OUT1
TONE OUT2
AMS OUT
BNF2
BNF1
MNF1
MNF2
MOUT1
MOUT2
BOUT2
BOUT1
BBNF1
BBIN1
VIN1
VIN2
VOLOUT2
BBNF2
BBIN2
LF1
LF2
LF3
LF4
SWOUT
FILTER
1/2 Vcc
Vcc
GND
VDD
SI
SC
ALC
CD L
CD R
TAPE L
TAPE R
PBNF2
PBNF1
PBOUT2
PBOUT1
TAPE A1
TAPE A2
TAPE B1
TAPE B2
RECNF2
RECNF1
DIGITAL
CONTROL
Di-LIMITER
RECOUT2
RECOUT1
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
47
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
SURROUND
ATT
ATT
BUFFER
MIX
MIC MIX
VOCAL FADER
+
-
+
-
BASS MIDDLE TREBLE
BASS MIDDLE TREBLE
G
fc=100HZ
f
ALC
ALC
INPUT
SELECTOR
+
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
49
SOFT
SWITCH
+
+
-
+
-
+
44
MHC-RG222(HCD-RG222)
5-19. DESCRIÇÃO DE FUNÇÃO DO PINO DE IC
• IC101 CXD3059AR (RF AMP) (PLACA BD81A )
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
I/O
I/O
I/O
I/O
—
I/O
O
I
—
O
O
O
O
O
O
—
—
—
—
I
I
I
O
I
O
I/O
I
I
I
I
—
—
O
I
O
I
O
I
—
I
—
O
I
—
I
I
O
O
I
—
Pin Name
MIRR
DFCT
FOK
VSS
LOCK
MDP
SSTP
IOVSS1
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
IOVDD1
AVDD0
AVSS0
NC
E
F
TEI
TEO
FEI
FEO
VC
A
B
C
D
NC
AVDD4
RFDCO
PDSENS
AC_SUM
EQ_IN
LD
PD
NC
RFC
AVSS4
RFACO
RFACI
AVDD3
BIAS
ASYI
ASYO
VPCO
VCTL
AVSS3
Description
Mirror signal input/output (Not used)
Defect signal input/output (Not used)
Focus OK signal input/output (Not used)
Internal digital ground
GFS is sampled at 460Hz; when GFS is high , this pin outputs a high signal
If GFS is low eight consecutive
Spindle motor servo control output
Disk innermost detection signal input
I/O digital ground
Sled drive output
Sled drive output
Tracking drive output
Tracking drive output
Focus drive output
Focus drive output
I/O digital power supply
Analog power supply
Analog ground
Not used
E signal input
F signal input
Tracking error signal input to DSSP block
Tracking error signal output from RF amplifier block
Focus error signal input to DSSP block
Focus error signal output from RF amplifier block
Center voltage output from RF amplifier block
A signal input
B signal input
C signal input
D signal input
Not used
Analog power supply
RFDC signal output (Not used)
Reference voltage pin for PD
RFAC summing amplifier output
Equalizer circuit input
APC amplifier output
APC amplifier input
Not used
Equalizer cut-off frequency adjustment pin
Analog ground
RFAC signal output
RFAC signal input or EFM signal input
Analog power supply
Asymmetry circuit constant current input
Asymmetry comparator voltage input
EFM full-swing output (Low = VSS, High = VDD)
Wide-band EFM PLL charge pump output
Wide-band EFM PLL VCO2 control voltage input
Analog ground
45
MHC-RG222(HCD-RG222)
Pin No.
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
I/O
I
O
I
O
—
O
I
—
I
—
I
I
I
O
—
O
O
—
O
I
—
O
I
I
—
—
—
O
I
—
—
O
O
—
—
O
O
—
—
—
O
O
—
I
—
I
O
I
Pin Name
CLTV
FILO
FILI
PCO
AVDD5
DDVROUT
DDVRSEN
AVSS5
DDCR
NC
BCKI
PCMDI
LRCKl
LRCK
VSS
PCMD
BCK
VDD
EMPH
EMPHI
IOVDD2
DOUT
TEST
TES1
IOVss2
NC
XVSS
XTAO
XTAI
XVDD
AVDD1
AOUT1
VREFL
AVSS1
AVSS2
VREFR
AOUT2
AVDD2
NC
IOVDD0
RMUT
LMUT
NC
XTSL
IOVSS0
XTACN
SQSO
SQCK
Description
Multiplier VCO1 control voltage input
Master PLL (slave = digital PLL) filter output
Master PLL filter input
Master PLL charge pump output
Analog power supply
DC/DC converter output
DC/DC converter output voltage monitor pin
Analog ground
DC/DC converter reset pin
Not used
D/A interface bit clock input
D/A interface serial data input (2’s COMP, MSB first)
D/A interface LR clock input
D/A interface LR clock output f = Fs
Internal digital ground
D/A interface serial data output (2’s COMP, MSB first)
D/A interface bit clock output
Internal digital power supply
High when the playback disc has emphasis, low it has not
High when de-emphasis is ON, low when input OFF
I/O digital power supply
Digital Out output
Test pin Normally ground
Test pin Normally ground
I/O digital ground
Not used
Master clock ground
Crystal oscillation circuit output
Crystal oscillation circuit input
Master clock power supply
Analog power supply
Lch analog output
Lch reference voltage
Analog ground
Analog ground
Rch reference voltage
Rch analog output
Analog power supply
Not used
I/O digital power supply
Rch “0” detection flag (Not used)
Lch “0” detection flag (Not used)
Not used
Crystal selection input (Not used)
I/O digital ground
Oscillation circuit control
Self-oscillation when high, oscillation stop when low
Subcode Q 80-bit and PCM peak and level data output
CD TEXT data output
SQSO readout clock input
46
MHC-RG222(HCD-RG222)
Pin No.
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
Pin Name
SBSO
EXCK
XRST
SYSM
D ATA
VSS
XLAT
CLOCK
VDD
SENS
SCLK
ATSK
WFCK
XUGF
XPCK
GFS
C2PO
SCOR
VDD
C4M
WDCK
COUT
NC
I/O
O
I
I
I
I
—
I
I
—
O
I
I/O
O
O
O
O
O
O
—
O
O
I/O
—
Description
Subcode P to W serial output
SBSO readout clock input
System reset Reset when low
Mute input Muted when high
Serial data input from CPU
Internal digital ground
Latch input from CPU The serial data is latched at the falling edge
Serial data transfer clock input from CPU
Internal digital power supply
SENS output to CPU
SENS serial data readout clock input
Anti-shock input/output
WFCK output (Not used)
XUGF output (Not used)
XPCK output (Not used)
GFS output (Not used)
C2PO output (Not used)
High output when the subcode sync, S0 or S1, is detected
Internal digital power supply
4 2336MHz output (Not used)
Word clock output f = 2Fs (Not used)
Track number count signal input/output (Not used)
Not used
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