Sony ICF-CD873L Service Manual ▷ View online
– 37 –
IC503
BA5930FP
REG.
REG IN
REG OUT
SL-IN
SL-OUT–
SL-OUT+
SL-NF
MUTE
GND
F-IN
F-OUT+
F-OUT–
SP-IN+
SP-IN–
F-NF
VCC
VCC
VREF
T-NF
T-IN
GND
T-OUT+
T-OUT–
SP-NF
SP-IN
SP-OUT–
SP-OUT+
GND
SP-OUT
4
5 6
7
3
1
2
11 12 13 14
10
9
8
27
28
26
18
20
21
22
23
24
25
19
17
16 15
+
–
–
+
–
–
+
–
–
+
–
+
–
+
–
+
–
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
MUTE
CONTROL
IC502
CXD2508AQ
MDP
MDS
LOCK
TEST
FILO
FILI
PCO
VDD
A
VSS1
CL
TV
A
VDD1
RF
BIAS
ASYI
A
YSO
ASYE
MNT0
MNT1
MNT3
XROF
C2PO
VSS
RFCK
GFS
XPCK
XUGF
GTOP
BCKI
BCK
PCMDI
PCMD
LRCKI
LRCK
WDCK
C4M
FSTT
WFCK
EMPHI
EMPH
DOUT
DTS3
DTS2
RPWM
NRPWM
A
VSS2
A
VSS3
XT
AO
XT
AI
A
VDD3
A
VDD2
LPWM
NLPWM
VDD
DTS1
ZEROL
ZEROR
SEIN
CNIN
DATO
XLTO
CLKO
SPOA
SPOB
SPOC
XTSL
XLON
FOK
MON
ERROR
CORRECTOR
CLOCK
GENERATOR
DIGITAL FILTER &
1 BIT D/A CONVERTER
16K
RAM
SUB CODE
PROCESSOR
CPU
INTERF
ACE
SERVO
AUTO
SEQUENCER
DIGITAL
PLL
EFM
DEMODULATOR
INTERNAL BUS
ASYMMETRY
CORRECTOR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
22
23
24
25 26 27 28
29 30 31 32 33 34 35 36 37 38 39 40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
DIGITAL
CLV
D/A
INTERF
ACE
DIGITAL
OUT
61
SCOR
SBSO
EXCK
SQSO
SQCK
MUTE
SENS
XRST
DATA
XLAT
CLOK
VSS
– 38 –
– POWER Board –
IC350
LA4601N
OUT1
GND
VCC
OUT2
IN2
GND
IN1
FIL
TER
P.
P.
ST
ANDBY
10
9
8
7
6
5
4
3
2
1
PRE
DRIVE AMP
INPUT
AMP
STANDBY
SWITCH
RIPPLE
FILTER
TSD
PROTECTOR
POP NOISE
PREVENTION
CIRCUIT
REFERENCE
AMP
OUTPUT
AMP
PRE
DRIVE AMP
INPUT
AMP
OUTPUT
AMP
IC351
BA5417
STANDBY
T.S.D.
BS
FILTER
PRE GND2
PRE GND1
NF2
IN2
IN1
NF1
FIL
TER
STBY
POWER GND
BS1
OUT1
VCC
OUT2
10
3 4 5
6
BS
BS2
2
NC
1
8
9
7
11 12
13
14 15
+
–
–
+
–
–
– 39 –
6-8.
IC PIN FUNCTION DESCRIPTION
•
MAIN BOARD IC401
µ
PD753012AGC-F17-3B9 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1 to 10
SEG12 to SEG21
O
Segment drive signal output to the liquid crystal display (LCD401)
11, 12
SEG22, SEG23
O
Segment drive signal output terminal Not used (open)
13 to 16
KS0 to KS3
O
Key strobe signal output to the key matrix
17
VERSION1
O
Initialize destination output terminal
18
VERSION2
O
Initialize destination output terminal
19
ALARM
O
Alarm data output terminal Not used (open)
20
BASS ON
O
Mega bass on/off selection signal output to the mega bass power amplifier (IC351)
“L”: mega bass on
“L”: mega bass on
21 to 23
COM0 to COM2
O
Common drive signal output to the liquid crystal display (LCD401)
24
COM3
O
Common drive signal output terminal Not used (open)
25
BIAS
O
Bias output for the liquid crystal display drive
26 to 28
VLC0 to VLC2
—
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive voltage
29
CD ADJ
I/O
At initial mode: Setting terminal for the test mode (manual mode) “L”: manual mode
At normal mode: E-F balance control signal output to the CXA1782BQ (IC501) “H” active
At normal mode: E-F balance control signal output to the CXA1782BQ (IC501) “H” active
30
CLOCK
O
Serial data transfer clock signal output to the CXD2508AQ (IC502)
31
XLT
O
Serial data latch pulse signal output to the CXD2508AQ (IC502)
32
DATA
O
Serial data output to the CXD2508AQ (IC502)
33
VSS
—
Ground terminal
34
X-RESET
O
System reset signal output to the CXA1782BQ (IC501), CXD2508AQ (IC502) and BA6196FP
(IC503) “L”: reset
(IC503) “L”: reset
35
POWER ON
O
Front side speaker on/off selection signal output terminal “L”: speaker on
36
CD ON
I/O
At initial mode: Setting terminal for the test mode (auto mode) “L”: auto mode
At normal mode: Power on/off control signal output for the CD +5V power supply
“L”: CD power on
At normal mode: Power on/off control signal output for the CD +5V power supply
“L”: CD power on
37
R-LAT
O
PLL serial data latch pulse signal output to the FM/AM PLL (IC50)
38
AC IN
I
Power failure detection input terminal “L”: power failure, “H”: power on
39
CK
O
At CD mode: Subcode Q data reading clock signal output to the CXD2508AQ (IC502)
At tuner mode: PLL serial data transfer clock signal output to the FM/AM PLL (IC50)
At tuner mode: PLL serial data transfer clock signal output to the FM/AM PLL (IC50)
40
DATA
O
PLL serial data output to the FM/AM PLL (IC50)
41
SQSI
I
Subcode Q data (80 bit serial) input from the CXD2508AQ (IC502)
42
SENS
I
Internal status signal (sense signal) input from the CXD2508AQ (IC502)
43
CIN
I
Track jump count detect signal input from the CXA1782BQ (IC501)
44
SCOR
I
Subcode sync (S0+S1) detection signal input from the CXD2508AQ (IC502)
45
AUTO/MANU
I
Setting terminal for the CD adjustment mode (auto mode/manual mode)
“L”: auto mode, “H”: manual mode (fixed at “L”)
“L”: auto mode, “H”: manual mode (fixed at “L”)
46
DATA
O
Serial data output terminal Not used (open)
47
CLK
O
Serial data transfer clock signal output terminal Not used (open)
48
LAT
O
Serial data latch pulse signal output terminal Not used (open)
49
BUZZER
O
Buzzer sound drive signal output terminal
50
V-RESET
O
Reset signal output terminal “L”: reset Not used (open)
51
NAR
I
Not used (open)
52
V MUTE
O
Voice muting on/off selection signal output terminal “H”: muting on
53
A MUTE
O
Audio line muting on/off selection signal output terminal “L”: muting on
54
VDD
—
Power supply terminal (+5V)
55
XT1
I
Sub system clock input terminal (32.768 kHz)
56
XT2
O
Sub system clock output terminal (32.768 kHz)
– 40 –
Pin No.
Pin Name
I/O
Description
57
IC
—
Internal connection terminal (connected to power supply)
58
X1
I
Main system clock input terminal (4.194 MHz)
59
X2
O
Main system clock output terminal (4.194 MHz)
60
SHIFT CK
O
Shift clock output of the main system clock (4.194 MHz) “H” active
61
COLOR
O
LCD back light color selection signal output terminal “L”: amber, “H”: green
62
DOOR-IN
I
CD lid open/close detection switch (S424) input terminal “L”: CD lid is closed
63 to 67
KEYRET0 to
KEYRET4
I
Key return signal input from the key matrix
68
RESET
I
System reset signal input from the reset signal generator (IC402) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
69
SEG0
O
Segment drive signal output terminal Not used (open)
70 to 80
SEG1 to SEG11
O
Segment drive signal output to the liquid crystal display (LCD401)
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