Sony ICD-S7 Service Manual ▷ View online
9
ICD-S7
4. Sleep test
• Pressing the x
• Pressing the x
•B key causes the set to enter the sleep state.
• When the HOLD switch is ON, the LCD is turned off. When
OFF, the LCD is turned on.
• Press any keys to exit the sleep state.
5. Beep test
• Beep sound of 1.3 kHz or 2 kHz is output.
• Beep sound of 1.3 kHz or 2 kHz is output.
6. SIO test
• Perform the connection test of the RTC, EEPROM and serial to
• Perform the connection test of the RTC, EEPROM and serial to
parallel conversion IC.
• As to the test result, if all of the connection test are OK,
“****OK****” is displayed. If the connection test of the RTC is
NG, “**RTCNG**” is displayed. If the EEPROM is NG,
“**EEPNG**” is displayed.
NG, “**RTCNG**” is displayed. If the EEPROM is NG,
“**EEPNG**” is displayed.
7. Key entry test
• When the any key is pressed, the entry key and the A/D converted
• When the any key is pressed, the entry key and the A/D converted
value (hexadecimal) of the two channel keys are displayed.
• When the STOP key is pressed, the A/D value of the key is
displayed while the key is depressed. When the key is released,
the screen returns to the test menu.
the screen returns to the test menu.
8. Battery remaining power test
• The detected A/D value (hexadecimal) of the battery remaining
• The detected A/D value (hexadecimal) of the battery remaining
power is displayed.
9. LED/EL test
• LED (red and green) and EL are all turned on.
• LED (red and green) and EL are all turned on.
any keys
any keys
SLEEP TEST
SLEEP IN
LCD OFF
(with HOLD OFF status)
x•B
(with HOLD ON status)
x•B
x•B
BEEP TEST
1.3K BEEP
2.0K BEEP
1.3K BEEP
1.3K BEEP
2.0K BEEP
:
:
(set)
x•B
(select),
.
>
STOP
STOP
STOP
x•B
SIO TEST
SIO OK
STOP
x•B
KEY TEST
0-FF 1-FF
STOP
x•B
BATT TEST
STOP
10. USB test
• When the menu starts the USB self-check, either presence or
• When the menu starts the USB self-check, either presence or
absence of the Vbus is judged.
(Vbus is present: “VBUS: ON”, Vbus is absent: “VBUS: OFF”)
(Vbus is present: “VBUS: ON”, Vbus is absent: “VBUS: OFF”)
• The USB driver always works regardless of presence or absence
of the USB signal only when Vbus is available during the USB
test. At this time, turning on HOLD causes the set to move to the
suspend state. Turning off the Vbus causes the set to return to the
test menu.
test. At this time, turning on HOLD causes the set to move to the
suspend state. Turning off the Vbus causes the set to return to the
test menu.
11. DC-IN test
LCD : Detection result of external DC power supply is display is
LCD : Detection result of external DC power supply is display is
displayed of LCD.
12. DATA READ test (not used)
Not use for test command design check or verification.
Not use for test command design check or verification.
13. Rest menu
• Pressing the x
• Pressing the x
•B key causes the set to enter the menu
initialization standby state.
• When the following keys are all entered and the x
•B key is
pressed, the initialization is executed. At the same time, the
WakeUp signal is checked, too.
WakeUp signal is checked, too.
Check keys: VOLUME+ , VOLUME– , A-B REPEAT ,
INDEX , STOP , zREC , ERASE , . ,
x•B , > , MENU , FOLDER
and check states of Memory Stick insert and
outsert ( EJECT ).
x•B , > , MENU , FOLDER
and check states of Memory Stick insert and
outsert ( EJECT ).
• If all tests end in success, “**ALLOK**” is displayed. If the key
entry is NG or if any of the keys is not pressed yet, “**KEYNG**”
appears. If saving in the EEPROM is NG, “**MENUNG**”
appears.
appears. If saving in the EEPROM is NG, “**MENUNG**”
appears.
x•B
LED TEST
LED EL ON
STOP
x•B
RESET
RESET KEY
RESET OK
x•B
In the case that the key entry
and saving in the EEPROM end correctly,
after the check key is entered.
and saving in the EEPROM end correctly,
after the check key is entered.
STOP
STOP
x•B
Suspend
USB
VBUS ON
LCD OFF
When Vbus is on, HOLD key turns on.
STOP
or cut Vbus
or cut Vbus
STOP
cut Vbus
cut Vbus
x•B
DC JACK
JACK ON OFF
( )
STOP
10
ICD-S7
SECTION 4
DIAGRAMS
Note on Schematic Diagrams:
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
f
: internal component.
•
C
: panel designation.
•
A
: B+ Line.
• Power voltage is dc 3V and fed with regulated dc power
supply from battery terminal.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : REC
[
no mark : REC
[
] : PB
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
F
: PB
L
: REC
*
Replacement of IC6201, IC7102 used in this set requires
a special tool.
a special tool.
•
The voltage and waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
from that of conventional IC.
cannot be measured, because its lead layout is different
from that of conventional IC.
Note on Printed Wiring Boards:
• Y
• Y
: parts extracted from the conductor side.
• b
: Pattern from the side which enables seeing.
Caution:
Pattern face side:
Pattern face side:
Parts on the pattern face side seen from
(SIDE B)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(SIDE A)
the parts face are indicated.
*
Replacement of IC6201, IC7102 used in this set requires
a special tool.
a special tool.
•
Lead layouts
• WAVEFORMS
surface
Lead layout of
conventional IC
CSP (chip size package)
1
IC7101 wd (SCK1)
2
IC7101 wl (SIPCLK)
3
IC7101 es
(DSPSYSCK)
5
IC7101 ej (MSCLK)
6
IC7101 yd (CF2)
8
IC8101 qd (X OUT)
(USB Connection)
2 V/DIV, 4
µs/DIV
2 V/DIV, 40 ns/DIV
2 V/DIV, 4
µs/DIV
2 V/DIV, 200 ns/DIV
1 V/DIV, 40 ns/DIV
5.7
µ
s
567 ns
3.0 Vp-p
4 Vp-p
70 ns
3.1 Vp-p
3.9 Vp-p
71 ns
2 V/DIV, 20 ns/DIV
2 V/DIV, 40 ns/DIV
3.7 Vp-p
8.33 ns
5.1
µ
s
3.1 Vp-p
4.0 Vp-p
50 ns
4
IC7101 ef (FSCLK)
2 V/DIV, 10
µs/DIV
31
µ
s
3.0 Vp-p
7
IC7113 wd (XO)
11
11
ICD-S7
4-1. Block Diagrams – Main Section-1 –
Signal path
: REC
: PB
33
23
91
24
34
30
29
92
2
34
28
27
42
40
4
2
32
22
14
14
25
17
13
15
33
6
44
5
11
39
40
30
31
25
26
28
27
1
2
48
47
11
10
9
43
45
46
13
MIC3201
13
7
11
2
3
12
8
5
6
10
9
4
14
IC7107
SI/PO DRIVER
DATA
CLOCK
XLMUTE
SPPWR
HPPWR
HPMUTE
XREDLED
XGREENLED
XDSPRST
XEEPCS
15
XUSBRST
EEPRST
MICSEL
MICSEL
XBATTEN
XBATTEN
MICSENSE
D7102
RED(REC)
GREEN(PB)
6
3
1
IC6202
CLOCK GEN
IC7101 (1/3)
CPU
CLKIN
CE
Q0
Q1201,2201
MUTE
Q3201
SWITCH
Q3202
SWITCH
Q3206
SWITCH
J3201
(SPEAKER)
2
3
4
1
6
4
5
6
7
3
8
IC7106
EEPROM
IC7108
REAL TIME CLOCK
SK
DI
DO
CS
RESET
CLK
DATA
CE0
CE1
/AIRQ
/TIRQ
IC3201
MIC AMP, AGC,
HP AMP, POWER AMP
MICIN
35 MICVCC
LGAININ
BIASOUT
ROUT
LOUT
SPOUT+
SPOUT-
AGCDET
AGCSW
STBYSW
STBYSW
GAINSW
RECOUT
RIN
LIN
BEEPIN
MICPWR
HPPWR
SPPWR
MUTE
IC3202
ADC, DAC
RIN1
LIN1
ROUT2
LOUT2
OPGAR
ROUT1
OPGAL
LOUT1
STDO
STDO
BCLK
LRCK
SDTI
CDTI
CDTO
CCLK
XCS
XRST
XPD
MCK0
BCLK
LRCK
SO
ADACDTO
ADACDTI
ADACCLK
XADACS
XRST
MCLK
XUSBRST
HPJACK
AUPWR
AUPWR
SIPCLK
BEEP
5
MICPWR
FSCLK
R
TCCS
SDO1
SDI1
SCK1
SP3201
B
A
C
F
D
E
WAKEUP
(OPR)
MIC
MIC
1
3
4
HPPWR
Q3207
Q1202,2202
Q3203,3208,
3209
3209
DSPIVDD
IC3204
12
12
ICD-S7
– Main Section-2 –
Signal path
: REC
: PB
68-75,
77-84
23-34,
37-40
43-49,
51-58,
51-58,
26,27
12,17,18,23,
29,35,36,42,
29,35,36,42,
7,13,14,20,
26,32,31,37
3-5,9,10,
15,16,22,
44-47,39,40,
33,34,28
16
42
17
41
1
8
XWE
XLB
LB
WE
WE
UB
XUB
7
31
60
20
20
6
USBDET
DREQ
XUSBCS
XUSBIRQ
D0-D15
56-53,
42-39
29-32,
41-44
MD0-MD7
I/O1-I/O16
A0-A16
A0-A16
A0-A16
15
3
11
2
XSRCS
XOE
XOE
OE
CS
CS
IC7102
S-RAM
S-RAM
IC6203
FLASH MEMORY
45
35
47
40
8
7
6
5
138
46
48
52
159
150
49
160
157
50
55
158
11
12
5
2
6
3
1
14
13
12
35
32
8
38
37
39
62
63
13 MICSENSE
MICSENSE
2
5
1
IC7112
D-FF
D
CK
Q
8
9
17
CE
RE
RE
ALE
CLE
R/B
I/O1-I/O8
16
7
19
21
18 WE
WP
XRST
XWE
XRE
XCE0
ALE
CLE
XBSY
IC7103
FLASH MEMORY
IC7113
MEMORY CONTROL
IC6201
DSP
ADASI
BCLK
LRCLK
SO
ADACDTO
ADACDTI
ADACCLK
XADACS
XRST
MCLK
TSO
TSCK
TSOEN
TSIEN
TSIOEN
TSI
REQ
CLKIN
FMSDIO
FMSCK
XFMWP
XFMCS
SDI
SDO
SCK
XWP
XCS
SDI0
SCK0
XDSPSIOEN
SDO0
DSPIFREQ
DSPSYSCK
MSDIO
MSCLK
MSBS
SDIO
SCKI
SBS
CF1
CF2
X7101
14.112MHz
14
13
XIN
5
VBUS
3
D-
4
D+
6
TRON
XOUT
X8102
12MHz
12MHz
24
23
XI
XO
X7102
20MHz
20MHz
G
D
A
IC7101 (2/3)
CPU
IC5108
D8101
2
1
Q7103
SWITCH
Q7102
SWITCH
47
45
42
41
44
43
17-22
DREQ0
CS
46
RST
INT0
HWR
LWR
RD
D0 - D15
D0 - D15
D0 - D15
A1 - A6
A0 - A5
1
2
3
VBUS
D-
D+
IC8101
USB CONTROLLER
VOLTAGE
DETECT
CN8101
KEYGND
H
E
DDCOUT
XUSBRST
φ
STDO
BCLK
LRCK
SO
ADACDTO
ADACDTI
ADACCLK
XADACS
XRST
MCLK
6
9
3
37
52
51
47
49
50
2
1
IC7114
RESET
MSVDD
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