Sony ICD-S7 Service Manual ▷ View online
25
ICD-S7
4-12. IC Pin Function Descriptions
• IC6201 uPD77213F1-004-DA2 (DSP) (AUDIO BOARD)
Pin No.
1 to 3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41 to 44
45
46
47
48
49
50
51
52
53
54
55
56
57
I/O
—
—
O
I/O
I
O
O
—
O
O
O
—
—
—
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I/O
I/O
—
—
I
I
I
I
I
O
O
O
O
—
—
I/O
—
I
I
I/O
O
I
I
—
I
O
O
I
—
O
Description
Not used
I/O power supply (3.0 V)
AD/DA chip select
AD/DA clock
AD/DA data input
AD/DA data output
Microphone power supply control (Not used)
GND
Boot flash ROM write protect
Boot flash ROM chip select
Micropone sensitivity select (H: Conference, L: Dictation)
GND
Not used
I/O power supply (3.0 V)
Host data bus (Not used)
Host data bus (Not used)
Host data bus (Not used)
Host data bus (Not used)
Host data bus (Not used)
Host data bus (Not used)
GND
Core power supply (1.5 V)
Host data bus (Not used)
Host data bus (Not used)
GND
I/O power supply (3.0 V)
Host chip select (Pull-up)
Host data access 1 (Pull-down)
Host write (Pull-up)
Host data access 0 (Pull-down)
Host read (Pull-up)
Not used
Serial data output
Host write enable (Not used)
Host read enable (Not used)
GND
I/O power supply (3.0 V)
Bit clock
Not used
ADA serial data input
Master clock
Clock for L-ch and R-ch (H: L-ch, L: R-ch)
Time sharing serial data output
Time sharing serial clock input
Time sharing serial output enable
GND
Time sharing serial data input
Time sharing serial input response (Not used)
Time sharing serial output request (Note used)
Time sharing serial input enable
I/O power supply (3.0 V)
Memory address bus 1 (Not used)
Pin Name
NC
EVDD
XADACS
ADACCLK
ADACDTI
ADACDTO
MICPWR
GND
XFMWP
XFMCS
MICSENSE
GND
NC
EVDD
HD1
HD2
HD0
HD3
HD5
HD4
GND
IVDD
HD7
HD6
GND
EVDD
XHCS
HA1
XHWR
HA0
XHRD
TIMOUT
SO
XHWE
XHRE
GND
EVDD
BCLK
NC
ADASI
MCLK
LRCLK
TSO
TSCK
TSOEN
GND
TSI
TSIAK
TSORQ
TSIEN
EVDD
MA1
26
ICD-S7
Pin No.
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81 to 84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Pin Name
MA0
GND
IVDD
MA2
MA4
GND
MA3
MA7
MA5
MA8
MA6
MA9
MA10
GND
EVDD
MA11
MA12
MA14
MA13
MA16
MA15
EVDD
MA17
NC
EVDD
MA18
MA19
XMHOLDAK
XMRD
XMHOLDRQ
GND
EVDD
XMWAIT
XMWR
GND
IVDD
XMBSTB
MD0
GND
MD3
MD1
MD4
MD5
MD6
MD2
MD8
GND
EVDD
MD7
MD13
MD10
MD11
I/O
O
—
—
O
O
—
O
O
O
O
O
O
O
—
—
O
O
O
O
O
O
—
O
—
—
O
O
O
O
I
—
—
I
O
—
—
O
I/O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
Description
Memory address bus 0 (Not used)
GND
Core power supply (1.5 V)
Memory address bus 2 (Not used)
Memory address bus 4 (Not used)
GND
Memory address bus 3 (Not used)
Memory address bus 7 (Not used)
Memory address bus 5 (Not used)
Memory address bus 8 (Not used)
Memory address bus 6 (Not used)
Memory address bus 9 (Not used)
Memory address 10 (Not used)
GND
I/O power supply (3.0 V)
Memory address 11 (Not used)
Memory address 12 (Not used)
Memory address 14 (Not used)
Memory address 13 (Not used)
Memory address 16 (Not used)
Memory address 15 (Not used)
I/O power supply (3.0 V)
Memory address 17 (Not used)
Not used
I/O power supply (3.0 V)
Memory address 18 (Not used)
Memory address 19 (Not used)
Memory bus hold response (Not used)
Memory read-out (Not used)
Memory bus hold request (Pull-up)
GND
I/O power supply (3.0 V)
Memory access weight (Pull-up)
Memory write (Not used)
GND
Core power supply (1.5 V)
Memory bus strobe (Not used)
Memory data bus (Not used)
GND
Memory data bus (Not used)
Memory data bus (Not used)
Memory data bus (Not used)
Memory data bus (Not used)
Memory data bus (Not used)
Memory data bus (Not used)
Memory data bus (Not used)
GND
I/O power supply (3.0 V)
Memory data bus (Not used)
Memory data bus (Not used)
Memory data bus (Not used)
Memory data bus (Not used)
27
ICD-S7
Pin No.
113
114
115
116
117
118
119
120
121
122
123 to 126
127
128
129
130
131
132
133
134
135
136 and 137
138
139
140
141
142
143
144 and 145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161 to 164
Pin Name
MD9
MD14
GND
MD15
MD12
TICE
TMS
EVDD
GND
TDO
NC
XTRST
TCK
EVDD
IC
TDI
STOPS
CSTOP
IC
GND
PLL0,PLL1
XRST
GND
IVDD
PLL3
HALTS
GND
IVDD
PLL2
GND
EVDD
CLKOUT
CLKIN
BOOT1
GND
BOOT3
BOOT0
GND
BOOT2
FMSCK
TSIOEN
REQ
FMSDIO
NC
I/O
I/O
I/O
—
I/O
I/O
O
I
—
—
O
—
I
I
—
—
I
O
I
—
—
I
I
—
—
I
O
—
—
I
—
—
O
I
I
—
I
I
—
I
I/O
I
O
I/O
—
Description
Memory data bus (Not used)
Memory data bus (Not used)
GND
Memory data bus (Not used)
Memory data bus (Not used)
Test ICE
Test mode selection
I/O power supply (3.0 V)
GND
Test data output
Not used
Test reset
Test clock input
I/O power supply (3.0 V)
Internal connection (Not used)
Test data input
Stop (Open)
Clear stop mode (Pull-down)
Internal connection (Not used)
GND
PLL rate setting 0 and 1
Reset
GND
Core power supply (1.5 V)
PLL rate setting 3
HALT
GND
Core power supply (1.5 V)
PLL rate setting 2
GND
I/O power supply (3.0 V)
Clock output
Clock input
Boot mode 1 (fixed at “H”)
GND
Boot mode 3 (fixed at “H”)
Boot mode 0 (fixed at “L”)
GND
Boot mode 2 (fixed at “H”)
Boot flash ROM serial clock
SIO enable
Request
Boot flash ROM serial data
Not used
28
ICD-S7
• IC7101 LC67F5006A-F3A10-E (CPU) (MAIN BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 and 27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43 to 48
49
50
51 to 58
59
60
61
62
63
64
65
I/O
—
O
O
I
O
I
I
I
I
—
O
O
O
I
O
O
O
O
—
O
O
O
O
O
O
O
—
O
O
I
O
O
O
O
O
O
I/O
O
I
—
O
O
O
—
O
—
O
—
I
O
—
I
Description
GND
Audio power supply control
SRAM output enable, USB read strobe
KEY WAKE UP interrupt
MIC power supply control output
USB driver interrupt request
USB detect interrupt
DSP I/F interrupt request
Serial data input (Not used)
GND
Serial data output (Not used)
Serial clock output for DSP I/F
Serial data output for DSP I/F
Serial data input for DSP I/F
SRAM chip select output
SRAM and USB write enable
Higher byte enable for SRAM
Chip select for LCD driver I/F
I/O power supply 3.1 V
Chip select for USB
Serial clock output for LCD driver I/F
Serial data output for LCD driver I/F
Serial clock output for RTC and EEPROM
Serial data output for RTC, S/P and EEPROM
LCD reset output
SRAM address bus output
Core power supply 2.6 V
Clock output for S/P
Beep output
USB DMA request input
System clock output for DSP
Chip select output for RTC
2FS clock output
DSP I/F SIO enable output
Memory Stick power supply control output
Clock output for Memory Stick
Serial data output for Memory Stick
BS output for Memory Stick
DC voltage detection input
I/O power supply 3.1 V
SRAM lower byte enble output
SRAM and USB address bus output
SRAM address bus output
GND
SRAM address bus output
Core power supply 2.6 V
System clock output
I/O power supply 3.1 V
CF oscillator pin
CF oscillator pin
GND
Reset input (L: Reset)
Pin Name
VSS
XOE
WAKEUP
MICPWE
XUSBIRQ
USBDET
DSPIFREQ
RXD
VSS
TXD
SCK0
SDO0
SDI0
XSRCS
XWE
XUB
XLCDCS
CIVDD
XUSBCS
LCDSCK
LCDDO
SCK1
SDO1
XLCDRST
A15,A16
CCVDD
SIPCLK
BEEP
DREQ
DSPSYSCK
RTCCS
FSCLK
XDSPSIOEN
MSPWR
MSCLK
MSDIO
MSBS
XDCIN
CIVDD
XLB
A0_ A5
A6
GND
A7_ A14
CVDD
∅
CIVDD
CF1
CF2
VSS
XRST
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