Sony ICD-P110 / ICD-P210 Service Manual ▷ View online
21
21
ICD-P110/P210
ICD-P110/P210
5-6. SCHEMATIC DIAGRAM — MAIN/SW SECTION —
• See page 16 for Waveforms.
• See page 22 for IC Block Diagrams.
• See page 23 for IC Pin Function Description.
IC B/D
IC B/D
(Page 18)
(FORMER TYPE)
(NEW TYPE)
FORMER TYPE
IC703
R714
C724
C712
C707
R763
R764
R765
C704
TP719
TP720
C709
R727
C730
R758
C729
IC706
C720
R742
C719
D702
R741
R728
R730
D701
TP718
TP721
Q707
Q706
CN705
S709
S710
S711
S712
S713
R725
R709
R711
R712
R715
R717
Q705
R735
R736
C715
R739
C710
C711
R723
R724
C705
C706
C708
C703
R713
C702
R710
C714
IC704
R748
R746
R745
R743
R754
C726
X702
C722
R750
C721
C727
R752
R755
R756
R757
R760 R768
R770
C728
R737
R722
R720
TP709
TP707
TP705
TP711
TP722
R776
R774
D704
TP727
FB701
C723
TP723
FB702
R769
C717
R740
TP725
TP726
R744
TP710
TP712
R721
R753
R761
R771
R772
C725
R751
CN702
X701
R719
CN703
LCD701
TP717
C732
R726
C716
R732
R729
R731
R733
Q703
R702
R703
R704
R705
R706
S701
R701
S703
S704
S705
S706
S707
S708
S715
TP701
TP702
TP703
TP704
CN705
R707
IC702
Q704
Q710
Q701
R716
CN706
ET701
TP716
IC701
R708
22
22
ICD-P110/P210
ICD-P110/P210
• IC Block Diagrams
– AUDIO Board –
IC101 NJM2781RB1
IC103 MM3111AWLE
IC704 M66291GP-2
CVDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
4
3
5
6
14
13
8-10
11
GND
D-
D+
VBUS
TRON
TEST
DACK1
DREQ1
TC1
INT1
IVDD
XOUT
XIN
CVDD
GND
A1
A2
A3
A4
A5
A6
D0
D1
D2
D3
D4
D5
D6
D7
D11
D10
D9
D8
IVDD
GND
D12
D13
D14
D15/A0
HWR/BYTE
INT0
RD
LWR
CS
RST
DREQ0
DACK0
I/O BLOCK
USB-IP
OSCILLATION
BUFFER
/48MHzPLL
VBUS
INPUT CIRCUIT
D+ PIN PULLUP
CIRCUIT
USB
TRANSCEIVER
TRANSFER
CONTROLLER
SERIAL
INTERFACE
ENGINE
(SIE)
INTERRUPT CONTROLLER
ENDPOINT
CONTROLLER
FIFO MEMORY CONTROLLER
FIFO MEMORY
BUS
INTERFACE
UNIT
(BIU)
1
BIAS
3
4
2
8
6
5
7
SHUTDOWN
BYPASS
+IN
-IN
VO2
GND
VDD
VO1
1
2
3
4
8
7
6
5
REG
GND
V+
OUT
IN-
NOISE
REG
STBY
IN+
1
2
3
4
VDD
FOE
XIRQ
T1
5
10
9
8
7
6
FOUT
CE
CLK
DO
DI
CE
CLK
DO
DI
CE
CLK
DO
DI
GND
FOUT
CONTROLLER
DIVIDER
OSC
32.768kHz
INTERRUPTS
CONTROLLER
BUS
INTERFACE
CIRCUIT
CONTROL
REGISTER
AND
SYSTEM
CONTROLLER
TIMER
REGISTER
CLOCK
AND
CALENDAR
ARARM
REGISTER
– MAIN Board –
IC703 RX-4591CF
IC502 XC9105D091MR
3
4
2
1
VREF WITH
SOFT START,
CHIP ENABLE
CURRENT
RIPPLE DETECTION
AND FB
PHASE
COMPENSATION
BUFFER,
DRIVER
RAMP WAVE
GENERATOR,
OSC
5
GND
EXT
VDD
CE
VDD
FB
VDD
PWM/PFM
CONTROLLER
PWM
COMPARATOR
ERROR
AMP
23
ICD-P110/P210
• IC Pin Function Description
IC702 MB91233LLGA-G-107E1 (SYSTEM CONTROL, LCD DRIVER) (MAIN BOARD)
IC702 MB91233LLGA-G-107E1 (SYSTEM CONTROL, LCD DRIVER) (MAIN BOARD)
Pin No.
Pin Name
I/O
Description
1
DSPSCK
O
Serial clock signal output
2
FLMCLE
O
Command latch enable signal output
3 to 10
DATA0 to 7
I/O
Data input/output 0 to 7
11
XFLMCS0
O
Chip enable signal output
12
XDSPIFREQ
O
System clock control signal output
13
X0A32K
I
32 kHz signal input
14
X1A32K
O
32 kHz signal output (Fixed at H in this set)
15
VCC3BCK
—
Power supply pin for internal logic backup
16
VSS
—
Ground
17
VCC3LGC
—
Power supply pin for internal logic
18
BEEP
O
Beep signal output
19
XFLMWE
O
Write enable signal output
20
XFLMRE
O
Read enable signal output
21
FLMALE
O
Address latch enable signal output
22
FLMRB
I
Ready/busy signal input
23
XFLMWP
O
Write protect signal output
24 to 30
USBADR0 to 6
O
Address signal output 0 to 6
31
XUSBCS
O
Chip select signal output
32
XUSBRD
O
Read strobe signal output
33
XUSBRST
O
Reset signal output
34
XUSBLWR
O
Low write strobe signal output
35
XFLMPWR
O
Power supply control signal output
36
AVCC
—
Power supply pin for analog
37
AVREF
—
Reference voltage supply pin for analog
38
AVSS
—
Ground for analog
39
BATT
I
Dry battery voltage detection signal input
40, 41
KEYIN0, 1
I
Key A/D input 0, 1
42
XBATTEN
O
Dry battery detection control signal output
43
HPJACK/MICSENS
I
Earphone jack/Mic sensitivity select signal input
44
HPMUTE
I
Earphone mute signal input
45
MICAMPPWR
I
Mic amplifier power supply control signal input
46
LMUTE
O
Line mute signal output
47
VSS
—
Ground
48
AVCC3IO
—
Power supply pin
49 to 74
SEG0 to 25
O
LCD segment signal output 0 to 25
75
DVCC
—
Power supply pin for digital
76
DVSS
—
Ground for digital
77 to 82
SEG26 to 31
O
LCD segment signal output 26 to 31
83 to 86
COM0 to 3
O
LCD common signal output 0 to 3
87
MOD2
I
Operation mode signal input 2
88, 89
MOD1, 0
I
Operation mode signal input 1, 0 (Connect to ground in this set)
90
XCPURST
I
CPU external reset signal input
91 to 94
LCDV0 to 3
—
LCD reference voltage supply pin
95
RX
I
Input port (Flash write RX)
96
TX
O
Output port (Flash write TX)
97
HPAMPPWR
O
Earphone amplifier power control signal output
98
RTCSIN
I
Serial data input
24
ICD-P110/P210
Pin No.
Pin Name
I/O
Description
99
RTCSOT
O
Serial data output
100
RTCSCK
O
Serial clock signal output
101
RTCCS
O
Chip select signal output
102
XDSPRST
O
Reset signal output
103
WAKEUP
I
Wakeup interruption signal input
104
DSPIFACK
I
DSP I/F acknowledge signal input
105
DVCC
—
Power supply pin for digital
106
DVSS
—
Ground for digital
107
XTALIN
I
Main clock signal input (4.096 MHz)
108
XTAL
O
Main clock signal output (4.096 MHz)
109
XINTUSB
I
Interruption request signal input
110
XUSBVBUS
I
VBUS detection interruption request signal input
111
XRTCINTR
I
Constant cycle interruption signal input
112
HOLDSW
I
HOLD switch signal input (interruption)
113
XDCINDET
O
Power control signal output
114
AMPPWR
O
Power amplifier power control signal output
115
GRNLED
O
Green LED (PB) drive signal output
116
REDLED
O
Red LED (REC) drive signal output
117
DSPPWR
O
Power circuit control signal output
118
DSPIFRW
O
I/F RW signal output
119
DSPSIN
I
Serial data input
120
DSPSOT
O
Serial data output
121
NC
—
Not used (Open)
122
VCC3
—
Power supply pin
123, 124
NC
—
Not used (Open)
125
AVRL
—
Not used (Connect to ground in this set)
126 to 128
NC
—
Not used (Open)
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