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Copying is strictly prohibited 

17

 

 
1.    Microphone Amplifier IC161 and AGC IC162 
There are two input sources to the unit: that are the built-in microphone and the external MICROPHONE input. The external MICROPHONE input jack supports the plug-in 
power. During the recording mode, the +3.3 [V] power is supplied to the MICROPHONE jack via R162 and R161. The audio signal input from the MICROPHONE is input to 
pin-1 of the microphone amplifier IC161 where it is amplified by the internal operational amplifier and is output from pin-4 of the microphone amplifier IC161. The microphone 
sensitivity is switched by changing the gain of the operational amplifier with the microphone sensitivity switch S161 as it changes the constant of the resistance that is 
connected to ground through the capacitor C166 from pin-3 of IC161. This signal is then sent to pin-3 of the AGC IC162 where signal gain is adjusted to an optimum level by 
the internal AGC amplifier. The resistor R172 and the capacitor C170 that are connected to pin-2 of AGC IC162, determine the recovery time of the AGC. The audio signal after 
level adjustment is output from pin-5 of the AGC IC162. 
 
 

4

3

5

1

3

2

MIC161

R162

R161

D562

J161

R164

S161

IC161

MIC AMP

C166

R168

C170

R172

IC162 AGC

DET

SH

IC164

MIC_VCC

3.3V

Microphone

External 
MICROPHONE 
jack

Selects gain of the 
operational amplifier 
in accordance with 
recording situation

Dictation

Conference

Determines recovery time of AGC

Pin-3

 

 

 

Fig. 3-1 Microphone amplifier and AGC circuit 

Copying is strictly prohibited 

 

18

 

2.    ADPCM IC164 – System Controller IC722 
The audio signal that is amplified and level-adjusted by the microphone amplifier IC161 and AGC IC162, is input to pin-3 [AIN1] of the ADPCM IC164, passes through the 
internal operational amplifier and is converted to the digital data by the A/D converter inside IC164 and is compressed to the PCM format. After the digital data is compressed to 
the PCM format, it is output from pin-27 [PCMSO] of the ADPCM IC164 in synchronization with the bit clock of pin-29 [BCLK] and the rising-edge of the sync signal input to 
pin-28 [SYNC] of the ADPCM IC164. At the same time, the PCM signal is sent to pin-26 [PCMSI] of the ADPCM IC164 where it is converted to the ADPCM data inside IC164 
and is output from pin-25 [IS] of IC164 in synchronization with the bit clock of pin-29 [BCLK] and the fall-down edge of the sync signal input to pin-28 [SYNC] of IC164. During 
recording, the frequency input to pin-28 [SYNC] of IC164 is 8 kHz in the LP mode and 11 kHz in the SP mode. 

The ADPCM data that is input to pin-21 [DSP RX] of the system controller IC722, is converted to the parallel data together with the watch information from the timer (RTC) 
IC721, the alarm data and the priority data that are set by user. The parallel data is output via the bus line sequentially to the 2M-bit S-RAM of IC727 where the parallel data 
that is converted to the file format that suits to be recorded in the Memory Stick. The converted data is output from pin-12 [MS DIO] to the controller inside the Memory Stick in 
synchronization with the clock at pin-13 [MS CLK] and the bus state signal at pin-11 [MS BS]. The controller inside the Memory Stick records the input data in the internal 
FLASH RAM. 

For the recording monitor using the headphones, the signal that is converted once to the ADPCM data, is returned to the receiver side (ADPCM demodulation and D/A 
conversion) of ADPCM IC164 via system controller IC722 and is sent to pin-4 [IN] of the POWER AMP IC168 via sound volume control VR RV161. 
 
3.    VOR DETECTOR IC163 – SYSTEM CONTROLLER IC722 
The audio signal that has passed through the operational amplifier inside ADPCM IC164, is used as signal to detect the VOR (Voice on recording) operation. This signal is input 
to pin-1 [INPUT] of the VOR DETECTOR IC163. When amplitude of the input signal is detected by the internal detection circuit to be higher than a certain signal level, output 
signal from pin-6 [OUT PUT1] is set to "L". The "L" output is sent to pin-147 [XVORIN] of the system controller IC722. When the VOR switch S764 is set to the ON position 
(pin-171 of the system controller is "L"), the system controller IC722 controls recording of the audio data into the Memory Stick in accordance with presence or absence of the 
input signal to pin-147 [XVORIN]. Note that the capacitor C176 that is connected to pin-5 [RECOVERY TIME CAP] of the VOR DETECTOR IC163, is for the delay time setting 
to reset the VOR detection circuit. 

4

7

3

12

13

68

69

11

21

159

147

77

171

5

6

25

26

28

29

1

3

27

1

4

PCM 

COMPRESSION

ON

OFF

IC164 ADPCM

A/D

GSX

C174

IC163  VOR DETECTOR

INPUT

C173

R174

GND

OUTPUT

XVORIN

VORSW

S764
VOR

C176

RECOVERY
TIME CAP

PCM SO

PCM SI

IS

DSP RX

SYNC

SYNC

IC169

INVERTER

BCLK

XBCK

IC722

SYSTEM CONTROLLER

MSBS

MSDIO

MSCLK

TXD2

RXD2

DI

DO

MEMORY

STICK

IC723

EEP ROM

IC721

RTC

DATA

Analog audio 
input

ADPCM 

MODULATION

 

Fig. 3-2 Recording circuit block diagram 

Copying is strictly prohibited 

19

 

 
1.    MEMORY STICK – SYSTEM CONTROLLER IC722 
The system controller IC722 outputs the data read-out command from pin-12 [MS DIO] in synchronization with the clock output from pin-13 [MS CLK] and the bus state signal 
that is output from pin-11 [MS BS]. When the controller inside the Memory Stick receives the data read-out command, the data that correspond to the command are read from 
the FLASH RAM area of the Memory Stick. Then the controller inside the Memory Stick converts the read-out data to the serial data. The serial data are output to the system 
controller IC722 in synchronization with the clock input from the system controller IC722 and the bus state signal. The system controller IC722 converts the read-out data to the 
parallel data and the parallel data are output to the 2M-bit S-RAM IC727 sequentially via bus line. The 2M-bit S-RAM converts the data in reverse order of the recording. 
 
2.    SYSTEM CONTROLLER IC722 – ADPCM IC164 
The audio data that are read from the Memory Stick, are input to pin-24 [IR] of the ADPCM IC164 from pin-20 [DSPTX] of the system controller IC722 via signal processing 
circuit inside the system controller IC722 in synchronization with the bit clock of pin-77 [XBCK] and the sync signal output from pin-159 [SYNC] of the system controller IC722. 
The data are ADPCM-demodulated inside IC164 and are output from pin-23 [PCMRO] of IC164 in synchronization with the bit clock of pin-28 [SYNC] and the fall-down edge of 
the sync signal input to pin-28 [SYNC] of the ADPCM IC164. After this signal is input to pin-22 [PCMRI] of IC164, it passes through a low-pass filter and D/A converter inside 
IC164, and is converted to the analog signal that is output from pin-11 [VFRO] of IC164. 
 
During playback, the playback speed selector switch S763 controls the playback speed by changing the voltage at pin-172 [SPEED] of the system controller IC722 and thus by 
changing the output frequency (input to pin-28 [SYNC] of the ADPCM IC164) from pin-159 [SYNC] of the system controller IC722. (Refer to Table 3-1.) 
 

         Table 3-1 Playback speed and SYNC input frequency 

Mode Fast Normal 

Slow 

SP 

13.2 kHz ( +20% ) 

11.0 kHz 

9.4 kHz ( -15% ) 

LP 

10.4 kHz ( +30% ) 

8.0 kHz 

6.8 kHz ( -15% ) 

 

22

23

24

28

29

11

11

12

13

77

159

20

172

MEMORY

STICK

IC727

S.RAM

IC722

SYSTEM CONTROLLER

MS BS

MS DIO

MS CLK

BS

DIO

SCK

D0

D15

A1

A17

I/O1

I/O16

A0

A16

DSPTX

SYNC

XBCK

SPEED

BCLK

SYNC

IR

PCMRO

PCMRI

IC164

ADPCM

VFRO

D/A

PCM

EXPANSION

APPCM

DEMODULATION

S763

Playback speed

Fast

Normal

Slow

Analog 
audio 
output

 

Fig. 3-3 Playback circuit block diagram 

Copying is strictly prohibited 

 

20

 

3. POWER AMP IC168 
The analog signal that is output from IC164, is input to pin-4 [IN] of IC168 via sound volume control RV161. The power amplifier IC168 has the function to switch the operations 
of BTL/SE (single ended). Switching of the BTL/SE operations is controlled by the control signal output from pin-74 [BTL SE] of the system controller IC722. The detection 
whether the headphones is connected or not, is performed from the input at pin-144 [HP JACK] of the system controller IC722. When the headphones is not connected during 
playback, the output of pin-85 [HP MUTE] of the system controller IC722 remains "L" and the headphones muting Q165 is turned ON. At the same time, because pin-144 [HP 
JACK] of the system controller IC722 is connected to the headphones connector through R184, pin-144 is connected to ground via R136, R137 and Q165, and goes "L" when 
the headphones is not connected. As the result of the above operations, the system controller IC722 judges that the headphones is not inserted. Since the voltage at pin-3 
[BTL/SE] of the power amplifier IC168 also goes "L", the BTL operation is established and the speaker is driven. On the contrary, when the headphone is connected during 
playback, pin-144 [HP JACK] of the system controller IC722 is separated from R136 and R137 as the jack is inserted to the headphones jack J162 and goes "H" so that the 
system controller IC722 confirms insertion of the headphones and the "H" signal is output from pin-85 [HP MUTE] and pin-74 [BTL SE] of the system controller IC722. As the 
result, the headphones muting Q165 is turned OFF, and the voltage at pin-3 [BTL/SE] of the power amplifier IC168 also goes "H". The power amplifier IC168 enters the SE 
operation so that the headphones output is driven. During recording, pin-85 [HP MUTE] and pin-74 [BTL SE] of the system controller IC722 output the "H" signal in advance 
and control the power amplifier IC168 in order to drive the headphones only. When headphones is detected, input to the power amplifier IC168 is controlled by turning ON/OFF 
Q161 by changing the output from pin-84 [L MUTE]. 
 

Table 3-2 Voltages in each mode 

MODE OUTPUT 

AMP POWER 

(IC168  pin-1) 

BTL/SE 

(IC168  pin-3) 

HP MUTE 

(IC722  pin-85) 

HP JACK 

(IC722  pin-144) 

Speaker 

L L L L 

PLAY 

Headphones 

L H H H 

REC 

Headphones 

L H H H 

 
 
Also, the system controller IC722 controls operation of the mute and beep generation. (See Table 3-3.)   

 

Table 3-3 Control of analog output signals 

 

Pin-84 [L MUTE] 

Pin-85 [HP MUTE] 

Pin-88 [BEEP CTL] 

During mute mode   

H 

H 

– 

During beep mode 

– 

– 

L