Sony HT-DDW2500 / STR-KM2500 Service Manual ▷ View online
STR-KM2500
37
• IC Pin Function Description
DIGITAL AB BOARD IC1101 MB90F046PF-G-119E1 (SYSTEM CONTROLLER)
DIGITAL AB BOARD IC1101 MB90F046PF-G-119E1 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DIR_DATA0
I
Serial data input from the digital audio interface receiver
2
V-MUTE
O
Muting signal output terminal Not used
3, 4
COMP_S1, COMP_S2
O
Component video select signal output terminal Not used
5 to 7
V_SW1 to V_SW3
O
Video select signal output terminal Not used
8
XRST
O
System reset signal output to the DSP
9
V_SW4
O
Video select signal output terminal Not used
10
NC
-
Not used
11
VSS
-
Ground terminal
12
DAC_ML
O
Serial data latch pulse signal output to the D/A converter
13
DAC_MC
O
Clock signal output to the D/A converter
14
DAC_MDI
O
Serial data output to the D/A converter
15
DAC_MUTE
O
Muting signal output to the D/A converter
16, 17
NC
-
Not used
18
MISO
I
Serial data input from the DSP
19
MOSI
O
Serial data output to the DSP
20
DSP SPI CLK
O
Serial data transfer clock signal output to the DSP
21
DSP SPIDS(LAT)
O
Serial data latch pulse signal output to the DSP
22
NC
-
Not used
23
VCC5
-
Power supply terminal (+3.3V)
24
VOL_IC_DATA
O
Serial data output to the input selector, electrical volume
25
VOL_IC_CLK
O
Clock signal output to the input selector, electrical volume
26
DMPORT_DET
I
DMPORT adapter connection detection signal input terminal Not used
27
FLASH2/DMPORT_MI-
COM RX
I/O
Flash programming signal input terminal
Transmit data output to the DMPORT connector
Transmit data output to the DMPORT connector
28
FLASH1/DMPORT_MI-
COM TX
I/O
Flash programming signal output terminal
Receive data input from the DMPORT connector
Receive data input from the DMPORT connector
29
SDA
I
Serial data input from the EEPROM
30
SCL
O
Serial data transfer clock signal output to the EEPROM
31
ENC_A
I
Jog dial pulse input from the rotary encoder (for INPUT SELECTOR) (A phase input)
32
ENC_B
I
Jog dial pulse input from the rotary encoder (for INPUT SELECTOR) (B phase input)
33
I2C_SCL(HDMI)/NC
O
Not used
34
I2C_SDA(HDMI)/S1
O
HDMI select signal output terminal Not used
35
AVCC
-
Analog power supply terminal (+3.3V) (for A/D converter)
36
AVRH
-
Reference voltage input terminal (+3.3V) (for A/D converter)
37
AVSS
-
Analog ground terminal (for A/D converter)
38
DCAC_IN
I
AUTO CAL MIC signal input terminal
39, 40
A/D1, A/D2
I
Front panel key input terminal (A/D input)
41
VERSION
I
Setting terminal for the destination
42
VSS
-
Ground terminal
43
TUNE SD
I
Tuning detection signal input from the tuner (FM/AM)
44
MODEL
I
Setting terminal for the model
45
VACS CTRL
I
VACS control signal input terminal
46
NC
-
Not used
47
DSP INT
I
Interrupt status input from the DSP
48
STOP
I
AC off detection signal input terminal "L": AC off
49
MD0
I
CPU operation mode setting signal input terminal "H": fl ash programming
50
MD1
I
CPU operation mode setting signal input terminal Not used
51
MD2
I
CPU operation mode setting signal input terminal "H": fl ash programming
52
RDS_CLK
I
RDS clock data input terminal Not used
53
RDS_DATA
I
RDS serial data input terminal Not used
54
SIRCS
I
SIRCS signal input from the remote control receiver
55
HP_DETECT
I
Headphone detection signal input terminal "H": headphone is connected
56
POWER KEY
I
Power key input terminal
57
DCAC_INT
I
DCAC data input from the DSP
STR-KM2500
38
Pin No.
Pin Name
I/O
Description
58
POWER_RY
O
Relay drive signal (for main power) output terminal "H": relay on
59
TUNING_A
I
Jog dial pulse input terminal Not used
60
TUNING_B
I
Jog dial pulse input terminal Not used
61
PROTECTOR
I
Protector status detect signal input terminal
62
HP_RY
O
Relay drive signal (for headphone) output terminal "H": relay on
63
FUSE_DETECT
I
Fuse detection signal input terminal
64
VOL_ENCODER(B)
I
Jog dial pulse input from the rotary encoder (for MASTER VOLUME) (B phase input)
65
VOL_ENCODER(A)
I
Jog dial pulse input from the rotary encoder (for MASTER VOLUME) (A phase input)
66
C/SW/REAR/SB_RY
O
Relay drive signal (for center, surround, surround back) output terminal "H": relay on
67
FRONT B RY/
ST SW RY
O
Relay drive signal (for front B) output terminal "H": relay on
68
DC-CONTROL
O
MIC control signal output terminal
69
SW_RY
O
Relay drive signal (for subwoofer) output terminal "H": relay on Not used
70
FRONT A RY
O
Relay drive signal (for front A) output terminal "H": relay on Not used
71 to 73
NC
-
Not used
74
FL_CLK
O
Serial data transfer clock signal output to the fl uorescent indicator tube
75
FL_DATA
O
Serial data output to the fl uorescent indicator tube
76
FL_LAT
O
Strobe signal output to the fl uorescent indicator tube
77
RSTX
I
Reset signal input from the reset signal buffer
78
NC
-
Not used
79
X0A
I
Sub system clock input terminal Not used
80
X1A
O
Sub system clock output terminal Not used
81
VSS
-
Ground terminal
82
X0
I
Main system clock input terminal (24 MHz)
83
X1
O
Main system clock output terminal (24 MHz)
84
VCC3
-
Power supply terminal (+3.3V)
85
+5.8V_CTRL(HDMI)
-
Not used
86
RESET_HDMI
O
System reset signal output terminal Not used
87
+5V_CTRL(HDMI)
O
HDMI control signal output terminal Not used
88
HDMI_DET
I
Headphone detection signal input terminal Not used
89
DO/SD/ST
I
PLL data input from the tuner (FM/AM)
90
TUNER_CLK
O
Serial data transfer clock signal output to the tuner (FM/AM)
91
TUNE_DATA
O
Serial data output to the tuner (FM/AM)
92
SLATCH
O
Serial data latch pulse signal output to the tuner (FM/AM)
93
DIR_XMODE
O
Reset signal output to the digital audio interface receiver "L": reset
94
DIR_CKSEL1
O
Clock selection signal output to the digital audio interface receiver
95
DIR_CLK
O
Serial data transfer clock signal output to the digital audio interface receiver
96
DIR_CE
O
Chip enable signal output to the digital audio interface receiver
97
DIR_DI
O
Serial data output to the digital audio interface receiver
98
DIR_DO
I
Serial data input from the digital audio interface receiver
99
DIR_ERROR
I
PLL lock error signal and data error fl ag input from the digital audio interface receiver
100
DIR_XSTATE
I
Source clock selection monitor input from the digital audio interface receiver
STR-KM2500
39
DIGITAL AB BOARD IC1501 ADSST-AVR-1115 (DSP)
Pin No.
Pin Name
I/O
Description
1
VDDINT
-
Power supply terminal (+1.2V)
2, 3
CLKCFG0,
CLKCFG1
I
Clock frequency setting terminal
4, 5
BOOTCFG0,
BOOTCFG1
I
Boot mode setting terminal for DSP
6
GND
-
Ground terminal
7
VDDEXT
-
Power supply terminal (+3.3V)
8
GND
-
Ground terminal
9
VDDINT
-
Power supply terminal (+1.2V)
10
GND
-
Ground terminal
11
VDDINT
-
Power supply terminal (+1.2V)
12
GND
-
Ground terminal
13
VDDINT
-
Power supply terminal (+1.2V)
14
GND
-
Ground terminal
15
FRAG0
O
Interrupt status output to the system controller
16
FRAG1
I
PLL lock error signal and data error fl ag input terminal
17
AD7
I/O
Two-way data bus and address signal output with S-RAM Not used
18
GND
-
Ground terminal
19
VDDINT
-
Power supply terminal (+1.2V)
20
GND
-
Ground terminal
21
VDDEXT
-
Power supply terminal (+3.3V)
22
GND
-
Ground terminal
23
VDDINT
-
Power supply terminal (+1.2V)
24 to 26
AD6 to AD4
I/O
Two-way data bus and address signal output with S-RAM Not used
27
VDDINT
-
Power supply terminal (+1.2V)
28
GND
-
Ground terminal
29, 30
AD3, AD2
I/O
Two-way data bus and address signal output with S-RAM Not used
31
VDDEXT
-
Power supply terminal (+3.3V)
32
GND
-
Ground terminal
33, 34
AD1, AD0
I/O
Two-way data bus and address signal output with S-RAM Not used
35
XWR
O
Data write enable signal output to the S-RAM "L": active Not used
36, 37
VDDINT
-
Power supply terminal (+1.2V)
38
GND
-
Ground terminal
39
XRD
O
Read strobe signal output to the S-RAM "L": active Not used
40
ALE
O
Address latch enable signal output terminal Not used
41 to 43
AD15 to AD13
I/O
Two-way data bus and address signal output with S-RAM Not used
44
GND
-
Ground terminal
45
VDDEXT
-
Power supply terminal (+3.3V)
46
AD12
I/O
Two-way data bus and address signal output with S-RAM Not used
47
VDDINT
-
Power supply terminal (+1.2V)
48
GND
-
Ground terminal
49 to 52
AD11 to AD8
I/O
Two-way data bus and address signal output with S-RAM Not used
53
A16
O
Address signal output to S-RAM Not used
54
VDDINT
-
Power supply terminal (+1.2V)
55
GND
-
Ground terminal
56, 57
A17, A18
O
Address signal output to S-RAM Not used
58
GND
-
Ground terminal
59
VDDEXT
-
Power supply terminal (+3.3V)
60
VDDINT
-
Power supply terminal (+1.2V)
61
GND
-
Ground terminal
62
PF_CE
I/O
Chip enable signal input/output terminal Not used
63
SPI_MAS
O
Master/slave selection signal output terminal "L": DSP is master Not used
64
DPSOA
O
PCM audio signal (front L/R) output to the D/A converter
65
DPSOB
O
PCM audio signal (surround L/R) output to the D/A converter
66
VDDINT
-
Power supply terminal (+1.2V)
STR-KM2500
40
Pin No.
Pin Name
I/O
Description
67
GND
-
Ground terminal
68
VDDINT
-
Power supply terminal (+1.2V)
69
GND
-
Ground terminal
70
DPSOC
O
PCM audio signal (center, sub woofer) output to the D/A converter
71
DPSOD
O
PCM audio signal (surround back L/R) output terminal Not used
72
VDDINT
-
Power supply terminal (+1.2V)
73
VDDEXT
-
Power supply terminal (+3.3V)
74
GND
-
Ground terminal
75
VDDINT
-
Power supply terminal (+1.2V)
76
GND
-
Ground terminal
77
DPSOE
O
PCM audio signal output terminal Not used
78
DPSIA
I
PCM audio signal (digital input) input from the digital audio interface receiver
79
DPSIB
I
PCM audio signal (front L/R) input from the A/D converter
80
DPSIC
I
PCM audio signal (surround L/R) input terminal Not used
81
DPSID
I
PCM audio signal (center, sub woofer) input terminal Not used
82
DPSIE
I
PCM audio signal (surround back L/R) input terminal Not used
83
VDDINT
-
Power supply terminal (+1.2V)
84, 85
GND
-
Ground terminal
86
DPDVLRCK
O
L/R sampling clock signal output to the D/A converter for PCM audio output
87
DPDVBCK
O
Bit clock signal output to the D/A converter for PCM audio output
88
DPLRCK
I
L/R sampling clock signal input terminal for PCM audio input
89
DPBCK
I
Bit clock signal input terminal for PCM audio input
90
VDDINT
-
Power supply terminal (+1.2V)
91, 92
GND
-
Ground terminal
93
VDDEXT
-
Power supply terminal (+3.3V)
94
DPFSCK
I
Master clock signal input terminal
95
GND
-
Ground terminal
96
VDDINT
-
Power supply terminal (+1.2V)
97
XNONAUDIO
I
Digital input signal switch control signal input from the digital audio interface receiver
98
XSF_CE
O
Chip enable signal output terminal Not used
99
VDDINT
-
Power supply terminal (+1.2V)
100
GND
-
Ground terminal
101
VDDINT
-
Power supply terminal (+1.2V)
102
GND
-
Ground terminal
103
VDDINT
-
Power supply terminal (+1.2V)
104
GND
-
Ground terminal
105
VDDINT
-
Power supply terminal (+1.2V)
106
GND
-
Ground terminal
107, 108
VDDINT
-
Power supply terminal (+1.2V)
109
GND
-
Ground terminal
110
VDDINT
-
Power supply terminal (+1.2V)
111
GND
-
Ground terminal
112
VDDINT
-
Power supply terminal (+1.2V)
113
GND
-
Ground terminal
114
VDDINT
-
Power supply terminal (+1.2V)
115
GND
-
Ground terminal
116
VDDEXT
-
Power supply terminal (+3.3V)
117
GND
-
Ground terminal
118
VDDINT
-
Power supply terminal (+1.2V)
119
GND
-
Ground terminal
120
VDDINT
-
Power supply terminal (+1.2V)
121
XRESET
I
System reset signal input from the system controller
122
XSPIDS
I
Serial data latch pulse signal input from the system controller
123
GND
-
Ground terminal
124
VDDINT
-
Power supply terminal (+1.2V)
125
SPICLK
I/O
Serial data transfer clock signal input/output with the system controller
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