Sony HT-CT380 / HT-CT381 / SA-CT380 / SA-CT381 Service Manual ▷ View online
HT-CT380/CT381
49
IC3001 TAS5624ADDVR
IC3002 TAS5534DGGR
GVDD_AB 1
VDD 2
OC_ADJ 3
RESET 4
INPUT_A 5
PVDD_CD
OUT_C
31
PVDD_CD
30
32
PVDD_CD
29
GND
33
INPUT_B 6
C_START 7
GND 9
GND 11
GND 10
GND 12
AVDD 13
INPUT_C 14
INPUT_D 15
OTW 17
PROTECTION
&
I/O LOGIC
+
–
–
+
–
–
+
–
–
TEMP
SENSE
STARTUP
CONTROL
AVDD
DVDD 8
DVDD
POWER-UP
RESET
CB3C OVER-LOAD
PROTECTION
UVP
GATE-
DRIVE
DRIVE
+
–
–
GATE-
DRIVE
DRIVE
GND
OUT_B
34
35
PVDD_AB
38
GND
42
GND
41
BST_A
44
BST_B
43
GATE-
DRIVE
DRIVE
PVDD_AB
36
PVDD_AB
37
OUT_A
39
OUT_A
40
OUT_D
27
GND
26
GND
25
BST_C
24
BST_D
23
OUT_D
28
PWM & TIMING
CONTROL
ANALOG
LOOP FILTER
ANALOG
LOOP FILTER
ANALOG
LOOP FILTER
ANALOG
LOOP FILTER
PWM & TIMING
CONTROL
PWM & TIMING
CONTROL
PWM
RECEIVER
PWM
RECEIVER
PWM
RECEIVER
PWM
RECEIVER
PWM & TIMING
CONTROL
GATE-
DRIVE
DRIVE
CLIP 18
FAULT 16
M3 21
M2 20
M1 19
GVDD_CD 22
BST_X
GVDD_X
AVDD
DVDD
GVDD_X
AVDD
DVDD
I2C SERIAL
CONTROL
INTERFACE
CLOCK, PLL,
AND
SERIAL DATA
INTERFACE
PWM_HPM_L 1
PWM_HPP_L 2
PWM_HPM_R 3
PWM_HPP_R 4
PLL_FLTM 6
PLL_FLTP 7
LRCLK 22
SCLK 23
SDIN1 24
SDIN2 25
SDIN3 26
SDIN4 27
SDIN2 25
SDIN3 26
SDIN4 27
VR_DIG 28
RESET 16
HP_SEL 17
PDN 18
MUTE
ASEL_EMO2 10
EMO1 15
DVDD2_CORE 14
DVSS2_CORE 13
AVDD 9
VR_ANA 8
OSC_RES 12
MCLK 11
19
SDA 20
AVSS 5
DEVICE
CONTROL
DIGITAL
AUDIO
PROCESSOR
POWER
SUPPLY
SUPPLY
SCL 21
AVSS_PWM
51
AVDD_PWM
50
PWM_P_1
39
PWM_M_1
38
PWM_P_2
41
PWM_M_2
40
PWM_P_3
43
PWM_M_3
42
N.C.
45
N.C.
44
N.C.
47
N.C.
46
PWM_P_4
49
PWM_M_4
48
N.C.
54
N.C.
53
N.C.
56
N.C.
55
LRCLKO
31
SCLKO
30
PSVC
33
VALID
37
TEST
32
SDOUT
29
VR_RWM
52
DVSS1_CORE
36
DVDD1_CORE
35
BKND_ERR
34
PWM
SECTION
HT-CT380/CT381
50
IC3003 BD00C0AWFP-E2
IC3102 MM3411A50NRE
1
CTL
2
VCC
3
GND
4
VO
5
ADJ
TSD
OCP
DRIVER
VREF
+
–
VOUT
5
NC
4
CE 3
GND 2
VDD 1
+
VOLTAGE
REFERENCE
CURRENT
LIMIT
BIAS
– POWER Board –
IC930 STR-Y6735 (US and Canadian models)
IC930 STR-Y6766B (Except US and Canadian models)
IC930 STR-Y6735 (US and Canadian models)
IC930 STR-Y6766B (Except US and Canadian models)
– DISPLAY Board –
IC803 MM3411A33URE
IC803 MM3411A33URE
VOUT
3
CE 1
GND 2
VDD
4
+
–
VOLTAGE
REFERENCE
CURRENT
LIMIT
BIAS
D/ST 1
S/OCP 2
VCC 3
GND 4
BD 6
FB/OLP 5
STARTUP
LOGIC
DRIVER
LATCH
OVERCURRENT
PROTECTION/
BOTTOM-SKIP
BOTTOM-SKIP
UNDER VOLTAGE
LOCK OUT/
REGULATOR/
CONSTANT CURRENT
FEEDBACK/
STANDBY
OVERLOAD
PROTECTION
BOTTOM
DETECTION
NF 7
OSCILLAOTR
Ver. 1.1
HT-CT380/CT381
51
Pin No.
Pin Name
I/O
Description
1
SIRCS_IN
I
SIRCS signal input from the remote control receiver
2
SIRCS2
I
SIRCS signal input terminal Not used
3
DSP_MOSI
O
Serial data output to the serial fl ash and DSP
4
DSP_ MISO
I
Serial data input from the serial fl ash and DSP
5
DSP_SPICLK
O
Serial data transfer clock signal output to the serial fl ash and DSP
6
BYTE
I
External data bus width selection signal input terminal Fixed at “L” in this unit
7
CNVss
I
Processor mode selection signal input terminal
8
ROM_SDA
I/O
Two-way data bus with the EEPROM
9
ROM_SCLK
O
Serial data transfer clock signal output to the EEPROM
10
RESET
I
System reset signal input terminal “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
11
Xout
O
System clock output terminal (8 MHz)
12
Vss
-
Ground terminal
13
Xin
I
System clock input terminal (8 MHz)
14
Vcc1
-
Power supply terminal (+3.3V)
15
CEC_IO
I/O
Two-way CEC serial data with the HDMI connector
16
DIR_ZERO
I
Zero data detection signal input from the digital audio interface receiver
17
NFC_RFDET
I
Magnetic fi eld detection signal input from the NFC module “L”: magnetic fi eld is detected
18
DRIVE_OCP (DIAG)
I
Shut down signal input from the digital power amplifi er “L”: shut down
19
WL_DET
I
RF modulator detection signal input terminal Not used
20
NFC_SCL
O
Serial data transfer clock signal output to the NFC module
21
WL_RST
O
Reset signal output to the RF modulator “L”: reset
22
NFC_SDA
I/O
Two-way data bus with the NFC module
23
HDMI_TX_5VPWR
O
+5V power on/off control signal output terminal for the ARC HDMI OUT connector
“H”: power on
“H”: power on
24
HDMI_NON_LPCM
O
Audio setting signal output terminal “L”: LPCM audio, “H”: HBR audio
25
DIR_ERROR
I
Error detection signal input from the digital audio interface receiver “L”: error
26
PCONT_DRIVER
O
Power on/off control signal output terminal for the digital power amplifi er “H”: power on
27
DAMP_SCL
O
Serial data transfer clock signal output to the stream processor
28
DAMP_SDA
I/O
Two-way data bus with the stream processor
29
M_TX_OUT
O
Serial data output to the DSP
30
M_RX_IN
I
Serial data input from the DSP
31
SCD/CLK1
I
Serial data transfer clock signal input terminal for fl ash memory writing
32
RTS1/MC_BT_CTS0
I
Clear to send signal input from the Bluetooth module
33
MC_BT_TXD0
O
Serial data output to the Bluetooth module
34
MC_BT_RXD0
I
Serial data input from the Bluetooth module
35
BT_LED
O
LED drive signal output terminal for the Bluetooth indicator “H”: LED on
36
MC_BT_RTS
O
Return to send signal output to the Bluetooth module
37
P_CONT2
O
Power on/off control signal output terminal “H”: power on
38
A_SEL0
O
Analog audio selection signal output terminal “L”: external analog input, “H”: Bluetooth
39
HOLD
I
Fixed at “L” in this unit
40
WL_SCL
O
Serial data transfer clock signal output to the RF modulator
41
WL_SDA
I/O
Two-way data bus with the RF modulator
42
BT_RST
O
Reset signal output to the Bluetooth module “L”: reset
43
PCONT_BT
O
Power on/off control signal output terminal for the Bluetooth section “H”: power on
44
WR
I
Fixed at “H” in this unit
45
HDMI_SDA
I/O
Two-way I2C data bus with the HDMI transceiver
46
HDMI_SCL
O
I2C clock signal output to the HDMI transceiver
47
HDMI_MUTE_DET
I
HDMI muting on/off control signal input from the HDMI transceiver “H”: muting on
48
DSP_SPIDS
O
Chip select signal output to the serial fl ash and DSP
49
DSP_RESET
O
Reset signal output to the DSP “L”: reset
50
SF_HOLD_DSP
O
Hold signal output to the serial fl ash “L”: hold
51
DIR_HCE
O
Chip enable signal output to the digital audio interface receiver
52
DIR_XSTATE
I
Source clock selection monitor input from the digital audio interface receiver
53
DIR_RST
O
Reset signal output to the digital audio interface receiver “L”: reset
54
HDMI_RST
O
Reset signal output to the HDMI transceiver “H”: reset
55
HDMI_MUTE_ON
O
HDMI muting on/off control signal output terminal “H”: muting on
• IC Pin Function Description
MAIN BOARD IC1002 R5F3650RDFB#30 (SYSTEM CONTROLLER)
HT-CT380/CT381
52
Pin No.
Pin Name
I/O
Description
56
HDMI_INT
I
Interrupt signal input from the HDMI transceiver
57
SEL_HDMI
O
HDMI selection signal output terminal “H”: HDMI
58
RST_FL
O
Reset signal output to the fl uorescent indicator tube “L”: reset
59
P_CONT3
O
Power on/off control signal output terminal “H”: power on
60
Vcc2
-
Power supply terminal (+3.3V)
61
NC
O
Not used
62
Vss
-
Ground terminal
63
PW_VACS_DET
I
Thermal detection signal input terminal (Except US and Canadian models)
64
P_CONT1
O
Power on/off control signal output terminal “H”: power on
65
WS_INT
I
Interrupt signal input from the RF modulator
66
DSP_INTR
I
Interrupt request signal input from the DSP
67
DAMP_SOFT_MUTE
O
Soft muting on/off control signal output to stream processor “L”: muting on
68
DAMP_INIT
O
Reset signal output to the stream processor “L”: reset
69
DAMP_PDN
O
Power down signal output to the stream processor “L”: power down
70
AMP_OVF
I
Overfl ow detection signal input from the digital power amplifi er
71
AC_CUT
I
AC cut detection signal input terminal “L”: AC cut is detected
72
KEY_INT
I
Key wake-up signal input terminal
73
BT_MUTE
I
Muting on/off control signal input from the Bluetooth module “L”: muting on
74
DC_DET
I
Speaker DC detection signal input terminal “L”: speaker DC is detected
75
FL_DATA
O
Serial data output to the fl uorescent indicator tube
76
FL_CS
O
Chip select signal output to the fl uorescent indicator tube
77
FL_CLK
O
Serial data transfer clock signal output to the fl uorescent indicator tube
78
P_CONT_HDMI
O
Power on/off control signal output terminal for the HDMI section “H”: power on
79
CP_RESET
O
Reset signal output to the MFI “L”: reset
80
P_CON_DSP
O
Power on/off control signal output terminal for the DSP “H”: power on
81, 82
NC
O
Not used
83
NFC_IRQ
I
Radio data reception signal input from the NFC module
84 to 86
NC
O
Not used
87
CP_CLK
O
Serial data transfer clock signal output to the MFI (US and Canadian models)
Serial data transfer clock signal output to the MFI and triaxial acceleration sensor
(Except US and Canadian models)
Serial data transfer clock signal output to the MFI and triaxial acceleration sensor
(Except US and Canadian models)
88
CP_DATA
I/O
Two-way data bus with the MFI (US and Canadian models)
Two-way data bus with the MFI and triaxial acceleration sensor
(Except US and Canadian models)
Two-way data bus with the MFI and triaxial acceleration sensor
(Except US and Canadian models)
89
TILT_SENS
O
Not used
90
DESTINATION
I
Destination setting terminal
91
MODEL
I
Model setting terminal
92, 93
KEY2, KEY1
I
Top panel key input terminal
94
AVss
-
Ground terminal
95
KEY0
I
Power key input terminal
96
Vref
I
Reference voltage (+3.3V) input terminal
97
AVcc
-
Power supply terminal (+3.3V)
98
DIR_DO
(MC_DIRDI)
I
Serial data input from the digital audio interface receiver
99
DIR_DI
(MC_DIRDO)
O
Serial data output to the digital audio interface receiver
100
DIR_CLK
O
Serial data transfer clock signal output to the digital audio interface receiver
Ver. 1.1
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