Sony HCD-ZTX7 / LBT-ZTX7 Service Manual ▷ View online
HCD-ZTX7
69
IC675 S-24CS16A01-J8T1G (MAIN Board)
NC
LOAD
LOAD
R/W
D
IN
D
OUT
INC
COMP
NC
A2
GND
SDA
SCL
WP
VCC
DATA OUTPUT
ACK OUTPUT
CONTROLLER
E
2
PROM
X DECODER
DATA REGISTER
SELECTOR
SERIAL CLOCK
CONTROLLER
ADDRESS
COUNTER
COUNTER
Y DECODER
START / STOP
DETECTOR
VOLTAGE DETECTOR
HIGH-VOLTAGE GENERATOR
DEVICE ADDRESS
COMPARATOR
5
6
7
4
3
2
1
8
IC900 BU2099FV (PANEL FUNCTION Board)
IC902 BU2099FV (PANEL FUNCTION Board)
IC902 BU2099FV (PANEL FUNCTION Board)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
LPF
Controller
Latch
Write
Buffer
Shift
Register
VSS
NC
DA
TA
CLK
LCK
LED1
LED2
LED3
LED4
LED5
VDD
OE
SO
NC
DIM1
DIM0
M2+
M2-
M1-
M1+
HCD-ZTX7
70
• IC Pin Function Descriptions
IC401 R5F3640MDFAR (System Controller) Main board
IC401 R5F3640MDFAR (System Controller) Main board
Pin No.
Pin Name
I/O
Pin Description
1
REQ
I
Zipang decoder request pin to master control.
2
RST
O
Reset signal output to the Zipang IC (digital signal processor) “L”:reset
3
M-MUTE
O
Control port for Zipang motor driver mute.
4
SIRCS
I
Remote control signal input
5
CCE
O
Chip enable contor port to Zipang IC.
6
CD CLK (BUCK)
O
Serial data transfer clock signal to Zipang IC
7
USB SEL-SW
O
USB and ZIPANG (CD) control switch CD(H) / USB(L)
8
BYTE
—
Ground terminal
9
CNVss
—
Ground terminal
10
XC-IN
I
Sub system clock input terminal (32.768kHz)
11
XC-OUT
O
Sub system clock output terminal (32.768kHz)
12
RESET
I
System reset signal input from the reset signal IC “L”: reset
After the power supply rises, “L” is input for several hundreds msec and then change to “H”.
After the power supply rises, “L” is input for several hundreds msec and then change to “H”.
13
X-OUT
O
Main system clock output terminal (5MHz)
14
VSS
—
Ground terminal
15
X-IN
—
Main system clock input terminal (5MHz)
16
VCC
—
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt input terminal
18
CAPM+
O
Capstan motor drive signal output
19
SBSY
I
Subcode sync detection signal input from the digital signal processor (Zipang IC).
20
AC-CUT
I
AC off detection signal input from the reset signal IC “L”: AC Cut detected
21
TMR
O
CDM turning motor control signal output
22
E-1
I
Disc tray status detection signal input from CDM
23
E-3
I
Disc tray status detection signal input from CDM
24
OPEN-SW
I
Eject detection signal input from CDM
25
TBL-SENSE
I
Disc tray position detection signal input from CDM
26
CIG BK
O
Backlight control signal for CIG (Chip In Glass) of fl uorescent indicator tube.
27
E-2
I
Disc tray status detection signal input from CDM
28
CIG LATCH
O
Latch control signal for CIG (Chip In Glass) of fl uorescent indicator tube.
29
IIC-CLK
I/O
Clock signal for IIC communcation for Master Control controller.
30
IIC-DATA
I/O
Data signal for IIC communcation for Master Control controller.
31
CIG DATA
O
Data signal for CIG (Chip In Glass) of FL Display.
32
TMF
O
CDM turning motor control signal output
33
CIG CLK
O
Clock signal for CIG (Chip In Glass) of FL Display.
34
USB SERIAL CTS0
I
Serial send control input pin from USB IC
35
USB SERIAL TxD0
O
UART serial transmission data line to USB IC.
36
USB SERIAL RxD0
I
UART serial reception data line from USB IC.
37
USB-RST
O
Reset signal output to USB control IC “L”: reset
38
USB SERIAL RTS0
O
Serial receive control output pin from USB IC.
39
B-TRIG
O
Deck side trigger plunger drive signal output “H”:plunger on
40
EFFECTOR-CTRL 1
O
Effector circuitry mode control 1, “H”: Delay/Effector Off , “H”: Flanger/Chorus.
41
EFFECTOR-CTRL 3
O
Effector circuitry mode control 3,”H”: Chorus/ Effector Off, “L”: Flanger/ Delay.
42
LED DRIVER-LATCH
O
Latch control signal for LED Driver IC.
43
LED DRIVER-DATA
O
Data signal for LED Driver IC.
44
LED DRIVER-CLOCK
O
Clock signal for LED Driver IC.
45
PROTECT2
O
FAN current detect and Regulator Short detect, ON(H)/ OFF(L)
46
STBY LED
O
LED drive signal output of POWER indicator.
47
B SHUT
I
Shut off detection signal input from deck A side reel pulse detector (A/D input)
48
STBY RELAY
O
Main power on/off control signal output “H”:power on
49
STK-MUTE
O
Power amplifi er and sub woofer amplifi er on/off control signal output “H”: amplifi er on
50
FAN CONTROL
O
Fan on/off control port.
51
LINE-MUTE
O
Line muting on/off control signal “L”:muting on
52
FRONT-RELAY
O
Relay drive signal output for the front speakers “H”:relay on
53
LINK RELAY
O
Surround speaker mode control signal “H”:LINK “L”:MATRIX SURROUND1/2
HCD-ZTX7
71
Pin No.
Pin Name
I/O
Pin Description
54
SW-SPK-RELAY
O
Relay drive signal output for the passive sub woofer “H”:relay on
55
PROTECTOR
I
Speaker protect detection signal input from speaker protect circuit “L”:protector on
56
FAN HI SPEED
O
Fan high speed control signal for Themal VACS, “L”: Fan high speed on.
57
R2A15216FP - CLK
O
Serial data transfer clock signal output to audio signal IC, R2A15216FP
58
R2A15216FP - DATA
O
Serial data output to audio signal IC, R2A15216FP
59
TUNED
I
“TUNED” input signal from Tuner pack.
60
TC-RELAY
O
Recording/playback selection signal output “H”:recording “L”:playback
61
REC MUTE
O
Recording muting on/off control signal output “L”:muting on
62
VCC
—
Power supply terminal (+3.3V)
63
REC BIAS
O
Recording bias on/off control signal output “H”:bias on
64
VSS
—
Ground terminal
65
METER POSITION SW
I
Meter position switch (Initial & End Position) for calibration purpose.
66
MIC DET / HP DET
I
Heahphone in and Mic in detect pin (A/D input).
67
ST-CE
O
PLL chip enable signal output to the tuner unit
68
MC-DOUT (ST-D IN)
I
PLL serial data input to the tuner unit
69
ST-CLK
O
PLL serial data transfer clock signal output to the tuner unit
70
MC-DIN (ST-D OUT)
O
PLL serial data output from the tuner unit
71
NO-USE
I
Unused port (Pull to GND)
72
METER LEVEL
I
Audio signal level for Meter level detect (A/D input).
73
POWER & DISPLAY-KEY
I
POWER key and DISPLAY key press detection signal (Interrupt input)
74
RDS-DATA
I
RDS data signal from Tuner pack.
75
RDS-CLK
I
RDS clock signal from Tuner pack.
76
EFFECTOR-S0
O
Effector circuitry delay time selection bit 0 output signal
77
EFFECTOR-S1
O
Effector circuitry delay time selection bit 1 output signal
78
EFFECTOR-S2
O
Effector circuitry delay time selection bit 2 output signal
79
CD BUS3
I/O
Data bus line for ZIPANG (CD) communcation with master control.
80
CD BUS2
I/O
Data bus line for ZIPANG (CD) communcation with master control.
81
CD BUS1
I/O
Data bus line for ZIPANG (CD) communcation with master control.
82
CD BUS0
I/O
Data bus line for ZIPANG (CD) communcation with master control.
83
B-HALF
I
Deck B cassette detection, forward side recording tab detection and reverse side recording tab
detection signal input terminal (A/D input)
detection signal input terminal (A/D input)
84
ADKEY 0
I
Key input terminal for AD key line 0.
85
ADKEY 1
I
Key input terminal for AD key line 1.
86
ADKEY 2
I
Key input terminal for AD key line 2.
87
MASTER VOL
I
Jog dial pulse input from the VOLUME encoder
88
OP DIAL
I
Jog dial pulse input from OPERATION DIAL encoder
89
VACS
I
Spectrum analyzer drive signal input from Audio IC signal (A/D input)
90
OVER VOLTAGE DET
I
Over-voltage protection detection input terminal “L”: over-voltage detected
91
MODEL-IN
I
Model setting terminal (A/D input)
92
DEST-IN
I
Destination setting terminal (A/D input)
93
THERMA VACS
I
Temperature detection signal input from thermistor (A/D input)
94
SW LEVEL IN
I
Subwoofer volume level detection from subwoofer volume jog (A/D input)
95
EEP-SCL
I/O
External EEPROM memory backup (Serial Clock line)
96
Avss
I
Ground terminal (for A/D conversion)
97
EEP_SDA
I/O
External EEPROM memory backup (Serial Data line)
98
VREF
I
A/D Converter reference voltage input terminal (+3.3V)
99
AVCC
—
Power supply terminal (+3.3V) (for A/D conversion)
100
SW ON LED
O
LED drive signal output of SUB WOOFER ON indicator on sub woofer “H”:LED ON
HCD-ZTX7
72
• IC Pin Function Descriptions
IC101 TC94A70FG-101 (RF AMP, FOCUS/TRACKING ERROR AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL
SERVO PROCESSOR, DIGITAL FILTER, D/A CONVERTER) (BD93 BOARD)
IC101 TC94A70FG-101 (RF AMP, FOCUS/TRACKING ERROR AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL
SERVO PROCESSOR, DIGITAL FILTER, D/A CONVERTER) (BD93 BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
AVSS3
—
Ground pin
2
RFZi
I
RF ripple zero crossing signal input
3
RFRP
O
RF ripple signal output
4
SBAD/RFDC
O
Sub beam addition signal or RF peak detection signal output
Not used in this set. (Open)
Not used in this set. (Open)
5
FEi
O
Focus error signal output Not used in this set. (Open)
6
TEi
O
Tracking error signal output
7
TEZi
I
Tracking error zero crossing signal input
8
AVDD3
—
Power supply pin (+3.3 V)
9
FOo
O
Focus coil drive signal output
10
TRo
O
Tracking coil drive signal output
11
VREF
I
Reference voltage (+1.65 V) input
12
FMO
O
Sled motor drive signal output
13
DMO
O
Spindle motor drive signal output
14
VSSP3
—
Ground pin
15
VCOi
I
VCO control voltage input
16
VDDP3
—
Power supply pin (+3.3 V)
17
VDD1
—
Power supply pin (+1.5 V)
18
VSS1
—
Ground pin
19
FGiN
I
FG signal input Not used. (Connected to ground.)
20
IO0 (/HSO)
I
Disc inner position detection signal input Fixed at “L” in this set.
21
IO1 (/UHSO)
O
Not used in this set. (Open)
22
XVSS3
—
Ground pin
23
XI
I
System clock input (16.9344 MHz)
24
XO
O
System clock output (16.9344 MHz)
25
XVDD3
—
Power supply pin (+3.3 V)
26
DVSS3
—
Ground pin
27
RO
O
Analog audio (R-ch) signal output
28
DVDD3
—
Power supply pin (+3.3 V)
29
DVR
O
Reference voltage (+1.65 V) output
30
LO
O
Analog audio (L-ch) signal output
31
DVSS3
—
Ground pin
32
VDDT3
—
Power supply pin (+3.3 V)
33
VSS1
—
Ground pin
34
VDD1
—
Power supply pin (+1.5 V)
35
VDDM1
—
Power supply pin (+1.5 V)
36
SRAMSTB
I
S-RAM standby mode control signal input Fixed at “L” in this set.
37
RST
I
Reset signal input from the system controller “L”: reset
38, 39
BUS0, BUS1
I/O
Serial data input/output from the system controller or USB controller
40
BUS2 (SO)
I/O
Serial data input/output from the system controller or USB controller
41
BUS3 (SI)
I/O
Serial data input/output from the system controller or USB controller
42
BUCK (CLK)
I
Serial data transfer clock signal input from the system controller or USB controller
43
CCE
I
Chip enable signal input from the system controller or USB controller
44
TEST
I
Setting pin for test mode Normally fi xed at “L”
45
IRQ
I
Interrupt request signal input
46
AoUT3 (PO4)
O
Request signal output
47
AoUT2 (PO5)
O
Audio data output
48
PIO0
O
Request signal output to the system controller or USB controller
49
PIO1
O
ST REQ signal output
50
PIO2
O
Power down signal output
51
PIO3
I
Gate signal input from the USB controller
52
VSS1
—
Ground pin
53
VDDT3
—
Power supply pin (+3.3 V)
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