DOWNLOAD Sony HCD-ZT4 / LBT-ZT4 Service Manual ↓ Size: 3.76 MB | Pages: 84 in PDF or view online for FREE

Model
HCD-ZT4 LBT-ZT4
Pages
84
Size
3.76 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
hcd-zt4-lbt-zt4.pdf
Date

Sony HCD-ZT4 / LBT-ZT4 Service Manual ▷ View online

HCD-ZT4
53
Pin No.
Pin Name
I/O
Description
55
SBOK/FOK
O
Not used
56
IPF
O
Not used
57
SFSY/LOCK
O
Not used
58
ZDET
O
Zero detection signal output terminal    Not used
59
GPIN
I
Not used
60
MS
I
Microcomputer interface mode selection signal input terminal    Fixed at “H” in this set
61
DOUT (PO6)
O
Digital audio data output terminal    Not used
62
AOUT (PO7)
O
Audio data output terminal    Not used
63
BCK (PO8)
O
Bit clock signal output to the USB controller
64
LRCK (PO9)
O
L/R sampling clock signal output terminal
65
AIN (PI4)
I
Digital audio data input from USB controller or A/D converter
66
BCKi (PI5)
I
Bit clock signal input from the USB controller or A/D converter
67
LRCKi (PI6)
I
L/R sampling clock signal input from the USB controller or A/D converter
68
VDD1
-
Power supply terminal (+1.5 V)
69
VSS1
-
Ground terminal
70
AWRC
-
Not used
71
PVDD3
-
Power supply terminal (+3.3 V)
72
PDo
O
Phase error margin signal between EFM signal and PLCK signal output terminal
73
TMAXS
O
TMAX detection signal output terminal    Not used
74
TMAX
O
TMAX detection signal output terminal
75
LPFN
I
Inverted signal input from the operation amplifi er for PLL loop fi lter
76
LPFo
O
Signal output from the operation amplifi er for PLL loop fi lter
77
PVREF
I
Reference voltage (+1.65V) input terminal
78
VCOF
O
VCO fi lter output terminal
79
PVSS3
-
Ground terminal
80
SLCo
O
EFM slice level output terminal
81
RFi
I
RF signal input terminal
82
RFRPi
I
RF ripple signal input terminal
83
RFEQo
O
EFM slice level output terminal
84
VRo
O
Reference voltage (+1.65V) output terminal
85
RESiN
O
External resistor connection terminal
86
VMDiR
O
Reference voltage (+1.65V) output terminal for automatic power control circuit
87
TESTR
O
Low-pass fi lter terminal for RFEQO offset correction
88
AGCi
I
RF signal amplitude adjustment amplifi cation input terminal
89
RFo
O
RF signal generation amplifi cation output terminal
90
RVDD3
-
Power supply terminal (+3.3 V)
91
LDo
O
Laser diode on/off control signal output to the automatic power control circuit    
“H”: laser diode on
92
MDi
I
Light amount monitor input from the laser diode of optical pick-up block
93
RVSS3
-
Ground terminal
94
FNi2 (C)
I
Main beam (C) input from the optical pick-up block
95
FNi1 (A)
I
Main beam (A) input from the optical pick-up block
96
FPi2 (D)
I
Main beam (D) input from the optical pick-up block
97
FPi1 (B)
I
Main beam (B) input from the optical pick-up block
98
TPi (F)
I
Sub beam (F) input from the optical pick-up block
99
TNPC
O
External capacitor connection terminal
100
TNi (E)
I
Sub beam (E) input from the optical pick-up block
HCD-ZT4
54
USB BOARD  IC901  TMP92CD28AFG-7AC9 (USB CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
/RESET
I
Reset signal input from the system controller    “L”: reset
2
DI
I
Ready to send signal input from the system controller
3, 4
NO USE
O
Not used
5
G-3
I
Function selection signal input terminal    Fixed at “L” in this set
6
DVCC
-
Power supply terminal (+3.3 V)
7 to 9
NO USE
O
Not used
10
DVSS
-
Ground terminal
11
DVCC
-
Power supply terminal (+3.3 V)
12
RVOUT1
O
Reference voltage (+3.3 V) output terminal
13, 14
RVIN
I
Reference voltage (+3.3 V) input terminal
15
RVOUT2
O
Reference voltage (+3.3 V) output terminal
16
DVCC
-
Power supply terminal (+3.3 V)
17
DVSS
-
Ground terminal
18 to 25
D0 to D7
I/O
Two-way data bus with the S-RAM
26
DVSS
-
Ground terminal
27
DVCC
-
Power supply terminal (+3.3 V)
28 to 35
D8 to D15
I/O
Two-way data bus with the S-RAM
36
A0
O
Address signal output terminal    Not used
37 to 43
A1 to A7
O
Address signal output to the S-RAM
44
DVSS
-
Ground terminal
45
DVCC
-
Power supply terminal (+3.3 V)
46 to 54
A8 to A16
O
Address signal output to the S-RAM
55 to 58
BUS0 to BUS3
O
Serial data output to the CD-MP3 processor
59
/BUCK
O
Serial data transfer clock signal output to the CD-MP3 processor
60
/CCE
O
Chip enable signal output to the CD-MP3 processor
61
NO USE
O
Not used
62
DVSS
-
Ground terminal
63
DVCC
-
Power supply terminal (+3.3 V)
64
RD
O
Output enable signal output to the S-RAM
65
WR
O
Write enable signal output to the S-RAM
66
SRLLB
O
Lower-byte control signal output to the S-RAM
67
SRLUB
O
Upper-byte control signal output to the S-RAM
68
NO USE
O
Not used
69
BOOT
I
Boot mode selection signal input terminal    “L”: boot mode
70
CS2
O
Chip select signal output to the S-RAM
71
LRCK
O
L/R sampling clock signal output to the CD-MP3 processor
72
AM1
I
Function mode selection signal input terminal    Fixed at “H” in this set
73
X2
O
System clock output terminal (9 MHz)
74
DVSS
-
Ground terminal
75
X1
I
System clock input terminal (9 MHz)
76
DVCC
-
Power supply terminal (+3.3 V)
77
USBOC
I
Over current detection signal input terminal
78
USBPON
O
USB VBUS power on/off control signal output terminal    “H”: power on
79
D+
I/O
Two-way data (positive) bus with the USB connector
80
D-
I/O
Two-way data (negative) bus with the USB connector
81
AM0
I
Function mode selection signal input terminal    Fixed at “H” in this set
82
NO USE
O
Not used
83
DVSS
-
Ground terminal
84
DO
O
Clear to send signal output to the system controller
85
DATA
I
Audio data input from the CD-MP3 processor
86
CLOCK
I
Audio data transfer clock signal input from CD-MP3 processor
87
TXD1
O
Serial data output to the system controller
88
RXD1
I
Serial data input from the system controller
89
NO USE
O
Not used
90
SDA
I/O
Two-way EEPROM IIC data bus terminal    Not used
HCD-ZT4
55
Pin No.
Pin Name
I/O
Description
91
SCL
I/O
Two-way EEPROM IIC clock bus terminal    Not used
92
BCK
O
Bit clock signal output to the CD-MP3 processor
93
DATA
O
Audio data output to the CD-MP3 processor
94
GATE
O
 Gate signal output to the CD-MP3 processor
95
DVCC
-
Power supply terminal (+3.3 V)
96
REQ
I
Request signal input from the CD-MP3 processor
97
ST-REQ
I
Request signal input from the CD-MP3 processor
98, 99
G-1, G-2
I
Function selection signal input terminal    Fixed at “L” in this set
100
DVSS
-
Ground terminal
HCD-ZT4
56
MAIN BOARD  IC401  R5F3640MDFAR (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
METER-IN3, 
METER-IN4
O
Meter motor drive signal output to the motor drive
3
SW LED
O
LED drive signal output terminal for SUBWOOFER indicator
4
SIRCS
I
SIRCS signal input from the remote control receiver
5
CDM-SD
I
CD mechanism deck protector detection signal input signal    “H”: protector on
6, 7
M2-, M2+
O
Disc change and mode change motor drive signal output terminal
8
BYTE
I
External data bus width selection signal input terminal
9
CN Vss
I
Processor mode switch input terminal (for test)
10
XC-IN
I
Sub system clock input terminal (32.768 kHz)
11
XC-OUT
O
Sub system clock output terminal (32.768 kHz)
12
RESET
I
System reset signal input from the reset switch    “L”: reset   For several hundreds msec. 
after the power supply rises, “L” is input, then it changes to “H” 
13
X-OUT
O
Main system clock output terminal (5 MHz)
14
VSS
-
Ground terminal
15
X-IN
I
Main system clock input terminal (5 MHz)
16
VCC
-
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt signal input terminal    Not used
18
M1-
O
Tray/drawer transportation motor drive signal output terminal
19
SBSY
I
Subcode block sync signal input from the CD-MP3 processor
20
AC-CUT
I
AC cut on/off detection signal input terminal    “L”: AC cut on
21
M1+
O
Tray/drawer transportation motor drive signal output terminal
22, 23
SW3, SW1
I
Disc change and mode change detection signal input from CD mechanism deck
24
SW-CHUCK
I
Tray chuck position detection signal from CD mechanism deck
25
SW2
I
Disc change and mode change detection signal input from CD mechanism deck
26
SW-CLOSE
I
Drawer close position detection signal input from CD mechanism deck
27
SW-STOCK
I
Tray stock position detection signal from CD mechanism deck
28
SW-OPEN
I
Drawer open position detection signal input from CD mechanism deck
29
IIC-CLK
I/O
Serial data transfer clock signal output terminal    Not used
30
IIC-DATA
I/O
Serial data output terminal    Not used
31
MC TXD
O
Serial data output to the DMPORT connector
32
MC RXD
I
Serial data input from the DMPORT connector
33
USB RESET
O
Reset signal output to the USB controller
34
USB CTS0
I
Clear to send signal input from USB controller
35
USB TXD0
O
Serial data output to the USB controller
36
USB RXD0
I
Serial data input from the USB controller
37
USB SEL-SW
O
Bus selection signal output terminal
38
USB RTS0
O
Ready to send signal to USB controller
39
AD SUPPLY SW
O
Power on/off control signal output terminal for the jog dail
40
MP3 IREQ
I
Request signal input from the CD-MP3 processor
41 to 44
CD BUS0 to CD BUS3
I/O
Serial data output to the CD-MP3 processor
45
CD BUCK
O
Serial data transfer clock signal output to the CD-MP3 processor
46
CD CCE
O
Chip enable signal output to the CD-MP3 processor
47
CD-MMUTE
O
Muting signal output to the coil/motor driver
48
CD-XRST
O
Reset signal output to the CD-MP3 processor
49
TC_+9V SW
O
Power on/off control signal output terminal for the tape section
50
PROTECT
I
Speaker protect detection signal input from speaker protect circuit    “H”: protector on
51
STK MUTE
O
Power amplifi er on/off control signal output terminal    “H”: amplifi er on
52
SW SPK RELAY
O
Relay drive signal output terminal for the subwoofer    “H”: relay on
53
FR SPK RELAY
O
Relay drive signal output terminal for the front speakers    “H”: relay on
54
STBY RELAY
O
Main power on/off control signal output terminal    “H”: power on
55
EEP-DATA
I/O
Two-way IIC data bus with the EEPROM
56
EEP-SCL
I/O
Two-way IIC clock bus with the EEPROM
57
DMPORT DET
I
DMPORT adaptor connection detection signal input terminal
58
LINE MUTE
O
Line muting on/off control signal output terminal    “L”: muting on
59
R2A15216FP-CLK
O
Serial data transfer clock signal output to the electrical volume
60
R2A15216FP-DATA
O
Serial data output to the electrical volume
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