Sony HCD-VX8J Service Manual ▷ View online
– 79 –
SRAM
VDD
OSC
ADM-CONT
ADM
L.P.F
VIRTUAL
13
14
15
16
17
18
19
20
21
22
23
24
12
11
10
9
8
7
6
3
2
1
5
4
A
B
R-OUT
L-OUT
EF-VOL
VREF
AGND
DC-OUT
D/A
NS
A/D
VDD
LC-INB
LC-INE
R-IN
L-IN
RS-OUT
L-FS-IN
VCC
R-PS-IN
LS-OUT
LPF2
LPF1
SW2
SW1
VSS
A
B
A
B
R +DELAY
L –DELAY
2k
50k
50k
L +R
L –R
• SURROUND Board
IC1201 LV1150
– 80 –
Pin No.
Pin Name
I/O
Function
1
DVDD0
—
Digital power supply
2
XRST
I
System reset
3
MUTE
I
Muting selection pin
4
DATA
I
Serial data input, supplied from CPU
5
XLAT
I
Latch input, supplied from CPU
6
CLOK
I
Serial data transfer clock input, supplied from CPU
7
SENS
O
SENS output
8
SCLK
I
SENS serial data read-out clock
9
ATSK
I/O
Input pin for anti-shock (Ground)
10
WFCK
O
WFCK (Write Frame Clock) output (Not used)
11
XUGF
O
XUGF output (Not used)
12
XPCK
O
XPCK output (Not used)
13
GFS
O
GFS output (Not used)
14
C2P0
O
C2PO output
15
SCOR
O
Sub-code sync output
16
CM4
O
4.2336MHz output (Not used)
17
WDCK
O
48-bit slot D/A interface word clock (Not used)
18
DVSS
—
Digital ground
19
COUT
O
Numbers of track counted signal output (Not used)
20
MIRR
O
Mirror signal output (Not used)
21
DFCT
O
Defect signal output (Not used)
22
FOK
O
Focus OK output (Not used)
23
PWM1
I
(Not used)
24
LOCK
I/O
GFS in sampled by 460Hz (Not used)
25
MDP
O
Output to control spindle motor servo
26
SSTP
I
Input signal to detect disc inner most trak
27
FST0
O
2/3 divider output (Not used)
28
DVDD1
—
Digital power supply
29
SFDR
O
30
SRDR
O
31
TFDR
O
32
TRDR
O
33
FFDR
O
34
FRDR
O
35
DVSS1
—
Digital ground
36
TEST
I
37
TES1
I
38
VC
I
Center voltage input
39
FE
I
FOCUS error signal input
40
SE
I
Sled error signal input
8-29. IC PIN FUNCTIONS
• IC101 DIGITAL SIGNAL PROCESSOR (CXD3008Q) (BD Board)
Sled drive output
Tracking drive output
Focus drive output
TEST pin connected normally ground
– 81 –
Pin No.
Pin Name
I/O
Function
41
TE
I
Tracking error signal input
42
CE
I
Center servo analog input
43
RFDC
I
RF signal input
44
ADI0
O
Test pin (Not used)
45
AVSS0
—
Analog ground
46
IGEN
I
Power supply pin operational amplifiers
47
AVDD
—
Analog power supply
48
ASYO
O
EFM full swing output
49
ASYI
I
Asymmetry comparate voltage input
50
RFAC
I
EFM signal input
51
AVSS1
—
Analog ground
52
CLTV
I
Control voltage input for master VCO
53
FILO
O
Filter output for master PLL
54
FILI
I
Filter input for master PLL
55
PCO
O
Charge-pump output for master PLL
56
AVDD1
—
Analog power supply
57
BIAS
I
Asymmetry circuit constant current input
58
VCTL
I
Control voltage input for variable pitch PLL
59
V16M
I/O
16.9344MHz output (Not used)
60
VPCO
O
Charge-pump output for variable pitch PLL (Not used)
61
DVDD2
—
Digital power supply
62
ASYE
I
Asymmetry circuit ON/OFF
63
MD2
I
Digital-out ON/OFF control
64
DOUT
O
Digital-out output
65
LRCK
O
48-bit slot D/A interface, LR clock output
66
PCMD
O
48-bit slot D/A interface, Serial deta output
67
BCLK
O
48-bit slot D/A interface, bit clock output
68
EMPH
O
Playback disc output in emphasis mode (Not used)
69
XTSL
I
X’tal selection input pin
70
DVSS2
—
Digital ground
71
XTAI
I
X’tal oscillator circuit input
72
XTAO
O
X’tal oscillator circuit output (Not used)
73
SOUT
O
74
SOCK
O
(Not used)
75
XOCT
O
76
SQSO
O
Sub-Q serial output
77
SQCK
I
Clock input for SQSO read-out
78
SCSY
I
Sub-code input
79
SBSO
O
Sub-P through Sub-W serial output (Not used)
80
EXCR
I
Clock input for SBSO read-out
– 82 –
Pin No.
Pin Name
I/O
Function
• IC502 MPEG DECODER, MECHANISM CONTROL (M30620MC-A05FP) (VIDEO (1/3) Board)
1
SENSE
I
Internal state (SENSE) monitor input (IC101)
2
SENSE CLK
O
Serial data reading clock output (IC101)
3
DSP DATA
O
Serial data output (IC101)
4
DSP LATCH
O
Lach output (IC101)
5
DSP CLK
O
Serial data clock output (IC101)
6
TSENS
I
Not used
7
REMOTE IN
I
Not used
8
BYTE
I
External bus width change input (Connected to ground)
9
VSS
–
Ground
10
DSP MUTE
O
Mute output (IC101) “H” : mute
11
CTRL1 (L : DOUBLE)
O
Double change output (IC101) “L” : double
12
XRESET
I
System reset input “L” : reset
13
XOUT
O
Main clock output (10MHz)
14
VSS
–
Ground
15
XIN
I
Main clock input (10MHz)
16
VCC
–
+5V power supply
17
NMI
I
Requests mask disable interruption input (Connected to +5V)
18
SCOR
I
Subcode sync input (IC101)
19
D SENS
I
Not used
20
CL680 INT
I
Video CD interruption input (IC505)
21
CL680 HSEL
O
Video CD select data of the host MPU (IC505)
22
DF LATCH
O
Digital filter latch output (IC509)
23
CL680 HRDY
I
Ready signal input for communication to the host MPU (IC505)
24
680 RESET
O
Video CD reset output (IC505) “L” : reset
25
JOG1
I
Not used
26
JOG2
I
Not used
27
CTRL2
O
Double control output (IC101) “H” : double
28
LD ON
O
Laser diode ON/OFF output
29
IIC1
I/O
IIC convertion microcomputer receive data (Former type), IIC clock input from master control (New type)
30
IIC0
I/O
IIC convertion microcomputer transmittion data (Former type), IIC data input from master control (New type)
31
DATA1O
O
Serial 1 data output (IC505, 509)
32
DATA1I
I
Serial 1 data input (IC505, 509)
33
CLK1
O
Serial 1 clock output
34
SHARPNESS
O
Sharpness output L : normal, H : sharpness
35
XVLEVEL. DOWN
O
Fix the video signal output level output
36
SUBQ DATA
I
Serial 2 data input for subcode sync reading
37
SUBQ CLK
I
Serial 2 clock input for subcode sync reading
38
P. ON
I
Not used
39
BUS XRDY
I
Not used
40
BUS
I
Not used
41
BUS XHOLD
I
Not used
42, 43
BUS
I
Not used
44
BUS XRD
I
Model selection input “L” : chinese model, “H” : except chinese model
45
BUS
I
V sync signal input
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