Sony HCD-V8900 / HCD-V8900AV / LBT-V8900AV Service Manual ▷ View online
HCD-V8900/V8900AV
– 17 –
– 18 –
7-2. BLOCK DIAGRAMS
– KEY CON SECTION –
SECTION 7
DIAGRAMS
Note:
pA is including in AUDIO board.
7-1. CIRCUIT BOARDS LOCATION
J761
MIC LEVEL
RV760
MIC 1
3
1
J762
MIC 2
IC1403
6
7
1
2
9
8
5
3
4
9 10 11
Q1401
7 8 9
L OUT
A
MAIN
SECTION
• R CH : Same as Lch
• Signal path
: FM
: MIC
• Signal path
: FM
: MIC
(Page 25)
22
15
MIX
OUT
LPF1
IN
Rch
DATA
CLK
LATCH
K CON
L IN
DATA
CLOCK
STORBE
KEY CONTROL
IC1401
SWITCH
ECHO LEVEL
RV761
IC761
ECHO
LPF1
LPF2
IC760 (2/2)
ECHO AMP
IC760 (1/2)
MIC AMP
09
p
A
MOTOR board
AUDIO board
(including
(including
p
A)
TABLE SENSOR board
CD MOTOR board
LED board
BD board
LEAF SWITCH board
TRANS board
PANEL board
HP/MIC board
TC-A SW board
CD-LED board
CD-A SW board
DOOR SW board
TC-B SW board
CD-B2 SW board
CD-B1 SW board
POWER board
VIDEO board
VIDEO OUT board
KEYCON board
MAIN board
SURROUND board
FM/AM TUNER PACK
VIDEO POWER board
HCD-V8900/V8900AV
– 19 –
– 20 –
– CD SECTION –
APC LD
AMP
RF AMP
IC103
1
2
19
3
4
5
6
RF
SUMMING
AMP
RF FQ
AMP
FOCUS
ERROR
AMP
15
TRACKING
ERROR
AMP
13
11
10
VC
BUFFER
12
VC
VC
FOCUS/TRACKING COIL DRIVE
SPINDLE/SLED MOTOR DRIVE
SPINDLE/SLED MOTOR DRIVE
IC102
1
2
4
5
T+
T–
F+
F–
19
20
16
17
10
9
12
13
M
M102
SLED
SLED
MOTOR
M
M101
SPINDLE
MOTOR
27
26
23
24
TRACKING
COIL
FOCUS
COIL
16
RF
15
MUTE
09
8
9
4
A
C
B
D
E
F
DETECTOR
1
OPTICAL PICK-UP
BLOCK (KSS-213D/Q-NP)
LD
DRIVE
Q101
PD
LASER
DIODE
LD
LD
POWER
INTEGRATOR
INTE-
GRATOR
28
27
26
29
RF DC
TE
SE
FE
A/D
CONVERTER
4
6
10
8
2
100
96
ASYMMETRY
CORRECTION
CORRECTION
ASY0
RF AC
ASY1
MIX
36
MIRR
DFCT
FOK
DETECTOR
DIGITAL
PLL
EFM
DEMODULATOR
CLOCK
GENERATOR
FOK
DFCT
MIRR
SERVO DSP
FOCUS
SERVO
SERVO
TRACKING
SERVO
SLED
SERVO
PWM
GENERATOR
TRACKING
PWM
GENERATOR
FOCUS
PWM
GENERATOR
SLED
PWM
PWM
GENERATOR
SYNC
PROTECTOR
CLV SERVO
PROCESSOR
1B TIMS
OVERSAMPLING
FILTER
NOISE
SHAPER
TIMING
GENERATOR 1
TIMING
GENERATOR 2
DIGITAL SERVO
DIGITAL SIGNAL PROCESSOR
IC101
62
XTAL
REGISTER
DATA BUS
ERROR
CORRECTOR
D/A
DATA
PROCESSOR
79
54
MUTE
GFS
99
S STOP
+5V
S901
LIMIT
SWITCH
TFDR
TRDR
FFDR
FRDR
SRDR
SFDR
MDP
32K
RAM
ADDRESS
GENERATOR
PRIORITY
EMCODER
SERIAL/PARALLEL
PROCESSOR
PEAK
DETECTOR
SUBCODE
Q
PROCESSOR
SUBCODE
P-W
PROCESSOR
DIGITAL
OUT
70
MD2
71
DOUT
EXCK
76
SBSO
75
77
78
SUBQ
SQCK
83
SCLK
73
74
SCOR
WFCK
47
BCLK
LRCK 45
DATA
46
+5V
384FS
LDON
SUBQ
SQCK
SCLK
ADATA
LRCK
BCK
SCOR
86
87
88
XLT
DATA
CLK
XLT
DATA
CLK
CPU
INTERFACE
SERVO
AUTO
SEQUENCER
SENS
SENS
80
56
C2PO
SERVO
INTERFACE
MIRR
91
92
DFCT
FOK
93
81
XRST
XRST
AMUTE
UP SW
39
38
C2PO
VIDEO
SECTION
B
(Page 21)
DISC
TABLE
SENSOR
IC202
T.SENS
TBL.L
TBL.R
S201
UP SW
9
1
7
3
OUT1
OUR2
IN1
IN2
MOTOR DRIVER
IC201
M
M201
TABLE
MOTOR
C
MAIN
SECTION
(Page 25)
• R CH: Same as L ch
• SIGNAL PATH
: CD
: VIDEO
• SIGNAL PATH
: CD
: VIDEO
HCD-V8900/V8900AV
– 21 –
– 22 –
– VIDEO SECTION –
RGB-YUV
CONV.
TIMING
GEN.
NOISE
REDUSER
YUV-RGB
CONV.
60
67
51
58
20
27
11
18
71
73
•
76
80
63
70
1
4
•
6
9
11
18
MEMORY
CONT.
DRAM
IF
29
30
31
98
100
97
DCLKI
Y
C
Y
C
NOISE REDUCTION
IC301
DEMPX, LEVEL
TRANSLATOR
&
INTERPOLTATOR
VIDEO
POSTPROCESSOR
&
SYNC GENERATOR
LPF
LPF
DELAY
MODULATOR
SYNC
SLOPE
GEN.
CLOSED
CAPTION
ENCODER
SIO & I
2
O-BUS
CONT.
SUB
CARRIER
GEN.
SYNC GEN.
&
TIMING CONT.
49 50
48
59 60
62
55
57
51
1/2
56
XRST
DCLK
HSYNC
VSYNC
DCLK
XVRST
FID
VSYNC
HSYNC
VDAC-XLAT
CLK
DATA
3
4
5
6
X401
27MHz
CT401
13.5MHZ
CLOCK GENARATOR
IC402
Y, C/Y, U, V
SELECTOR
&
INTER-
POLATOR
24
29
32
5
3
7
1
4
3
V
Y
C
10BIT VIDEO D/A CONVERTER
IC401
5
7
VIDEO AMP
IC451
Y/C AMP
IC452
J9001
VIDEO OUT
J9002
S VIDEO OUT
NR-XCS
MCLK
MDATA
MDATA
MDATA
RESET
OS-XLAT
MCLK
MCLK
OUTPUT
CONT.
4
3
2
1
8
OSD
IC271
VIDEO
RAM
DATA INPUT
SHIFT
RESISTOR
SYNC
CONT.
DATA
SEL.
DISPLAY
POSITION
CONT.
18
17
16
15
19
20
OSC
1
5
CK 1/2 Q
6.75MHz
DCLK
HSYNC
VSYNC
XOSDEN
OSD R
OSD G
OSD B
CLOCK
GENERATOR
IC272
97
95
92
93
94
89
56
57
58
59
118
HSYNC
XSGRST
VSYNC
FID
DCLK
XOSDEN
XOSDEN
OSD B
OSD G
OSD R
XRST
MPEG
VIDEO
DECODER
MPEG
SYSTEM
DECODER
CD-ROM
DECODER
MPEG
AUDIO
DECODER
112
111
110
109
103
100
101
102
11
12
13
14
15
9
8
7
6
5
2
3
BUFFER
IC501 (1/2)
HOST INTERFACE
117
115
116
114
EACH CIRCUIT BLOCK
D-RAM INTERFACE
34
30
15
16
31
5 6
• •
•
119 120
7–13 16
•
17–21 23 24 32 33
•
•
•
•
38–43 46–55
•
X202
28.63636MHz
106
107
X201
45.1584MHz
XTL0O
XTL01
XTL2O
XTL2I
MPEG DECODER
IC201
18–21 24–28
•
27
20
22
55
2–10 21 23–25
•
•
•
2–5 7–10 35–38 40–43
•
•
LCAS
UCAS
W
RAS
A8
A0
DQ16
DQ1
WE
CE1
OE
A12
A0
I/O8
I/O1
D-RAM
IC251
S-RAM
IC751
D0
D7
A0
A3
XHCS
XWR
XHDT
XHIRQ
•
11–13 15–19
8
10
9
6
1
2
11
12
13
XTCS
IC772
41
54
56 43 70
7 8
22–29 • 31–35
13 – 20
37
35
68
49
48
47
34
35
36
37
44
18
43
1
2
3
4
5
6
72
64
CMD0
CMD1
CMD2
CMD2
CMD3
SACK
QINT
MREQ
QINT
MREQ
MDATA
MCLK
OS-XLAT
NR-XCS
73
78
74
11
10
77
76
DATA
CLK
AMUTE
AMUTE
SQCK
SUBQ
SCLK
XLT
SCLK
XLT
CMD0
CMD1
CMD2
CMD2
CMD3
SACK
QINT
MREQ
NPIN
75
71
62
48
LDON
SCOR
SENS
RESET
SENS
RESET
384FS
DATA
CLK
CLK
AMUTE
SQCK
SUBQ
SCLK
SUBQ
SCLK
XLT
LDON
SCOR
SENS
XRST
SCOR
SENS
XRST
PAL
AUTO
NTSC
S9001
SYSTEM SELECT
52
51
X701
10MHz
EXTAL
XTAL
11
10
52
X901
5MHz
X2
CD-XRST
X1
VDAC-XLAT
DF-XLAT
WAIT
WR
XHIRQ
AS
A17
A18
RD
A12
A0
D7
D0
MECHA CONTROL
IC701
56
55
15
IIC INTERFACE
IC901
RESET
IIC-DATA
IIC-CLK
B
CD
SECTION
(Page 20)
B
CD
SECTION
(Page 20)
09
BCK
ADATA
LRCK
LRCK
C2PO
384FS
ADATA
LRCK
LRCK
BCLK
4
16
IC501
(2/2)
DATA
CLK
AMUTE
384FS
11
6
3
11
27
25
21
22
16
18
12
10
3
4
5
2
13
4
1
BUFFER
IC181
XRST
6
INPUT
PLM
D/A
CONV.
MODE
MUTE
CIRCUIT
ADATA
384FS
LRCK
BCLK
DATA
CLK
CLK
DF-XLAT
AMUTE
TIMING
CIRCUIT
CLOCK
GENERATOR
1
IIC-CLK
IIC-DATA
XRST
L CH
D
MAIN
SECTION
(Page 25)
2
3
1
6
7
R CH
ACTIVE LPF
IC102
X101
33.8688MHz
DIGITAL FILTER & D/A CONVERTER
IC101
• R CH: Same as L ch
• SIGNAL PATH
• SIGNAL PATH
: VIDEO
: Y
: CHROMA
: CD
: Y
: CHROMA
: CD
Y0-Y7
C0-C7
INT
40
5
4
3
IC771
HCD-V8900/V8900AV
– 23 –
– 24 –
– DECK SECTION –
IC611
R CH
HP101
PB HEAD
(DECK A)
(DECK A)
L
R
RV311
PLAYBACK
LEVEL
DECK A
IC601
R CH
L
R
RV301
PLAYBACK
LEVEL
DECK B
3
1
IC602
4
REC/PB
EQOUT
REC BIAS
BIAS OSC
T621, Q621, 622
ERASE HEAD
ERASE BIAS
4
2
B IN
A IN
12
PB-A/B
EQIN
10
11
RV301
REC LEVEL
10
RECOUT
BIAS SW
NORM
CROM
70
120
DOLBY
TYPE B
TYPE B
+7.5V
Q623, 901
RIN
6
PB
19
14
16
17
8
20
PB OUT
LM ON/
OFF
BIAS ON/OFF
RM ON/OFF
PB L
REC L
PB A/B
NORM/HIGH
REC/PB/PASS
BIAS ON/OFF
RM ON/OFF
RELAY REC/PB
09
B
MAIN
SECTION
LM ON/OFF
NORM/
HIGH
PAS
DOL
P
R
REC/PB HEAD
(DECK B)
X
DECK PROCESS
DOLBY NR
IC401
HRPE101
RV341
REC
BIAS
24 25
18
NR ON/
OFF
NR ON/OFF
13
S1004
A CrO
2
S1008
B CrO
2
15
A 120/70
B 120/70
M
CAP M SWITCH
Q405, 407
SPEED
CONTROL
Q651
SWITCH
Q406
RV652
HIGH
SPEED
RV651
NORMAL
SPEED
M1
CAPSTAN
MOTOR
CAP M ON/OFF
CAP M H / L
REEL
DETECT
Q1001
A SHUT
B SHUT
REEL
DETECT
Q1002
S1001 (A PLAY)
+5V
S1002 (B PLAY)
A PLAY
B PLAY
A HALF
S1003
(A HALF)
+5V
S1005
(REC A)
S1006
(B HALF)
S1009
(REC B)
SWITCH
Q408, 409
TRIG H / L
B TRIG
A TRIG
4
6
5
TRIGGER
MOTOR
DRIVE
IC402
VZ
IN2
IN1
OUT1
OUT2
2
10
M
M2
TRIGGER
MOTOR
BHALF
(Page 25)
• R CH : Same as L ch
• SIGNAL PATH
: PB (DECK A)
: PB (DECK B)
: REC (DECK B)
• SIGNAL PATH
: PB (DECK A)
: PB (DECK B)
: REC (DECK B)
R CH
CN403
1
3
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