DOWNLOAD Sony HCD-V808 / MHC-V808 Service Manual ↓ Size: 1.55 MB | Pages: 77 in PDF or view online for FREE

Model
HCD-V808 MHC-V808
Pages
77
Size
1.55 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
hcd-v808-mhc-v808.pdf
Date

Sony HCD-V808 / MHC-V808 Service Manual ▷ View online

– 84 –
IC401
CXD1913Q
52
51
F1
XVRST
50
XCS
49
SCK
48
SI
47
VSS
46
TDO
45
TCK
44
TMS
43
TDI
42
VDD
41
TRST
40
VSS
XTEST1
XTEST3
36
TD8
35
TD9
34
VDD
33
TD1O
53
VDD
54
XTEST4
55
XRST
56
SYSCLK
57
PDCLK
58
VSS
59
VSYNC
60
HSYNC
61
SO
62
FID
63
VDD
64
XIICEN
1/2
SYNC Gen.
and
Timing Controller
SIO and I
2
O-Bus
Controller
3
8
Sub Carrier
Gen.
Modulator
Dempx,
Level
Translator
and
Interpolator
4 : 2 : 2 to
4 : 4 : 4
Y, C/
Y, U, V
selector and
Interpolator
SYNC Slope
Gen.
Closed Caption Encoder
(for NTSC)
CSYNC
CHROMA
V
U
Y
BURST FLAG
37-39
-
TEST MODE
10
VDD
19
VSS
C7
C0
11-18
-
5
VSS
Y3
Y0
6-9
-
Y7
Y4
1-4
-
Delay
10bit
DAC
10bit
DAC
10bit
DAC
LPF
LPF
29 YO
28 AVSS2
27 AVDD2
26 VG
25 VB
24 COMPO
23 AVSS1
22 AVDD1
21 VREF
20 IREF
30 AVDD3
31 AVSS3
32 CO
4
4
8
IC501
SN74HC245ANS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A1
DIR
A2
A3
A4
A5
A6
A7
A8
GND
ENABLE
G
V
CC
B1
B2
B3
B4
B5
B6
B7
B8
– 85 –
– DECK Section –
IC602
µPC1330HA
1
2
3
4
5
6
7
8
9
INVERTER
COMPARATER
SW R1
GND
SW P1 CONT
GND
VCC
SW P2 GND
SW R2
IC1502
LB1641
1
2
3
4
5
6
7
8
9
10
GND
MOTOR
DRIVE
NOISE
FILTER
CLAMP
FWD.IN
REV.IN
VCC 1
VCC 2
NOISE
FILTER
MOTOR
DRIVE
MOTOR
DRIVE
MOTOR
DRIVE
T.S.D
O.C.P
FWD/REV/STOP
CONTROL LOGIC
– MAIN/POWER SUPPLY Section –
IC281
µPC1237HA
1
2
3
4
5
6
7
8
OVER LOAD DET
F/F
OFFSET DET
LATCH/
AUTORESET
V
CC
 ON
MUTE
AC OFF
DET
V
CC
IC401
MSM6653A-485RS
1
7
8
16
15
14
13
12
11
ADDRESS &
COMMAND
CONTROLLER
544KBIT ROM
(EDITING ROM &
ADDRESS ROM
CONTAINS 22KBIT)
I/O
INTERFACE
ADPCM
SYNTHESIZER
PCM
SYNTHESIZER
12BIT DAC
LPF
17BIT
MULTIPLEXER
DATA
CONTROLLER
17BIT
ADDRESS
COUNTER
MELODY
GENERATOR
BEEP TONE
GENERATOR
TIMING
CONTROLLER
OSC
17
18
19
20
2
3
4
5
6
9
10
8
7
12
VPP
I4
I5/SI
I6/SD
CH
RESET
BUSY
NAR
AOUT
GND
VDD
XT
XT
CMD
ST
I0
I1
I2/PORT0
I3/PORT1
PGM
– 86 –
IC901
LA5617
ON/OFF
CURRENT
LIMITER
START
CIRCUIT
VREF
OVER HEAT
PROTECT
ON/OFF
CURRENT
LIMITER
1
2
3
4
5
6
7
8
9
10
VCC
VMUTE
VCC
VREF
ERROR
AMP
VREF
ERROR
AMP
VO1
VCC
CN1
EN
EN DISPLAY
GND
NC
CN2
VEE
VO2
~
_1.8V
~_
140uA
COMPARATER
– PANEL Section –
IC751
M65850P
OSCILLATOR
1/2 VCC
AUTO
RESET
LPF1
MAIN
CONTROL
A/D
20KBIT
SRAM
LPF2
D/A
1
2
3
4
5
6
7
8
9
10
14
13
12
11
CLOCK
RESET
MO
MI
D1
DO0
DO1
VCC
CLOCK
REF
OP2IN
OP2OUT
LPF2IN
LPF2OUT
LPF1IN
LPF1OUT
OP1OUT
OP1IN
CC1
CC2
GND
– POWER AMP/KEY CONTROL Section –
IC1401
M65847FP-TP
1
2
3
4
5
6
7
8
ADCONT
DA1CONT
KEY DOWN
KEY UP
DAIINTIN
ADINTOUT
ADINTIN
LPF1
REF
REF
REF
REF
HPF
LPF2
MIX
CLKO/KEY0
SDATA/KEY1
SCK/KEY2
STROBE/KEY3
KEY4
KEY5
REF
GND
VCC
MODE2
MODE1
DAIINTOUT
LPF1IN
LPF1OUT
HPFIN
HPFOUT
LPF2IN
LPF2OUT
MIXIN
MIXOUT
DA2CONT
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
+
LOGIC
D/A
RESET
RAM
A/D
CLOCK
GENERATOR
REF
+
+
+
– 87 –
• Waveforms
– BD Section –
1
IC101 
 (RFDC) 200 mV/DIV, 500 ns/DIV
2
IC101 
 (TE) 200 mV/DIV, 100 µs/DIV
1.3       Vp-p
+0.25
–0.20
Approx. 500 mVp-p
3
IC101 
 (FE) 200 mV/DIV, 50 ns/DIV
Approx. 200 mVp-p
4
IC101 
 (RFAC) 200 mV/DIV, 500 ns/DIV
1.3       Vp-p
+0.25
–0.20
5
IC101 
$∞
 (LRCK)
5.2 Vp-p
22.7 
µ
s
6
IC101 
 (BCLK)
7
IC101 
^™
 (XTAI)
5.2 Vp-p
16.9344 MHz
8
IC101 
 (MDP)
2.6 Vp-p
7.5 
µ
s
– VIDEO Section –
1
IC501 
 (B3 (384FS))
4.4 Vp-p
16.9344 MHz
2
IC501 
9
 (A8 (BCLK))
4.6 Vp-p
474 ns
3
IC501 
7
 (A6 (LRCK))
5.2 Vp-p
22.7 
µ
s
4
IC701 
 (EXTAL)
5 Vp-p
10 MHz
5
IC201 
2
 (XTL0O)
2.5 Vp-p
28.63636 MHz
5.2 Vp-p
474 ns
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