Sony HCD-MD595 Service Manual ▷ View online
86
Pin No.
Pin Name
I/O
Description
31
C2-PWM-B
O
Not used (open)
32
XINT
I
Interrupt status input from the CXD2662R (IC151)
33
—
O
Not used (open)
34
XELT
I
Not used (open)
35
WR-PWR
O
Laser power select signal output to the CXD2662R (IC151) and HF module switch circuit
“L”: playback mode, “H”: recording mode
“L”: playback mode, “H”: recording mode
36
I2CCLK
I/O
Shift clock signal input/output terminal for the IIC bus
37
I2CDAT
I/O
Data input/output terminal for the IIC bus
38
SWDT
O
Writing data output to the CXD2662R (IC151)
39
VCC1
—
Power supply terminal (+3.3V)
40
SRDT
I
Reading data input from the CXD2662R (IC151)
41
VSS1
—
Ground terminal
42
SCLK
O
Serial clock signal output to the CXD2662R (IC151)
43
REC-SW
I
Detection input from the recording position of over write head (HR901) detect switch (S105)
“L” recording mode
“L” recording mode
44
CLIPDTO
O
Serial data output terminal
45
CLIPDTI
I
Serial data input terminal
46
CLIPCK
O
Serial clock signal output terminal Not used (open)
47
DIG-RST
O
Reset signal output to the CXD2662R (IC151) and BH6511FS (IC152) “L”: reset
48
SENS
I
Internal status (SENSE) input from the CXD2662R (IC151)
49
PLAY-SW
I
Detection input from the playback position of over write head (HR901) detect switch (S104)
“L” playback mode
“L” playback mode
50
XLAT
O
Serial data latch pulse signal output to the CXD2662R (IC151)
51
OUT-SW
I
Detection input from the loading-out detect switch (S103)
“L” at a load-out position, others: “H”
“L” at a load-out position, others: “H”
52
—
I
Not used (fixed at “H”)
53
—
O
Not used (open)
54
—
I
Not used (fixed at “H”)
55
—
O
Not used (open)
56
MNT2 (XBUSY)
I
Busy signal input from the CXD2662R (IC151)
57
VSS2
—
Ground terminal
58
MNT1 (SHOCK)
I
Track jump detection signal input from the CXD2662R (IC151)
59
VCC2
—
Power supply terminal (+3.3V)
60
EEP-WP
O
Writing protect signal output to the EEPROM (IC195)
61
SDA
I/O
Two-way data bus with the EEPROM (IC195)
62
BCLK/ALE/CLKO
O
Not used (open)
63
OE
O
Data reading strobe signal output to the flash memory (IC1002)
64
BHE/CASH
O
Not used (open)
65
WE
O
Writing enable signal output to the flash memory (IC1002) “L” active
66
SCL
O
Clock signal output to the EEPROM (IC195)
67
REFLECT
I
Detection input from the disc reflection rate detect switch (S102-1)
“L”: high reflection rate disc, “H”: low reflection rate disc
“L”: high reflection rate disc, “H”: low reflection rate disc
68
PROTECT
I
REC-proof claw detect input from the protect detect switch (S102-2) “H”: write protect
69
CS0
O
Chip select signal output to the flash memory (IC1002)
70
CS1
O
Chip select signal output terminal Not used (open)
71. 72
—
—
Not used (open)
73
A19
O
Address signal output to the flash memory (IC1002)
87
Pin No.
Pin Name
I/O
Description
74
VCC3
—
Power supply terminal (+3.3V)
75
A18
O
Address signal output to the flash memory (IC1002)
76
VSS3
—
Ground terminal
77 to 85
A17 to A9
O
Address signal output to the flash memory (IC1002)
86 to 89
SEL3 to SEL0
I
Model destination setting input terminal
90
WP
O
Writing protect signal output to the flash memory (IC1002)
91
VCC4
—
Power supply terminal (+3.3V)
92
A8
O
Address signal output to the flash memory (IC1002)
93
VSS4
—
Ground terminal
94 to 101
A7 to A0
O
Address signal output to the flash memory (IC1002)
102 to 113
D15 to D4
I/O
Two-way data bus with the flash memory (IC1002)
114
CLIP SEL
O
Not used (open)
115
I2CBUSY
I/O
Busy signal input/output for the IIC bus
116
DALOCK
I
Lock signal input from the D/A converter (IC1006)
117
LINE-MUTE
O
Audio line muting on/off control signal output
118
ADPDWN
O
Power down detection signal output to the A/D converter (IC1005)
119 to 122
D3 to D0
I/O
Two-way data bus with the flash memory (IC1002)
123
SPDIF-CUT
O
MD/CD digital input selection signal output terminal Not used (open)
124
OPTSEL
O
CD/optical digital input selection signal output to the digital signal selector (IC1008)
125 to 129
—
O
Not used (open)
130
VSS5
—
Ground terminal
131
—
O
Not used (open)
132
VCC5
—
Power supply terminal (+3.3V)
133
OP-LEVEL
I
Optical pick-up voltage input from the automatic power control circuit
134 to 139
—
O
Not used (open)
140
AVSS
—
Ground terminal (for analog system )
141
—
O
Not used (open)
142
VREF
I
Reference voltage (+3.3V) input terminal (for A/D converter)
143
AVCC
—
Power supply terminal (+3.3V) (for analog system )
144
—
O
Not used (open)
88
• MD DIGITAL BOARD IC1101 µPDSS3033AYGF-M05-3BA (CD MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DRVDAT
O
Serial data output to a FL driver Not used (open)
2
DRVCLK
O
Serial data transfer clock signal output to a FL driver Not used
3
I2CDAT
I
Data input/output terminal for the IIC bus
4
NC
O
Not used (open)
5
I2CCLK
I
Shift clock signal input/output terminal for the IIC bus
6
GND
—
Ground terminal
7
DATA
O
Serial data output to the CD block
8
CLK
O
Serial data transfer clock signal output to the CD block
9
EVDD
—
Power supply terminal (+5V)
10
EVSS
—
Ground terminal
11
XLT
O
Serial data latch pulse output to the CD block
12
SENSE
I
Internal status detection monitor input from the CD block
13
LDON
O
Laser diode on/off control signal output to the CD block
14
LPH
O
Laser power control signal output terminal Not used (open)
15
SUBQ
I
Subcode Q data input from the CD block
16
NC
O
Not used (open)
17
SQCLK
O
Subcode Q data reading clock signal output to the CD block
18
CTRL1
O
Disc speed selection (normal/double speed) signal output to the CD block
19
X4
O
Disc speed selection (normal/quadruple speed) signal output to the CD block
20
8CM
O
CD disc size select (8cm/12cm) signal output terminal Not used (open)
21
GND/VPP
—
Ground terminal
22
SPINDLEMUTE
O
Spindle motor muting control signal output to the CD block “H”: muting on
23 to 28
NC
O
Not used (open)
29
AMUTE
O
Audio muting on/off control signal output terminal “L”: muting on Not used (open)
30
DACMUTE
O
Muting on/off control signal output to the D/A converter (IC1006) “L”: muting on
31
BDPWR
O
Power supply for the CD block on/off control signal output “H”: power on
32
BDRST
O
Reset signal output to the CD block
33
FUNC ST
O
Function select signal output terminal Not used (open)
34
RESET
I
Reset signal input from the system controller (IC501)
35
XT1
I
Sub system clock input terminal Not used (fixed at “L”)
36
XT2
O
Sub system clock output terminal Not used (open)
37
CHEMICON
I
Connected to the external capacitor
38
X2
O
Main system clock output terminal (16MHz)
39
X1
I
Main system clock input terminal (16MHz)
40
VSS
—
Ground terminal
41
VDD
—
Power supply terminal (+5V)
42
NC
—
Not used (open)
43 to 45
ENCODE0 to
ENCODE2
I
Jog dial pulse input terminal Not used (fixed at “H”)
46
NC
O
Not used (open)
47
TRAYSENCE3
I
Detection input from the disc tray address detect rotary encoder Not used (fixed at “H”)
48
CNT-SW
I
Detection input from the count detect switch Not used (fixed at “H”)
49
PRTC-SW
I
Detection input from the protect switch Not used (fixed at “H”)
50, 51
TRAYSENS1,
TRAYSENS2
I
Detection input from the disc tray address detect rotary encoder Not used (fixed at “H”)
52
OUT-SW
I
Detection input from the tray open/close detect switch (S1) “L”: when tray is open
89
Pin No.
Pin Name
I/O
Description
53
IN-SW
I
Detection input from the tray open/close detect switch (S1) “L”: when tray is close
54
LOD POS
O
CD loading motor (M201) control signal output to the motor driver IC (IC1102)
“L” active *1
“L” active *1
55
LOD NEG
O
CD loading motor (M201) control signal output to the motor driver IC (IC1102)
“L” active *1
“L” active *1
56
CLP POS
O
Motor control signal output to the motor driver IC “L” active Not used (open)
57
CLP NEG
O
Motor control signal output to the motor driver IC “L” active Not used (open)
58
BVDD
—
Power supply terminal (+5V) (for digital system)
59
BVSS
—
Ground terminal (for digital system)
60 to 72
NC
O
Not used (open)
73
FUN
O
Fun motor on/off control signal output terminal “H”: fun motor on Not used (open)
74
AVDD
—
Power supply terminal (+5V)
75
AVSS
—
Ground terminal
76
AVREF
I
Reference voltage (+5V) input terminal
77 to 80
KEY0 to KEY3
I
Key input terminal (A/D input) Not used (fixed at “H”)
81 to 83
SEL0 to SEL2
I
Model destination setting terminal (A/D input)
84
TEL
I
Tracking error level detection input terminal Not used (open)
85
SEL3
I
Model (CD mechanism deck) destination setting terminal (A/D input)
86
DISC-SENS
I
Detection input from the disc in detect sensor (A/D input) “H”: disc in Not used (open)
87
MECHA-JIGU
I
Not used (open)
88
ADJ
I
Setting terminal for the CD test mode “L”: CD test mode Normally: fixed at “H”
89
I2CHELP
I
Busy signal input for the IIC bus
90
I2CHELP
I
Busy signal input for the IIC bus
91
SCOR
I
Subcode sync (S0+S1) detection signal input from the CD block
92
NC
O
Not used (open)
93
AC-CUT
I
Power off signal input from the system controller (IC501)
94, 95
JOG0, JOG1
I
Rotary encoder jog dial pulse input terminal Not used (fixed at “L”)
96
NC
O
Not used (open)
97
LEDLAT
O
Serial data latch pulse output to a FL driver Not used
98
DRVCS
I
Chip select signal output to a FL driver Not used
99
DRVRST
I
Reset signal output to a FL driver “L”: reset Not used
100
GND
—
Ground terminal
*1 Loading motor (M201) control
Mode
Terminal
LOD NEG (pin tg)
“L”
“H”
“L”
“H”
LOD POS (pin tf)
“H”
“L”
“L”
“H”
LOADING
EJECT
BRAKE
RUN IDLE
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