Sony HCD-M100 / HCD-M300AV Service Manual ▷ View online
49
Pin No.
Pin Name
I/O
Function
Sled servo off control input
CLV error signal is input from the digital signal processor
CLV error signal is input from the digital signal processor
RF output
Works together with the RFSM pin to set the RF gain and the 3T compensation constant for
the EFM signal
SLI (Slice Level Control) is output to control a data slice level of the RF waveform by the
digital signal processor
Input pin for controlling a data slice level by the digital signal processor
Digital Ground
Focus search smoothing capacitor output
TBC (Tracking Balance Control) sets a EF balance variable range
Not used
Defect detection output for a disc
Reference clock input
The 4.23 MHz of the digital signal processor is input
Microprocessor command clock input
Microprocessor command data input
Microprocessor command chip enable input
DRF (Defect RF) outputs a RF level detection
FSS (Focus Search Select) is a switching pin for the focus search mode
(±search/+search for a reference voltage)
Servo system and digital system VCC
Reference voltage bus control is connected
Reference voltage output
Constant setting for a disc defect detection
Connected to the capacitor for the RF signal peak hold
Connected to the capacitor for the RF signal bottom hold
APC circuit output
APC circuit input
RF system VCC
I
I
I
O
I
O
I
—
O
I
—
O
I
I
I
I
O
I
—
I
O
I
I
I
O
I
—
• Abbreviation
EFM : Eight to Fourteen Modulation
APC : Auto Power Control
APC : Auto Power Control
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
SLOF
CV–
CV+
RFSM
RFS–
SLC
SLI
DGND
FSC
TBC
NC
DEF
CLK
CL
DAT
CE
DRF
FSS
VCC2
RFFI
VR
LF2
PH1
BH1
LDD
LDS
VCC1
50
BD BOARD IC102 LC78622E (DIGITAL SIGNAL PROCESSOR)
Pin No.
Pin Name
I/O
Function
• Abbreviation
PLL : Phase Locked Loop
EFM : Eight to Fourteen Modulation
EFM : Eight to Fourteen Modulation
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
DEFI
TAI
PDO
VVSS
ISET
VVDD
FR
VSS
EFMO
EFMIN
TEST2
CLV+
CLV–
V/P
HFL
TES
TOFF
TGL
JP+
JP–
PCK
FSEQ
VDD
CONT1
CONT2
CONT3
CONT4
CONT5
I
I
O
—
I
—
I
—
O
I
I
O
O
O
I
I
O
O
O
O
O
O
—
I/O
I/O
I/O
I/O
I/O
Defect detection signal (DEF) input
(Be sure to connect to 0 when not in use)
PLL test input to incorporates a pull-down resistor
(Be sure to connect to 0V)
PLL phase comparison output for external VCO control
PLL ground for the built-in VCO
(Be sure to connect to 0 when not in use)
Connected to a current adjusting resistor for the PDO output
Built-in VCO power supply
Adjusts the VCO frequency range
Digital Ground to be sure to connect to 0
Slice level control to EFM signal output
Slice level control to EFM signal input
Test input to incorporates a pull-down resistor
(Be sure to connect to 0V)
Disc motor control output
(3-value output available depending on the command)
Rough servo/phase control automatic switching monitor output
“H”:rough servo, “L”:phase servo
Tracking detection signal input
(Schmidt input)
Tracking error signal input
(Schmidt input)
Tracking OFF output
Tracking gain switching output
(Raises gain when “L”)
Track jump control output
(3-value output available depending on the command)
EFM data playback clock monitor
(4.3218 MHz when phase is locked)
Sync signal detection output
(“H” when a sync signal detected from the EFM signal and that
generated internally coincide)
Digital power supply
General purpose output 1.
Performs control using a serial data command from the
microprocessor
(When not in use, connect to 0V by setting to an input or set to an open state
by setting to an output)
General purpose output 2.
Performs control using a serial data command from the
microprocessor
(When not in use, connect to 0V by setting to an input or set to an open state
by setting to an output)
General purpose output 3.
Performs control using a serial data command from the
microprocessor
(When not in use, connect to 0V by setting to an input or set to an open state
by setting to an output)
General purpose output 4.
Performs control using a serial data command from the
microprocessor
(When not in use, connect to 0V by setting to an input or set to an open state
by setting to an output)
General purpose output 5.
Performs control using a serial data command from the
microprocessor
(When not in use, connect to 0V by setting to an input or set to an open state
by setting to an output)
51
Pin No.
Pin Name
I/O
Function
Note) Supply the same potential to each power supply pin (VDD, VVDD, LVDD, RVDD, XVDD).
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
O
O
O
I
I
—
O
—
O
—
—
O
—
O
—
O
I
—
O
O
O
O
I
O
O
I
O
I
I
I
O
O
O
I
I
I
Deemphasis monitor
The deemphasis disc is being played back when “H”
C2 flag output
Digital OUT output (EIAJ format)
Test input
Incorporates a pull-down resistor
Be sure to connect to 0V
Test input
Incorporates a pull-down resistor
Be sure to connect to 0V
Not used
Be sure to use it in an open state
L channel 1-bit DAC
L channel mute output
L channel 1-bit DAC
L channel power supply
L channel 1-bit DAC
L channel output
L channel 1-bit DAC
L channel ground
Be sure to connect to 0V
R channel 1-bit DAC
R channel ground
Be sure to connect to 0V
R channel 1-bit DAC
R channel output
R channel 1-bit DAC
R channel power supply
R channel 1-bit DAC
R channel mute output
Power supply for the crystal oscillator
Connected to the 16.9344 MHz crystal oscillator
Ground for the crystal oscillator
Be sure to connect to 0V
Sync signal output for the subcode block
C1, C2, single correction, and double correction monitor
Subcode P, Q, R, S, T, U, W output
Subcode frame sync signal output
Rises when the subcode is in a standby
Subcode read clock input
Schmidt input (Connect to 0V when not in use)
7.35 kHz sync signal output divided from the crystal oscillation
Subcode Q output standby output
Read/write control input
Schmidt input
Subcode Q output
Command input from the microprocessor
Command input fetching clock input or subcode extracting clock input from SQOUT Schmidt
input
LC78622 reset input
Temporarily set to “L” when the power is turned ON
Test output
Use it in an open state (Normally, “L” output)
16.9344 MHz output
4.2336 MHz output
Test input. Incorporates a pull-down resistor. Be sure to connect to 0V
Chip select input
Incorporates a pull-down resistor
Be sure to connect to 0V when not in control
Test input
Does not incorporates a pull-down resistor
Be sure to connect to 0V
EMPH
C2F
DOUT
TEST3
TEST4
NC
MUTEL
LVDD
LCHO
LVSS
RVSS
RCHO
RVDD
MUTER
XVDD
XOUT
XIN
XVSS
SBSY
EFLG
PW
SFSY
SBCK
FSX
WRQ
RWC
SQOUT
COIN
CQCK
RES
TEST11
16M
4.2M
TEST5
CS
TEST1
52
Pin No.
1
2
3
4
5
6 to 13
14 to 28
29
30
31
32
33
34, 35
36
37
38 to 41
42
43 to 46
47
48
49
50
51 to 53
54
55
56
57
58
59
60
61 to 63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Pin Name
—
ICSW
—
HHOUT
—
D0 to D7
A0 to A14
/WE
RESET
10MHz
10MHz
VSS
—
AVSS
AVREF
—
D-SENS
—
SLED-P
CLK
SUBQ
DATA
—
FOK
WRQ
—
TGL
RWC
SLED-M
—
TSENS1 to TSENS3
DQSY
TCLK
TDATA
TMODE
—
DOORSW
OUTSW
INSW
VDD
—
TBLR
TBLL
LODOUT
LODIN
IICCLK
—
IICDAT
I/O
—
O
—
O
—
I/O
O
O
I
O
I
—
—
—
I
—
I
—
O
O
I
O
—
I
I
—
I
O
O
—
I
I
O
I
O
—
I
I
I
—
—
O
O
O
O
I
—
I/O
Function
Not used
IC reset signal output
Not used
Plus one LED signal output
Not used
SRAM data I/O
SRAM address output
SRAM write enable output
Reset signal input
X’tal(10MHz)
X’tal(10MHz)
Ground
Not used
Analog ground
Analog refernce voltage input
Not used
Disc detect sensor signal input
Not used
Sled motor control signal output
Clock signal output for LC78622E
CD sub-code input from LC78622E
Command output for LC78622E
Not used
DRF(FOK) signal input from LC78622E
Sub-code synchronizing signal input from LC78622E
Not used
Tracking gain control signal input from LC78622E
RWC(latch) output for LC78622E
Sled motor control output
Not used
Table sensor input
Data synchronizing signal input from decoder
Clock output for decoder
Data input from decoder
System down signal output for decoder
Not used
Front cover close detect input
Loading motor out detect input
Loading motor in detect input
Power supply(+5V)
Not used
Table motor clock wise turn signal output
Table motor counter clock wise turn signal output
Loading motor out direction signal output
Loading motor in direction signal output
Serial data clock input
Not used
Serial data I/O
MAIN BOARD IC401 CXP84632-158Q (CD CHANGER CONTROL)
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