Sony HCD-LV80 / LBT-LV80 Service Manual ▷ View online
61
Pin Name
I/O
Function
Pin No.
46
MA8
O
Address data from CL680 to Microcode ROM/DRAM
47
VSS
–
Ground
48
MA7
O
Address data from CL680 to Microcode ROM/DRAM
49
VDD3
–
+3.3V Power supply
50
MA6
O
Address data from CL680 to Microcode ROM/DRAM
51
MA5
O
Address data from CL680 to Microcode ROM/DRAM
52
MA4
O
Address data from CL680 to Microcode ROM/DRAM
53
VSS
–
Ground
54
MA3
O
Address data from CL680 to Microcode ROM/DRAM
55
VDD3
–
+3.3V Power supply
56
MA2
O
Address data from CL680 to Microcode ROM/DRAM
57
MA1
O
Address data from CL680 to Microcode ROM/DRAM
58
MA0
O
Address data from CL680 to Microcode ROM/DRAM
59
PGIO7
I/O
Not used
60
RESET
I
Reset signal input from the host MPU
61
VDDMAX-IN
I
Fix the maxium input voltage each input pin and I/O pin
62
NC
–
Not used
63
NC
–
Not used
64
NC
–
Not used
65
AGND DAC
–
Ground
66
AVDD DAC
–
+3.3V Power supply
67
COMPOS OUT
O
Not used
68
AGND DAC
–
Ground
69
Y-OUT
O
Luminance signal out
70
AVDD DAC
–
+3.3V Power supply
71
AGND DAC
–
Ground
72
RREF
I
Fix the video signal output level
73
(1.235V) VREF
O
Reference voltage (+1.235V)
74
AVDD DAC
–
+3.3V Power supply
75
C-OUT
O
Chrominance signal out
76
AGND DAC
–
Ground
77
(GCK INT) CLK SEL
I
GCK selection “H”; Internal, “L”; External
78
CLK SEL
I
DA-XCK selection (1)
79
CLK SEL
I
DA-XCK selection (2)
80
VSS
–
Ground
81
RESERVED
I
Selection the operation clock 42.336MHz
82
VDD3
–
+3.3V Power supply
83
DA-EMP
–
Not used
84
RESERVED
–
Not used
85
AGND PLL
–
Ground
86
DA-XCLK
I
Main reference clock input (16.9344MHz=384fs)
87
AVDD PLL
–
+3.3V
88
PGIO4
I/O
Not used
89
PGIO5
I/O
Not used
90
PGIO6
I/O
Not used
62
Pin Name
I/O
Function
Pin No.
91
PGIO0
I/O
Not used
92
PGIO8
I/O
Not used
93
PGIO2/VSYNC/CSYNC
O
Vertical synchronized signal of video signal
94
AVDD PLL
–
+3.3V Power supply
95
NC
–
Not used
96
NC
–
Not used
97
NC
–
Not used
98
AGND PLL
–
Ground
99
VSS
–
Ground
100
NC
–
Not used
101
PGIO3/HSYNC
I/O
Not used
102
VDD3
–
+3.3V Power supply
103
PGIO1/VCK-OUT
I/O
Not used
104
VSS
–
Ground
105
GCK
I
Not used
106
VCK-IN
I
Main clock for video signal processer
107
GCKOUT/DA-EMP
O
Not used
108
DA-LRCK
O
Digital Audio Left or Right channel selection clock
109
VDDMAX-OUT
O
Fix the maxium output voltage certain output pins (Connected to +5V)
110
DA-DATA
O
Digital Audio data
111
DA-BCK
O
Digital Audio bit clock
112
HD-OUT
O
Serial Data output from CL680 to the host MPU
113
HRDY
O
Ready signal CL680 is ready for communication to the host MPU
114
HINT
O
Request signal for interrupting the host MPU
115
CDG-SCK
I/O
Not used
116
VSS
–
Ground
117
HCK
I
Host clock : referance signal for the host bus interface
118
VDD3
–
+3.3V Power supply
119
HD-IN
I
Serial Data output ftom the host MPU to CL680
120
VDD3
–
+3.3V Power supply
121
HSEL
I
Select data or address of the host MPU
122
CDG-SDATA
I
Ground (Not used)
123
CDG-VFSY
I
Ground (Not used)
124
CDG-SOS1
I
Ground (Not used)
125
NC
–
Not used
126
NC
–
Not used
127
NC
–
Not used
128
NC
–
Not used
63
• IC501 MAIN CONTROL (M30622MA-A26FP) (MAIN BOARD (2/3))
Pin No.
Pin Name
I/O
Function
1
POWER
O
Power amp ON/OFF signal output
2
POWER
O
Power ON/OFF signal output
3
F-RELAY
O
Front speaker relay control output
4
REAR-RELAY
O
Rear speaker relay control output (Not used)
5
CD-POWER
O
CD power on signal output
6
LINE-MUTE
O
Line mute signal output
7
DBFB-H/L
O
DBFB H/L select signal output
8
–
–
Connected to ground
9
–
–
Connected to ground
10
XC-IN
I
11
XC-OUT
O
12
RESET
I
System reset signal input
13
X-OUT
O
X’tal (16MHz) (MAIN SYSTEM CLOCK)
14
VSS
–
Ground
15
X-IN
I
X’tal (16MHz) (MAIN SYSTEM CLOCK)
16
VDD
–
Power supply (+5V)
17
NMI
I
Not used
18
WAKE UP
I
WAKE UP signal input
19
SCOR
I
CD Q-data request signal input
20
RDS-INT
I
RDS data interrupt input
21
RDS-DATA
I
RDS data interrupt input
22
AC-CUT
I
AC cut ON (L)/OFF (H) check
23
PL-CLK
O
Clock output to pro-logic (Not used)
24
PL-DATA
O
Data output to pro-logic (Not used)
25
PL-LAT
O
Latch signal output to pro-logic (Not used)
26
TIMER LED
O
Not used
27
PROTECT
I
Speaker protect signal input
28
V MUTE
O
Video mute signal output
29
IIC-CLK
O
I
2
C SCL
30
IIC-DATA
O
I
2
C SDA
31
–
–
Not used
32
SQ-DATA
I
Subcode Q data clock input (CD data)
33
SQ-CLK
I
Subcode Q data clock input (CD data clock)
34
SW-MODE
O
SW-MODE music/movie select signal output
35
CD-DATA
O
CD data output
36
H/P IN
I
Head phone detect
37
CD-CLK
O
CD clock output
38
493-LAT
O
Latch signal output for IC101 (M62493FP)
39
CLOCK-OUT
O
Clock out signal check
40
NO-USE
–
Not used
41
NO-USE
–
Not used
42
FL OFF
O
Fluorescent indicator tube filament on/off signal output
43
STBY RELAY
O
Main POWER on/off signal output
44
BASS FREQ
O
FREQ high/low signal output (Not used)
45
FUNC SEL 1
O
Function select signal output
46
FUNC SEL 0
O
Function select signal output
47
493-DATA
O
Data signal output for IC101 (M62493FP)
48
493-CLK
O
Clock signal output for IC101 (M62493FP)
49
ST-MUTE
O
Tuner mute signal output
X’tal (32.768 KHz) (SUB CLOCK)
64
Pin No.
Pin Name
I/O
Function
50
STEREO
I
Stereo detection for tuner
51
TUNED
I
Tuned detection for tuner
52
ST-CE
O
Tuner chip enable output
53
ST-DOUT
O
Tuner data output
54
ST-DIN
I
Tuner data input
55
ST-CLK
O
Tuner clock output
56
SENS
I
BD Condition signal input
57
HOLD
O
MODE signal output
58
XLT
O
CD latch signal output
59
XRST
O
CD reset signal output
60
DISC-SENS
I
Slit sensor of disc table input (Connected to ground)
61
T-SENS
I
CD table detection signal input
62
VDD
–
Power supply (+5V)
63
TBL-L
O
Table motor control output
64
VSS
I
Ground
65
TBL-R
O
Table motor control output
66
LOAD-OUT
O
Loading motor control signal output (Not used)
67
LOAD-IN
O
(not used)
68
ENC 3/UP-SW
I
Disc tray address detect encoder input
69
ENC 2/DISC-LED
O
Disc tray address LED drive signal output
70
ENC 1
I
(Connected to ground)
71
OUT-OPEN
O
(Connected to ground) Loading out detection signal output
72
B-TRG
O
B deck trigger motor control output
73
A-TRG
O
A deck trigger motor control output
74
CAP-M-COT2
O
Capstan motor REW/FWD/STOP signal output
75
CAP-M-COT1
O
Capstan motor REW/FWD/STOP signal output
76
CAP-M-H/L
O
Capstan motor High/Low speed select signal output
77
AMS-IN
I
AMS signal input
78
TC-MUTE
O
TC line mute ON/OFF selection output
79
R/PB/PAS
O
REC/PB/PASS selection output
80
NR-ON/OFF
O
DOLBY NR ON/OFF signal output
81
REC-MUTE
O
REC mute ON/OFF selection output
82
BIAS
O
Bias ON/OFF signal output
83
EQ-H/N
O
Equalizer High/Normal select output
84
PB-A/B
O
PB A deck/B deck select output
85
ALC
O
ALC ON/OFF output signal
86
B-PLAY-SW
I
B deck play detect
87
A-PLAY-SW
I
A deck play detect
88
A-HALF
I
A Deck half detector signal input
89
B-HALF
I
B Deck half detector signal input
90
B-SHUT
I
B Deck reel pulse detector
91
A-SHUT
I
A Deck reel pulse detector
92
SOFT-TEST
O
Software test port (Not used)
93
HP-MUTE
O
Head phone mute signal output
94
KEY/CD-ADJ
I
KEY (use the jig)/CD adjust point port
95
MODEL IN
I
MODEL input
96
AVSS
–
Analog ground
97
SPEC-IN
I
Specifications input
98
VREF
I
Analog reference voltage input
99
AVCC
–
Analog power supply (+5V)
100
TC-RELAY
O
REC/PB head selection output for IC602
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