Sony HCD-GZR5D / MHC-GZR5D Service Manual ▷ View online
HCD-GZR5D
73
Pin No.
Pin Name
I/O
Description
57
I-AUDIO-LEVEL
I
Audio signal level detection signal input Not used.
58
I-TP-STATE
I
Tape status signal input
59 to 63
NC
–
Not used. (Connect to ground.)
64
I-3.3V-MONI
I
MTK power voltage detection signal input
65
I-KEY3
I
Key signal input 3 (A/D input)
66
I-KEY2
I
Key signal input 2 (A/D input)
67
I-KEY1
I
Key signal input 1 (A/D input)
68
O-LED-STBY
O
Standby LED drive signal outpt Not used.
69
O-LCD-INH
O
Inhibit signal output to LED driver
70
O-LCD-CLK
O
Serial clock signal output to LCD driver
71
O-LCD-CE
O
Chip enable signal output to LCD driver
72
O-LCD-DATA
O
Serial data signal output to LCD driver
73
I-VOL-A
I
Jog dial A-pulse input from the VOLUME rotary encoder
74
I-VOL-B
I
Jog dial B-pulse input from the VOLUME rotary encoder
75
O-LCD-MODE
O
Mode signal output to LCD driver
76
I-MIC-DETECT
I
Microphone connection detection signal input
77
I-HP-DETECT
I
Headphone connection detection signal input
78
O-POWER
O
Main power control signal output
79
O-MTK-POWER
O
MTK power control signal output
80
O-LCD-BKL
O
LCD backlight LED control signal output
81
I-REM
I
Remote control receiver sircs signal input
82
O-TC-M
O
TC motor control signal outpt Not used.
83
I-KEY-WAKE-UP
I
Standby-key interrupt signal input
84
O-VIDEO-MUTE
O
Video output muting signal output
85
O-USB-REC.M
O
USB analog recoading muting control signal output
86, 87
NC
–
Not used. (Connect to ground.)
88
NC
–
Not used. (Open)
89
SI/SO
I/O
Serial data signal input/output
90
RESET
I
System reset signal input
91
XT2
I
Sub system clock input (32.768 kHz)
92
XT1
O
Sub system clock output (32.768 kHz)
93
FLMD0
I
FL mode setting input
94
X2
I
Main system clock input (20 MHz)
95
X1
O
Main system clock output (20 MHz)
96
REGC
–
Regulator ripple capacitor connecting
97
VSS
–
Ground pin
98
EVSS
–
Ground pin
99
VDD
–
Power supply pin (+3.3 V)
100
EVDD0
–
Power supply pin (+3.3 V)
HCD-GZR5D
74
DMB18 BOARD IC102 CXD9915R
(CD/DVD RF AMP, FOCUS/TRACKING ERROR AMP, DVD SYSTEM PROCESSOR, DIGITAL SERVO PROCESSOR)
(CD/DVD RF AMP, FOCUS/TRACKING ERROR AMP, DVD SYSTEM PROCESSOR, DIGITAL SERVO PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
OSN
—
RF offset cancellation capacitor connecting terminal
2
RFGC
O
RF AGC loop capacitor connecting terminal
3
IREF
I
Current reference setting terminal
4
AVDD3
—
Power supply (VDD3.3 V)
5
AGND
—
Ground
6
DVDA
I
AC coupled input path A
7
DVDB
I
AC coupled input path B
8
DVDC
I
AC coupled input path C
9
DVDD
I
AC coupled input path D
10
DVDRFIP
I
DC coupled DVD RF signal input RFIP
11
MA
I
DC coupled main-beam RF signal input A
12
MB
I
DC coupled main-beam RF signal input B
13
MC
I
DC coupled main-beam RF signal input C
14
MD
I
DC coupled main-beam RF signal input D
15
SA
I
Not used (Open) DC coupled sub-beam RF signal input A
16
SB
I
Not used (Open) DC coupled sub-beam RF signal input B
17
TNI
I
3 beam satellte PD signal negative input
18
TPI
I
3 beam satellte PD signal positive input
19
MDI1
I
Laser power monitor input
20
MDI2
I
Laser power monitor input
21
LDO2
O
Laser diode (DVD) drive signal output
22
LDO1
O
Laser diode (CD) drive signal output
23
SVDD3
—
Power supply (RF+3.3 V)
24
CSO
O
Not used (Open) Central servo signal output
25
RFLVL
O
RFRP low pass output
26
SGND
—
Ground
27
V2REFO
O
Reference voltage (2.8 V) output
28
V20
O
Reference voltage (2.0 V) output
29
VREFO
O
Reference voltage (1.4 V) output
30
FEO
O
Focus error monitor output
31
TEO
O
Tracking error monitor output
32
TEZISLV
O
TE Slicing Level input
33
OP_OUT
O
Op amp output
34
OP_INN
I
Op amp negative input
35
OP_INP
I
Spindle feedback signal input
36
DMO
O
Disc motor control PWM output
37
FMO
O
Feed motor control PWM output
38
TROPENPWM
O
Tray PWM output/Tray open output
39
IOPMON
I
Iop Monitor input
40
TRO
O
Tracking servo control signal output
41
FOO
O
Focus servo control signal output
42
AGND18
—
Ground
43
AVDD18
—
Power supply (+1.8 V)
44
USB_DP
I/O
USB port serial data input/output
45
USBDM
I/O
USB port serial data input/output
46
USB_VDD3
—
USB power supply (+3.3 V)
47
USB_VSS
—
USB ground
48
PAD_VRT
I/O
USB generating reference current signal input/output
49
USB_VDD18
—
Power supply (+1.8 V)
50
USB_VSS
I
Ground
51
DIR_ERROR
I
DIR PLL error signal input “H”: error
52
DIR_AUDIO
I
DIR audio signal input “H”: Non PCM, “L”: PCM
53
LIMITSW
I
LIMIT SW signal input
54
MSW
O
DVD/CD PD –VR select signal output
HCD-GZR5D
75
Pin No.
Pin Name
I/O
Description
55
DVDD18
—
Power supply (+1.8 V)
56 to 62
HA2 to HA8
O
Flash ROM address bus A2 to A8 output
63, 64
HA18, HA19
O
Flash ROM address bus A18, A19 output
65
DVDD3
—
Power supply (+3.3 V)
66
XWR
O
Flash ROM write signal output
67 to 74
HA16 to HA9
O
Flash ROM address bus A16 to A9 output
75
HA20
O
Flash ROM address bus A20 output
76
XROMCS
O
Flash ROM chip select signal output
77
HA1
O
Flash ROM address bus A1 output
78
XRD
O
Flash ROM read signal output
79, 80
HD0, HD1
O
Flash ROM data bus D0, D1 output
81
DVSS
—
Ground
82 to 86
HD2 to HD6
O
Flash ROM data bus D2 to D6 output
87
HA21
O
Flash ROM data bus D21 output
88
RESERVED
—
Not used (Open)
89
HD7
O
Flash ROM data bus D7 output
90
DVSS
—
Ground
91, 92
HA17, HA0
O
Flash ROM address bus A17, A0 output
93
DVDD18
–
Power supply (+1.8 V)
94
FWR
O
Loading motor control (FWR) signal output
95
REV
O
Loading motor control (REV) signal output
96
DVDD3
—
Power supply (+3.3 V)
97
IFSDO
O
CPU I/F serial data output
98
IFCK
O
CPU I/F serial clock output
99
xIFCS
O
CPU I/F chip select output
100
IFSDI
I
CPU I/F serial data input
101
SCL
O
EEPROM serial clock output
102
SDA
O
EEPROM serial data output
103
CKSW
I
Chuck/Tray detect switch signal input
104
OCSW
I
Chuck/Tray detect switch signal input
105
RXD
I
RXD signal input from Jig
106
TXD
O
TXD signal output to Jig
107
ICE
I
Not used (Open) ICE mode enable signal input
108
xSYSRST
I
System reset signal input
109
RESERVED
I
Not used (Open)
110
xIFBSY
I
Busy signal input from CPU I/F “H”: Busy
111
DQM0
O
SDRAM lower byte mask signal output
112
EEWP
I
EEPROM ready/Busy wake up signal input
113 to 117
RD7 to 3
O
SDROM data bus D7 to D3 output
118
DVDD3
—
Power supply (+3.3 V)
119 to 121
RD2 to RD0
O
SDROM data bus D2 to D0 output
122 to 129
RD15 to RD8
O
SDROM data bus D15 to D8 output
130
TSD_M
I
TSD signal input
131
DVDD3
—
Power supply (+3.3 V)
132
DQM1
O
SDRAM lower byte mask signal output
133
_RWE
O
SDRAM write enable signal output
134
_CAS
O
SDRAM column address strobe signal output
135
_RAS
O
SDRAM row address strobe signal output
136
_RCS
O
SDRAM chip select signal output
137, 138
BA0, BA1
O
SDRAM bank address 0, 1 output
139
RA10
O
SDRAM address bus A10 output
140, 141
RA0, RA1
O
SDRAM address bus A0, A1 output
142
DVDD18
—
Power supply (+1.8 V)
143, 144
RA2, RA3
O
SDRAM address bus A0, A3 output
145
DVDD3
—
Power supply (+3.3 V)
146
DRCLK
O
SDRAM clock output
HCD-GZR5D
76
Pin No.
Pin Name
I/O
Description
147
CKE
O
SDRAM clock enable signal output
148
DVSS
—
Ground
149
RA11
O
SDRAM address bus A11 output
150 to 155
RA9 to RA4
O
SDRAM address bus A9 to A4 output
156
DVDD3
—
Power supply (+3.3 V)
157
MUTE123
O
Mute signal output for Focus/Tracking/Sledding
158
MUTE
O
Mute signal output for Spindle motor
159
DDC_DA
I/O
HDMI DDC line data input/output
160
DVDD18
—
Power supply (+1.8 V)
161
DDC_CLK
O
HDMI DDC line clock output
162
HTPLG
I
HDMI HPD signal input
163
AGND3
—
Ground
164
EXT_RES
I
Ext. resistor connected terminal
165, 166
AVDD3
—
Power supply (+3.3 V)
167
EXT_CAP
I
Ext. capacitor connected terminal
168, 169
AGND3, AGND18
—
Ground
170
TXCN
O
HDMI TXD-clock output Not used. (Open)
171
TXCP
O
HDMI TXD-clock output Not used. (Open)
172
AVDD18
—
Power supply (+1.8 V)
173
TX0N
O
HDMI TXD-0 output Not used. (Open)
174
TX0P
O
HDMI TXD-0 output Not used. (Open)
175
AGND18
—
Power supply (+1.8 V)
176
TX1N
O
HDMI TXD-1 output Not used. (Open)
177
TX1P
O
HDMI TXD-1 output Not used. (Open)
178
AVDD18
—
Power supply (+1.8 V)
179
TX2N
O
HDMI TXD-2 output Not used. (Open)
180
TX2P
O
HDMI TXD-2 output Not used. (Open)
181
AGND18
—
Power supply (+1.8 V)
182
R/Cr/Pr
O
Video chroma R/Cr/Pr signal output Not used. (Open)
183
B/Cb/Pb
O
Video chroma B/Cb/Pb signal output Not used. (Open)
184
DACVSSA
—
Ground
185
Y/G
O
Video Y/chroma G signal output Not used. (Open)
186
DACVDDA
—
Power supply (+3.3 V)
187
CVBS
O
Video Composite signal output
188
DACVSSB
—
Ground
189
C
O
Video chroma signal output Not used. (Open)
190
DACVDDB
—
Power supply (+3.3 V)
191
Y
O
Video Y signal output Not used. (Open)
192
DACVSSC
—
Ground
193
FS
I
Full Scale Adjustment setting terminal
194
VREF
I
Reference Voltage input terminal
195
DACVDDC
—
Power supply (+3.3 V)
196
VBUS_OE
O
VBUS power control signal output
197
VBUS_OC
I
VBUS detect signal input
198
SCORE
I
SCORE signal input
199
DAC SDA
I
DIR MCK clock input
200
DAC SCL
I
DIR BCK clock input
201
SPLRCK
I
DIR LRCK clock input
202
SPDATA
I
Audio digital data input
203
ACLK
O
A/D converter and DAMP clock output
204
ABCK
O
A/D converter and DAMP BCK clock output
205
ALRCK
O
A/D converter and DAMP LRCK clock output
206
ADIN
I
A/D converter data input
207
DVDD3
—
Power supply (+3.3 V)
208
MIC
I
MIC detect status input
209
WIDE
O
WIDE select signal output
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