Sony HCD-GV6 / HCD-GV8 / LBT-GV6 / LBT-GV8 Service Manual ▷ View online
53
HCD-GV6/GV8
IC509
PCM1727E-2/T2
– CD MOTOR Board –
IC201
TA8409S
1
2
3
4
5
6
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
POWER
SUPPLY
CLOCK MANAGER
•
DUAL PLL
AUDIO
DATA INPUT
INTERFACE
8 TIME OVER
SAMPLING DIGITAL
FILTER
•
FUNCTION
CONTROL
MODE
CONTROL
MULTI LEVEL
∆Σ
MODULATOR
MULTI LEVEL
∆Σ
MODULATOR
5 LEVEL
DAC
5 LEVEL
DAC
CR LPF
•
OUTPUT
AMP
CR LPF
•
OUTPUT
AMP
BPZ
CONTROL
13
OPEN
XT1
PGND
VCP
MCKO
RSV
SCKO3
ML
MC
MD
RSTB
VOUTR
AGND
VCA
ZERO
BCK
DATA
LRCK
SCKO2
SCKO1
VDD
DGND
XT2
384fs
15
14 VOUTL
CAP
1
2
3
4
5
6
7
8
9
HEAT
CUT OFF
BLOCK
STANDBY
BLOCK
VREF
BLOCK
IN2
VCC
OUT2
NC
GND
VS
OUT1
VREF
IN1
54
HCD-GV6/GV8
– AUDIO Board –
IC602
µ
PC1330HA
1
2
3
4
5
6
7
8
9
INVERTER
COMPARATER
SW R1
GND
SW P1 CONT
GND
VCC
SW P2 GND
SW R2
– MAIN Board –
IC101
M62493FP
65
64
63
62
61
60
59 58 57 56
49
66
67
68
69
73
72
+
–
+
–
+
–
+
–
–
+
–
–
+
–
5BAND GRAPHIC EQUALIZER
50
43
55
48
54
47
53
46
52
45
51
44
41
40
39
38
37
36
35
42
+
–
–
+
–
–
+
–
+
–
+
–
+
–
–
+
–
–
74
75
76
77
78
79
80
1
2
3
4
5
6 7 8 9
10
11
12
13
14
15
16
17
18
19
20
21
22 23
5BAND GRAPHIC EQUALIZER
+
–
+
–
+
–
+
–
–
+
–
+
–
+
–
–
+
–
25
+
–
+
–
26
27
28
29
34
33
32
+
–
–
24
30
INTERFACE
IN E2
IN D2
IN C2
IN B2
IN A2
GND
SUPER
WOOFER
A VSS
SW NF
IN A1
IN B1
IN C1
IN D1
IN E1
VOL OUT2
BB A2
BB B2
BUF IN2
BUF OUT2
G GND
VOL OUT1
BB A1
BB B1
BUF IN1
BUF OUT1
LATCH
DATA
CLOCK
L+R
IN F2
LR OUT
LPF IN
LPF O
KEY IN2
KEY OUT2
REC A2
REC B2
F1 F2
F3 O2
F3 F2
F6 F2
F1 O2
F3 IN2
F1 IN2
F4 F2
F2 F2
F4 O2
F2 O2
F4 IN2
F2 IN2
F5 F2
VOL IN2
F OUT2
INF1
MIC IN
DELAY IN
D
ELAY OUT
KEY IN1
KEY OUT1
REC A1
REC B1
F1 F1
F1 O1
F1 IN1
F2 F1
F2 O1
F2 IN1
F3 F1
F3 O1
F3 IN1
F4 F1
F4 O1
F4 IN1
F5 F1
F6 F1
F OUT1
VOL IN1
31 D VDD
70
71
A VDD
GND
55
HCD-GV6/GV8
IC191
BA7615N
– PANEL FL Board –
IC602
BA3830F
– MIC Board –
IC851
M65850P
– PANEL VR Board –
IC701
NJU3716L
2
1
3
4
6
5
9
10
CTLC
VOUT
7
8
MUTE
LOGIC
CTLC
IN3
VCC
IN4
IN1
CTLA
CTLB
IN2
75
Ω
8db
OSCILLATOR
1/2 VCC
AUTO
RESET
LPF1
MAIN
CONTROL
A/D
20KBIT
SRAM
LPF2
D/A
1
2
3
4
5
6
7
8
9
10
14
13
12
11
CLOCK
RESET
MO
MI
D1
DO0
DO1
VCC
CLOCK
REF
OP2IN
OP2OUT
LPF2IN
LPF2OUT
LPF1IN
LPF1OUT
OP1OUT
OP1IN
CC1
CC2
GND
F01
R02
R01
LINE NF
LINE IN
REFERENCE
CURRENT
REFERENCE
CURRENT
RESET
BAND
PASS
FILTER
DET
17
RESET
18
F02
16
F03
15
F04
14
F05
13
F06
12
REC LEVEL
11
VCC
10
4
3
2
1
+
–
REC NF
REC IN
6
RESET C
7
BIAS C
8
GND
9
5
+
–
OUTPUT CIRCUIT
LATCH CIRCUIT
SHIFT REGISTER
CONTROL
CIRCUIT
20
21
19
23
24
22
18 17 16 15 14 13
4
3
2
1
6
P7
P8
P9
P10
P11
VSS
P12
P13
P14
P15
P16
7
SO
8 9 10 11
12
5
VDD
P6
P5
P4
P3
P2
VSS
P1
CLR
STB
CLK
D
ATA
56
HCD-GV6/GV8
7-34.
IC PIN FUNCTION DESCRIPTION
•
VIDEO BOARD IC502 M30620MCA-B21FP (CD MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
SENSE
I
Internal status (SENSE) signal input from the CXD3008Q (IC101)
2
SENSE CLK
O
Sense serial data reading clock signal output to the CXD3008Q (IC101)
3
DSP DATA
O
Serial data output to the CXD3008Q (IC101)
4
DSP LATCH
O
Serial data latch pulse output to the CXD3008Q (IC101)
5
DSP CLK
O
Serial data transfer clock signal output to the CXD3008Q (IC101)
6
TSENS
I
Disc tray status detection signal input terminal Not used
7
REMOTE IN
I
Remote control signal input terminal Not used (open)
8
BYTE
I
External data bus line byte selection signal input terminal “L”: 16 bit, “H”: 8 bit (fixed at “L”)
9
VSS
—
Ground terminal
10
DSP MUTE
O
Muting on/off control signal output to the CXD3008Q (IC101) “H”: muting on
11
CTRL1
O
Clock selection signal output to the CXD3008Q (IC101)
“L”: 16.9344 MHz (double speed), “H”: 33.8688 MHz
“L”: 16.9344 MHz (double speed), “H”: 33.8688 MHz
12
XRESET
I
Reset signal input from the system controller (IC501) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
13
XOUT
O
Main system clock output terminal (10 MHz)
14
VSS
—
Ground terminal
15
XIN
I
Main system clock input terminal (10 MHz)
16
VCC
—
Power supply terminal (+5V)
17
NMI
I
Non-maskable interrupt input terminal (fixed at “H” in this set)
18
SCOR
I
Subcode sync (S0+S1) detection signal input from the CXD3008Q (IC101)
19
DSENS
I
Disc status detection signal input terminal Not used
20
CL680 HINT
I
Interrupt request signal input from the MPEG video/audio decoder (IC505)
21
CL680 SEL
O
Command selection signal output to the MPEG video/audio decoder (IC505)
22
DF LATCH
O
Serial data latch pulse output to the D/A converter (IC509) “L” active
23
CL680 HRDY
I
Ready status detection signal input from the MPEG video/audio decoder (IC505)
24
CL680 RESET
O
Reset signal output to the MPEG video/audio decoder (IC505) “L”: reset
25
JOG1
I
Rotary encoder jog dial pulse input terminal Not used (fixed at “H”)
26
JOG2
I
Rotary encoder jog dial pulse input terminal Not used (fixed at “H”)
27
CTRL2
O
Laser power selection signal output to the CXA2568M (IC103) “H”: double speed
28
LDON
O
Laser on/off selection signal output to the CXA2568M (IC103) “H”: laser on
29
CLK
I/O
Communication data reading clock signal input or transfer clock signal output with the system
controller (IC501) and fluorescent indicator tube driver (IC601)
controller (IC501) and fluorescent indicator tube driver (IC601)
30
DATA
I/O
Communication data bus with the system controller (IC501) and fluorescent indicator tube driver
(IC601)
(IC601)
31
DATA1O
O
Serial data output to the MPEG video/audio decoder (IC505) and D/A converter (IC509)
32
DATA1I
I
Serial data input from the MPEG video/audio decoder (IC505)
33
CLK1
O
Serial data transfer clock signal output to the MPEG video/audio decoder (IC505) and D/A
converter (IC509)
converter (IC509)
34
SHARPNESS
O
Sharpness control signal output of the video signal (Y signal) “H” active (“L”: normal)
35
XVLEVEL. DOWN
O
Not used (open)
36
SUBQ DATA
I
Subcode Q data input from the CXD3008Q (IC101)
37
SUBQ CLK
O
Subcode Q data reading clock signal output to the CXD3008Q (IC101)
38
P.ON
O
Power on/off control signal output terminal Not used (open)
39
BUS XRDY
I
Ready signal input terminal Not used (fixed at “H”)
40
BUS
O
Not used (open)
41
BUS XHOLD
I
Hold signal input terminal Not used (fixed at “H”)
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