Sony HCD-CX5BIP Service Manual ▷ View online
HCD-CX5BiP
33
Pin No.
Pin Name
I/O
Description
60
MS
I
Micro controller interface mode selection signal input terminal Fixed at “H” in this unit
61
DOUT
O
Digital audio data output terminal Not used
62
AOUT1
O
Audio data output to the DSP
63
BCKO
O
Bit clock signal output to the DSP
64
LRCKO
O
L/R sampling clock signal output to the DSP
65
AIN
I
Digital audio data input terminal Not used
66
BCKI
I
Bit clock signal input terminal Not used
67
LRCKI
I
L/R sampling clock signal input terminal Not used
68
VDD1
-
Power supply terminal (+1.5V)
69
VSS1
-
Ground terminal
70
AWRC
-
Not used
71
PVDD3
-
Power supply terminal (+3.3V)
72
PDO
O
Phase error margin signal between EFM signal and PLCK signal output terminal
73
TMAXS
O
TMAX detection signal output terminal Not used
74
TMAX
O
TMAX detection signal output terminal
75
LPFN
I
Inverted signal input from the operation amplifi er for PLL loop fi lter
76
LPFO
O
Signal output from the operation amplifi er for PLL loop fi lter
77
PVREF
I
Reference voltage (+1.65V) input terminal
78
VCOF
O
VCO fi lter output terminal
79
PVSS3
-
Ground terminal
80
SLCO
O
EFM slice level output terminal
81
RFI
I
RF signal input terminal
82
RFRPI
I
RF ripple signal input terminal
83
RFEQ0
O
EFM slice level output terminal
84
VRO
O
Reference voltage (+1.65V) output terminal
85
RESIN
O
External resistor connection terminal
86
VMDIR
O
Reference voltage (+1.65V) output terminal for automatic power control circuit
87
TESTR
O
Low-pass fi lter terminal for RFEQO offset correction
88
AGCI
I
RF signal amplitude adjustment amplifi cation input terminal
89
RFO
O
RF signal generation amplifi cation output terminal
90
RVDD3
-
Power supply terminal (+3.3V)
91
LDO
O
Laser diode on/off control signal output to the automatic power control circuit
“H”: laser diode on
“H”: laser diode on
92
MDI
I
Light amount monitor input from the laser diode of optical pick-up block
93
RVSS3
-
Ground terminal
94
C
I
Main beam (C) input from the optical pick-up block
95
A
I
Main beam (A) input from the optical pick-up block
96
D
I
Main beam (D) input from the optical pick-up block
97
B
I
Main beam (B) input from the optical pick-up block
98
F
I
Sub beam (F) input from the optical pick-up block
99
TNPC
O
External capacitor connection terminal
100
E
I
Sub beam (E) input from the optical pick-up block
HCD-CX5BiP
34
MAIN BOARD IC101 R5F3650KBDFA (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
FL DO
O
Serial data output to the fl uorescent indicator tube driver
2
FL SCL
O
Serial data transfer clock signal output to the fl uorescent indicator tube driver
3
FL CS
O
Chip select signal output to the fl uorescent indicator tube driver
4
SIRCS
I
SIRCS signal input from the remote control receiver
5 to 7
NC
-
Not used
8
BYTE
I
External data bus width selection signal input terminal
9
CNVss
I
Processor mode selection signal input terminal
10
Xcin
I
Sub system clock input terminal (32.768 kHz)
11
Xcout
O
Sub system clock output terminal (32.768 kHz)
12
RESET
I
System reset signal input terminal Not used
13
Xout
O
Main system clock output terminal (5 MHz)
14
Vss
-
Ground terminal
15
Xin
I
Main system clock input terminal (5 MHz)
16
Vcc
-
Power supply terminal (+3.3V)
17
NMI
-
Not used
18
RDS-INT
I
RDS interrupt signal input from the FM receiver
19
SBSY
I
Subcode block sync signal input from the CD-MP3 processor
20
AC-CUT
I
AC cut on/off detection signal input terminal “L”: AC cut on
21
NC
-
Not used
22
iPod CP IIC SCL
O
Serial data transfer clock signal output to the EEPROM
23
NC
-
Not used
24
iPod CP IIC SDA
O
Serial data output to the EEPROM
25
NC
-
Not used
26
iPod CP RESET
O
Reset signal output to the EEPROM
27
USB_RESET
O
System reset signal output terminal Not used
28
USB_CTS
I
Clear to send signal input terminal Not used
29
IIC_CLK
-
Not used
30
IIC_SDA
-
Not used
31
USB_TxD_OUT
O
Serial data output terminal Not used
32
USB_RxD_IN
I
Serial data input terminal Not used
33
USB_RTS
O
Ready to send signal output terminal Not used
34
NC
-
Not used
35
DAB_TxD_OUT
O
Serial data output to the module (DAB tuner)
36
DAB_RxD_IN
I
Serial data input from the module (DAB tuner)
37
DAB-POWER_3.3
O
Power supply on/off control signal output terminal for the DAB tuner section
38
DAB-POWER_1.2
O
Power supply on/off control signal output terminal for the DAB tuner section
39
POWER-AMP_SW
O
Power supply on/off control signal output terminal for the power amplifi er
40
DAMP PDX
-
Not used
41
FLASH WRITE
MODE IN
-
Not used
42
AMP_MUTE
O
Muting on/off control signal output to the power amplifi er
43
TUNER/DAB_SEL
O
Audio signal selection signal output terminal
44
DSP_MUTE
O
Muting on/off control signal output to the DSP
45
DSP_RESET
O
Reset signal output to the DSP
46
FLASH WRITE
MODE IN
-
Not used
47
DSP IIC_SDA
I/O
Serial data input/output with the DSP
48
DSP IIC_CLK
O
Serial data transfer clock signal output to the DSP
49
DAMP_FAULT
I
Error signal input from the power amplifi er
50
DAMP_RESET
O
Reset signal output to the power amplifi er
51
STANDBY_LED
O
LED drive signal output terminal for the STANDBY indicator
52
ST LATCH
O
Serial latch pulse signal output to the FM receiver
53
ST DATA
I/O
Serial data input/output with the FM receiver
54
ST CLK
O
Serial data transfer clock signal output to the FM receiver
55
MODEL_IN
I
Model setting terminal
56
RELAY ON BYPASS
-
Not used
57
CDM OPEN SW
I
Switch detection signal input terminal for loading section
58
CDM CLOSE SW
I
Switch detection signal input terminal for loading section
59
CDM LOAD IN
O
Motor drive signal output terminal for the loading section
HCD-CX5BiP
35
Pin No.
Pin Name
I/O
Description
60
CDM LOAD OUT
O
Motor drive signal output terminal for the loading section
61
FLD RESET
O
Reset signal output to the fl uorescent indicator tube driver
62
Vcc
-
Power supply terminal (+3.3V)
63
POWER ON
O
Main power on/off control signal output terminal “H”: main power on
64
Vss
-
Ground terminal
65
SPEC_IN
I
Destination setting terminal
66
AUDIO LEVEL DET
I
Audio level detection signal input from the DSP
67
USB IRPTO
I
Interrupt request signal input from the audio decoder
68
USB MCHNG
I
Music change signal input from the audio decoder
69
POWER PROTECT1
-
Not used
70, 71
KEY_1, KEY_2
I
Panel key input terminal (A/D input)
72
USB/IPOD_SEL
O
Audio signal selection signal output terminal Not used
73
IP DOCK_DETECT
I
iPod/iPhone detection signal input terminal
74
KEY WAKE UP
I
Key wake-up signal input terminal
75
USB_SW FAULT
I
Over current detection signal input terminal Not used
76
iPhone_SW FAULT
I
Over current detection signal input terminal for the iPod/iPhone power supply section
77
USB SDA
I/O
Serial data input/output with the audio decoder
78
USB CLK
O
Serial data transfer clock signal output to the audio decoder
79
USB BUSY
I
Busy signal input from the audio decoder
80
USB RESET
O
Reset signal output to the audio decoder
81
IP_ACC_ON
-
Not used
82
IP_WAKE
-
Not used
83
POWER_PROTECT2
-
Not used
84
USB_VBUS_EN
O
Power supply on/off control signal output terminal Not used
85
iPhone_VBUS_EN
O
Power supply on/off control signal output terminal for the iPod/iPhone section
86
ZIPANG_ON
O
Power supply on/off control signal output terminal for the CD section
87
CD_XRST
O
Reset signal output to the CD-MP3 processor
88
CD_DRIVER_MUTE
O
Motor drive on/off control signal output to the motor/coil driver
89
MP3_IREQ
I
Request signal input from the CD-MP3 processor
90
CD CCE
O
Chip enable signal output to the CD-MP3 processor
91
CD CLK
O
Serial data transfer clock signal output to the CD-MP3 processor
92
DEC BUS SEL
-
Not used
93 to 95
CD BUS3 to CD BUS1
O
Serial data output to the CD-MP3 processor
96
Avss
-
Ground terminal
97
CD BUS0
O
Serial data output to the CD-MP3 processor
98
VREF
I
Reference voltage (+3.3V) input terminal
99
Avcc
-
Power supply terminal (+3.3V)
100
NC
-
Not used
HCD-CX5BiP
36
MAIN BOARD IC501 BU94604KV-E2 (AUDIO DECODER)
Pin No.
Pin Name
I/O
Description
1
RESETX
I
Reset signal input from the system controller
2
SEL_SLAVE
I
Mode setting terminal “H”: stand alone, “L”: slave Fixed at “L” in this unit
3
SEL_MP3
I
Mode setting terminal “H”: play MP3 only, “L”: play MP1, MP2 and MP3
Fixed at “L” in this unit
Fixed at “L” in this unit
4
SEL_DOUT
I
Mode setting terminal “H”: analog D/A converter output, “L”: digital output
Fixed at “L” in this unit
Fixed at “L” in this unit
5
SEL_VOL
I
Mode setting terminal “H”: volume control valid, “L”: volume control invalid
Fixed at “L” in this unit
Fixed at “L” in this unit
6
SEL_APLAY
I
Mode setting terminal “H”: auto play off, “L”: auto play Fixed at “H” in this unit
7
SEL_UTPKT
I
Mode setting terminal “H”: normal operation, “L”: USB test packet output
Fixed at “H” in this unit
Fixed at “H” in this unit
8
IRPTO
O
Interrupt request signal output to the system controller
9
TEST2
I
Terminal for test
10
MCHNG
O
Music change signal output to the system controller
11
BUSY
O
Busy signal output to the system controller
12
IIC SCL
I
Serial data transfer clock signal input from the system controller
13
IIC SDA
I/O
Serial data input/output with the system controller
14, 15
A0, A1
-
Not used
16
SEL_SMAN
I
Mode setting terminal “H”: mode2, “L”: mode3 Fixed at “H” in this unit
17
TEST3
I
Terminal for test
18
DVDDIO
-
Power supply terminal (+3.3V)
19
SD_CON
-
Not used
20
SD_DO
-
Not used
21
SD_CLK
-
Not used
22
SD_DI
-
Not used
23
SD_CS
-
Not used
24
DVSS
-
Ground terminal
25, 26
TEST5, TEST6
I
Terminal for test
27
DVDD_M2
-
Connect to pin 57
28 to 31
TEST6 to TEST8,
ATEST1
I
Terminal for test
32
AVDDC
-
Power supply terminal (+3.3V)
33
USB_DM
I
Audio data (negative) input terminal
34
USB_DP
I
Audio data (positive) input terminal
35
AVSSC
-
Ground terminal
36
REXTI
-
Not used
37
VOREFI
-
Not used
38
VDD_PLL
-
Power supply terminal (+3.3V)
39
TEST_PLL
I
Terminal for test
40
XIN_PLL
I
System clock input terminal (16.9344 MHz)
41
XOUT_PLL
O
System clock output terminal (16.9344 MHz)
42
VSS_PLL
-
Ground terminal
43
DAVSS
-
Ground terminal
44
RDACO
-
Not used
45
VCDACO
-
Not used
46
LDACO
-
Not used
47
DAVDD
-
Power supply terminal (+3.3V)
48
AMUTE
-
Not used
49 to 52
TEST9 to TEST12
I
Terminal for test
53
IIS LRCK
O
L/R sampling clock signal output to the DSP
54
IIS BCK
O
Bit clock signal output to the DSP
55
IIS DATA
O
Audio data output to the DSP
56
TEST13
I
Terminal for test
57
DVDD_M1
-
Connect to pin 27
58 to 61
TEST14 to TEST17
I
Terminal for test
62
DVSS
-
Ground terminal
63
TMODE
-
Not used
64
DVDDIO
-
Power supply terminal (+3.3V)
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