Sony HCD-CX5BIP Service Manual ▷ View online
HCD-CX5BiP
29
IC580 TPS2553DBVR
GND 2
EN 3
IN 1
4 FAULT
5 ILLM
6 OUT
CHARGE
PUMP
UNDERVOLTAGE
LOCKOUT
THERMAL
SENSE
CURRENT
LIMIT
4-ms
DEGLITCH
8-ms
DEGLITCH
CURRENT
SENSE
DRIVER
+
–
RREVERSE VOLTAGE
COMPARATOR
IC681 PCM1808PWR
DELTA-SIGMA
MODULATOR
DELTA-SIGMA
MODULATOR
ANTIALIAS
LOW-PASS FILTER
ANTIALIAS
LOW-PASS FILTER
AGND
VCC
2
3
3
VDD
DGND
4
5
5
LRCK 7
REFERENCE
u1/64
DECIMATION
FILTER
WITH
HIGH-PASS
FILTER
SERIAL
INTERFACE
&
MODE/FORMAT
CONTROL
FMT
12
VINR
14
VINL
13
MD1
11
MD0
10
DOUT
9
BCK
8
CLOCK & TIMING CONTROL
POWER
SUPPLY
SUPPLY
SCKI 6
VREF 1
HCD-CX5BiP
30
IC701 BD5446EFV-E2
7
8
9
8
9
10
CONTROL
INTERFACE
POWER
LIMITTER
GAIN
SELECTOR
TEST
DAC
HIGH TEMPERATURE PROTECTION,
UNDER VOLTAGE PROTECTION,
CLOCK STOP PROTECTION
OUTPUT SHORT PROTECTION,
OUTPUT DC VOLTAGE PROTECTION
SYS_CLK
BCLK
LRCLK
SDATA1
11
22
23
23
OUT_DAC2
OUT_DAC1
OUT_DAC1
24
ERROR
25
VCCA
26
N.C.
VCCA
12
13
14
13
14
RESETX
MUTEX
PDX
16
17
18
17
18
GAIN1
GAIN2
GAIN3
GAIN2
GAIN3
19
20
20
TEST1
TEST2
TEST2
21
SEL_DAC
SDATA2
15
IIS_LJ
IIC/LEFT
JUSTIFIED
INTERFACE
IIC/LEFT
JUSTIFIED
SELECTOR
DAC
SELECTOR
27
REG_G2
REG_G2
1
REG_G1
REG_G1
2
FILP
FILP
3
PLMT
4
FILA
FILA
5
REG_3
REG_3
GNDA
6
GNDA
OUT1P
50
OUT1P
REG_G1
VCCP1
51
VCCP1
53
N.C.
52
VCCP1
54
GNDP1
GNDP1
46 GNDP1
45
45
OUT1N
44 OUT1N
43
43
BSP1P
49
N.C.
48
N.C.
47
DRIVER
1P
DRIVER
1N
OUT2N
38
OUT2N
REG_G2
VCCP2
39
GNDP2
GNDP2
36 GNDP2
37
OUT2P
32 OUT2P
31
31
BSP2P
33
N.C.
35
N.C.
34
REG_G2
BSP2N
40
N.C.
41
REG_G1
BSP1N
42
DRIVER
2N
DRIVER
2P
PWM
MODULATOR
VCCP2
29
N.C.
30
VCCP2
28
x8 OVER
SAMPLING
DIGITAL
FILTER
IC750 MM3404A50URE
VOUT
3
CE 1
GND 2
VDD
4
+
–
VOLTAGE
REFERENCE
CURRENT
LIMIT
BIAS
HCD-CX5BiP
31
– FL Board –
IC601 PT6302LQ-010
SEGMENT
DRIVER
GRID
DRIVER
CG-RAM
ADDRESS SELECTOR
DC-RAM
CG-ROM
8 BIT
SHIFT
REGISTER
TIMING
GENERATOR 2
TIMING
GENERATOR 1
COMMAND
DECODER
CONTROL
CIRCUIT
PORT
DRIVER
WRITE
ADDRESS
COUNTER
READ
ADDRESS
COUNTER
GR1
32
SG20
16
SG19
15
GR2
33
OSCI 50
VSS 49
VDD 56
RSTB 52
OSCO 51
AD-RAM
DUTY CONTROL
OSCILLATOR
DIGIT CONTROL
CLKB 54
DIN 55
CSB 53
P1 57
P2 58
P2 58
AD
DRIVER
AD2 59
AD1 60
AD1 60
SG4 64
SG3 63
SG2 62
SG1 61
SG35
31
SG34
30
SG33
29
SG32
28
SG31
27
SG30
26
SG29
25
SG28
24
SG27
23
SG26
22
SG25
21
SG24
20
SG23
19
SG22
18
SG21
17
SG18
14
SG17
13
SG16
12
SG15
11
SG14
10
SG13
9
SG12
8
SG1
1
7
SG10
6
SG9
5
SG8
4
SG7
3
SG6
2
SG5
1
GR3
34
GR4
35
GR5
36
GR6
37
GR7
38
GR8
39
GR9
40
GR10
41
GR1
1
42
GR12
43
GR13
44
GR14
45
GR15
46
GR16
47
VEE
48
– DAB Board –
IC1001 MM3291CNRE
VDD 1
GND 2
CE 3
NC
4
REGULATOR
VOUT
5
HCD-CX5BiP
32
• IC Pin Function Description
BD94D-V BOARD IC101 TC94A70FG-101 (CD-MP3 PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
AVSS3
-
Ground terminal
2
RFZI
I
RF ripple zero crossing signal input terminal
3
RFRP
O
RF ripple signal output terminal
4
SBAD
O
Sub beam addition signal output terminal Not used
5
FEO
O
Focus error signal output terminal Not used
6
TEO
O
Tracking error signal output terminal
7
TEZI
I
Tracking error zero crossing signal input terminal
8
AVDD3
-
Power supply terminal (+3.3V)
9
FOO
O
Focus coil drive signal output terminal
10
TRO
O
Tracking coil drive signal output terminal
11
VREF
I
Reference voltage (+1.65V) input terminal
12
FMO
O
Sled motor drive signal output terminal
13
DMO
O
Spindle motor drive signal output terminal
14
VSSP3
-
Ground terminal
15
VCOI
I
VCO control voltage input terminal
16
VDDP3
-
Power supply terminal (+3.3V)
17
VDD1
-
Power supply terminal (+1.5V)
18
VSS1
-
Ground terminal
19
FGIN
I
FG signal input terminal Not used
20
IN_SW
I
Disc inner position detection signal input terminal Not used
21
/DFCT
O
Not used
22
XVSS3
-
Ground terminal
23
XI
I
System clock input terminal (16.9344 MHz)
24
XO
O
System clock output terminal (16.9344 MHz)
25
XVDD3
-
Power supply terminal (+3.3V)
26
DVSS3
-
Ground terminal
27
ROUT
O
Audio data (R-ch) output terminal Not used
28
DVDD3
-
Power supply terminal (+3.3V)
29
DVR
O
Reference voltage (+1.65V) output terminal Not used
30
LOUT
O
Audio data (L-ch) output terminal Not used
31
DVSS3
-
Ground terminal
32
VDDT3
-
Power supply terminal (+3.3V)
33
VSS1
-
Ground terminal
34
VDD1
-
Power supply terminal (+1.5V)
35
VDDM1
-
Power supply terminal (+1.5V)
36
SRAMSTB
I
S-RAM standby mode control signal input terminal Fixed at “L” in this unit
37
XRST
I
Reset signal input from the system controller “L”: reset
38 to 41
BUS0 to BUS3
I
Serial data input from the system controller
42
BUCK
I
Serial data transfer clock signal input from the system controller
43
XCCE
I
Chip enable signal input from the system controller
44
TEST
I
Setting terminal for test mode Normally fi xed at “L”
45
IRQ
I
Interrupt request signal input terminal Not used
46
ST_REQ/CKO
O
Request signal output terminal Not used
47
AOUT2
O
Audio data output terminal Not used
48
REQ
O
Request signal output to the system controller
49
PIO1/ST_REQ
O
Request signal output terminal Not used
50
PIO2
O
Not used
51
GATE
I
Gate signal input terminal
52
VSS1
-
Ground terminal
53
VDDT3
-
Power supply terminal (+3.3V)
54
SBSY
O
Subcode block sync signal output to the system controller
55
FOK
O
Not used
56
IPF
O
Not used
57
/LOCK
O
Not used
58
ZDET
O
Zero detection signal output terminal Not used
59
GPIN
I
Not used
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