Sony HBD-E770W Service Manual ▷ View online
HBD-E770W
85
Pin No.
Pin Name
I/O
Description
AK24
DVSS
-
Ground terminal
AK26
DVSS
-
Ground terminal
AK28
DVSS
-
Ground terminal
AK30
DVSS
-
Ground terminal
AK32
VCCK
-
Power supply terminal (+1.1V)
AK36
B_RDQ9
I/O
Two-way data bus with the SD-RAM
AK38
B_RA13
O
Address signal output to the SD-RAM
AK40
VCC2IO
-
Power supply terminal (+1.8V)
AK42
VCC2IO
-
Power supply terminal (+1.8V)
AL1
USB_DP0
I/O
USB differential serial data (positive) input/output with the USB connector (rear side)
AL3
USB_DM1
I/O
USB differential serial data (negative) input/output with the USB connector (front side)
AL5
AVSS33_USB
-
Ground terminal
AL7
FE_SVDD33
-
Power supply terminal (+3.3V)
AL21
VCCK
-
Power supply terminal (+1.1V)
AL23
VCCK
-
Power supply terminal (+1.1V)
AL25
VCCK
-
Power supply terminal (+1.1V)
AL27
VCCK
-
Power supply terminal (+1.1V)
AL29
VCCK
-
Power supply terminal (+1.1V)
AL31
VCCK
-
Power supply terminal (+1.1V)
AL35
VCC2IO
-
Power supply terminal (+1.8V)
AL37
B_RDQ11
I/O
Two-way data bus with the SD-RAM
AL39
B_RDQ14
I/O
Two-way data bus with the SD-RAM
AL41
B_RCLK0B
O
Clock signal (negative) output to the SD-RAM
AL43
B_RCLK0
O
Clock signal (positive) output to the SD-RAM
AM2
USB_DP1
I/O
USB differential serial data (positive) input/output with the USB connector (front side)
AM4
USB_VRT
-
Not used
AM6
FE_SXVDD33
-
Power supply terminal (+3.3V)
AM8
FE_TLO
O
Motor drive signal output to the motor driver IC
AM36
B_RDQM1
O
Data mask signal output to the SD-RAM
AM38
B_RDQ12
I/O
Two-way data bus with the SD-RAM
AM40
B_RDQ10
I/O
Two-way data bus with the SD-RAM
AM42
B_RDQ13
I/O
Two-way data bus with the SD-RAM
AN1
FE_STXP
O
SATA channel 1 RX differential pair signal (positive) output terminal
AN3
AVDD33_USB
-
Power supply terminal (+3.3V)
AN5
FE_SAGND
-
Ground terminal
AN7
FE_SPLLVDD12
-
Power supply terminal (+1.2V)
AN35
DVSS
-
Ground terminal
AN37
DVSS
-
Ground terminal
AN39
DVSS
-
Ground terminal
AN41
B_RDQ15
I/O
Two-way data bus with the SD-RAM
AN43
B_RDQ8
I/O
Two-way data bus with the SD-RAM
AP2
FE_STXN
O
SATA channel 1 RX differential pair signal (negative) output terminal
AP4
CORE_RESETB
I
System reset signal input from the system controller
AP6
FE_STXVDD12
-
Power supply terminal (+1.2V)
AP8
FE_AVDD12_RX
-
Power supply terminal (+1.2V)
AP36
B_RDQ7
I/O
Two-way data bus with the SD-RAM
AP38
B_RDQM0
O
Data mask signal output to the SD-RAM
AP40
VCC2IO
-
Power supply terminal (+1.8V)
AP42
VCC2IO
-
Power supply terminal (+1.8V)
AR1
FE_SRXP
I
SATA channel 1 TX differential pair signal (positive) input terminal
AR3
FE_SRXN
I
SATA channel 1 TX differential pair signal (negative) input terminal
AR5
RTCRBIAS
-
Not used
AR7
AVDD12_ADC
-
Power supply terminal (+1.2V)
AR17
DVSS
-
Ground terminal
AR19
VCC2IO
-
Power supply terminal (+1.8V)
AR25
DVSS
-
Ground terminal
AR29
DVSS
-
Ground terminal
AR31
VCC2IO
-
Power supply terminal (+1.8V)
AR37
B_RDQ6
I/O
Two-way data bus with the SD-RAM
HBD-E770W
86
Pin No.
Pin Name
I/O
Description
AR39
B_RDQ0
I/O
Two-way data bus with the SD-RAM
AR41
B_RDQS1B
O
Data strobe signal (negative) output to the SD-RAM
AR43
B_RDQS1
O
Data strobe signal (positive) output to the SD-RAM
AT2
XI_RTC
I
Not used
AT4
XO_RTC
O
Not used
AT6
AVSS12_ADC
-
Ground terminal
AT10
FE_GIO13
-
Not used
AT12
SCL
I/O
Two-way clock bus with the EEPROM
AT14
DVSS
-
Ground terminal
AT16
A_RDQ5
I/O
Two-way data bus with the SD-RAM
AT18
A_RDQM0
O
Data mask signal output to the SD-RAM
AT20
A_RDQ11
I/O
Two-way data bus with the SD-RAM
AT22
DVSS
-
Ground terminal
AT24
A_RA11
O
Address signal output to the SD-RAM
AT26
A_RA1
O
Address signal output to the SD-RAM
AT28
A_RBA2
O
Bank address signal output to the SD-RAM
AT30
A_RVREF
I
Reference voltage (+0.9V) input terminal for the SD-RAM
AT32
A_RDQ23
I/O
Two-way data bus with the SD-RAM
AT34
DVSS
-
Ground terminal
AT36
DVSS
-
Ground terminal
AT38
B_RDQ5
I/O
Two-way data bus with the SD-RAM
AT40
B_RDQS0
O
Data strobe signal (positive) output to the SD-RAM
AT42
B_RDQS0B
O
Data strobe signal (negative) output to the SD-RAM
AU1
AVDD33_RTC
-
Power supply terminal (+3.3V)
AU3
AVSS33_RTC
-
Ground terminal
AU5
AVDD33_SACD
-
Power supply terminal (+3.3V)
AU7
AVDD33_ST
-
Power supply terminal (+3.3V)
AU9
AVSS12_ST2
-
Ground terminal
AU11
EEPWRQ
-
Not used
AU13
VCC3IO_1
-
Power supply terminal (+3.3V)
AU15
A_RDQ3
I/O
Two-way data bus with the SD-RAM
AU17
DVSS
-
Ground terminal
AU19
A_RDQ9
I/O
Two-way data bus with the SD-RAM
AU21
DVSS
-
Ground terminal
AU23
A_RCASB
O
Column address strobe signal output to the SD-RAM
AU25
DVSS
-
Ground terminal
AU27
A_RBA1
O
Bank address signal output to the SD-RAM
AU29
DVSS
-
Ground terminal
AU31
A_RDQ21
I/O
Two-way data bus with the SD-RAM
AU33
DVSS
-
Ground terminal
AU35
A_RDQM3
O
Data mask signal output to the SD-RAM
AU37
A_RDQ27
I/O
Two-way data bus with the SD-RAM
AU39
DVSS
-
Ground terminal
AU41
B_RDQ3
I/O
Two-way data bus with the SD-RAM
AU43
B_RDQ2
I/O
Two-way data bus with the SD-RAM
AV2
FE_JRTCLK
-
Not used
AV4
AVSS33_SACD
-
Ground terminal
AV6
AVDD12_SRX1
-
Power supply terminal (+1.2V)
AV8
AVSS12_ST1
-
Ground terminal
AV10
AVDD12_ST
-
Power supply terminal (+1.2V)
AV12
GPIO6
O
UPG status signal output to the system controller
AV14
SDA
I/O
Two-way data bus with the EEPROM
AV16
A_RDQ0
I/O
Two-way data bus with the SD-RAM
AV18
A_RDQM1
O
Data mask signal output to the SD-RAM
AV20
A_RDQ14
I/O
Two-way data bus with the SD-RAM
AV22
A_RA13
O
Address signal output to the SD-RAM
AV24
A_RCSB
O
Chip select signal output to the SD-RAM
AV26
A_RA2
O
Address signal output to the SD-RAM
AV28
A_RA5
O
Address signal output to the SD-RAM
HBD-E770W
87
Pin No.
Pin Name
I/O
Description
AV30
NC
-
Not used
AV32
A_RDQ16
I/O
Two-way data bus with the SD-RAM
AV34
A_RDQM2
O
Data mask signal output to the SD-RAM
AV36
A_RDQ25
I/O
Two-way data bus with the SD-RAM
AV38
A_RDQ30
I/O
Two-way data bus with the SD-RAM
AV40
VCC2IO
-
Power supply terminal (+1.8V)
AV42
VCC2IO
-
Power supply terminal (+1.8V)
AW1
FE_JTMS
-
Not used
AW3
FE_JTDI
-
Not used
AW5
AVDD12_STX1
-
Power supply terminal (+1.2V)
AW7
AVDD12_SRX2
-
Power supply terminal (+1.2V)
AW9
AVSS12_ST2
-
Ground terminal
AW11
GPIO5
-
Not used
AW13
DVSS
-
Ground terminal
AW15
A_RDQ1
I/O
Two-way data bus with the SD-RAM
AW17
DVSS
-
Ground terminal
AW19
A_RDQ12
I/O
Two-way data bus with the SD-RAM
AW21
DVSS
-
Ground terminal
AW23
A_RODT
O
On die termination enable signal output to the SD-RAM
AW25
DVSS
-
Ground terminal
AW27
A_RA9
O
Address signal output to the SD-RAM
AW29
DVSS
-
Ground terminal
AW31
A_RDQ18
I/O
Two-way data bus with the SD-RAM
AW33
DVSS
-
Ground terminal
AW35
A_RDQ28
I/O
Two-way data bus with the SD-RAM
AW37
DVSS
-
Ground terminal
AW39
A_AVDD12_MEMPLL
-
Power supply terminal (+1.2V)
AW41
B_RDQ4
I/O
Two-way data bus with the SD-RAM
AW43
B_RDQ1
I/O
Two-way data bus with the SD-RAM
AY2
NS_TSTN
-
Not used
AY4
SRXP_2
I
SATA channel 2 RX differential pair signal (positive) input terminal Not used
AY6
AVDD12_STX2
-
Power supply terminal (+1.2V)
AY8
AVSS33_XTAL25M
-
Ground terminal
AY10
GPIO4
-
Not used
AY12
TRST
-
Not used
AY14
VCC2IO
-
Power supply terminal (+1.8V)
AY16
A_RDQS0
O
Data strobe signal (positive) output to the SD-RAM
AY18
VCC2IO
-
Power supply terminal (+1.8V)
AY20
A_RDQ8
I/O
Two-way data bus with the SD-RAM
AY22
VCC2IO
-
Power supply terminal (+1.8V)
AY24
A_RA4
O
Address signal output to the SD-RAM
AY26
VCC2IO
-
Power supply terminal (+1.8V)
AY28
A_RA10
O
Address signal output to the SD-RAM
AY30
VCC2IO
-
Power supply terminal (+1.8V)
AY32
A_RDQ22
I/O
Two-way data bus with the SD-RAM
AY34
VCC2IO
-
Power supply terminal (+1.8V)
AY36
A_RDQ24
I/O
Two-way data bus with the SD-RAM
AY38
VCC2IO
-
Power supply terminal (+1.8V)
AY40
A_AVSS12_MEMPLL
-
Ground terminal
AY42
DVSS
-
Ground terminal
BA1
NS_TSTP
-
Not used
BA3
STXN_1
O
SATA channel 1 TX differential pair signal (negative) output terminal
BA5
STXN_2
O
SATA channel 2 TX differential pair signal (negative) output terminal Not used
BA7
RREF
-
Not used
BA9
XTAL25MO
O
System clock signal output terminal (25 MHz)
BA11
TCK
-
Not used
BA13
A_RDQ4
I/O
Two-way data bus with the SD-RAM
BA15
A_RDQ6
I/O
Two-way data bus with the SD-RAM
BA17
A_RDQS1B
O
Data strobe signal (negative) output to the SD-RAM
HBD-E770W
88
Pin No.
Pin Name
I/O
Description
BA19
A_RDQ15
I/O
Two-way data bus with the SD-RAM
BA21
A_RCLK0B
O
Clock signal (negative) output to the SD-RAM
BA23
A_RA8
O
Address signal output to the SD-RAM
BA25
A_RA12
O
Address signal output to the SD-RAM
BA27
A_RA7
O
Address signal output to the SD-RAM
BA29
A_RCKE
O
Clock enable signal output to the SD-RAM
BA31
A_RDQ20
I/O
Two-way data bus with the SD-RAM
BA33
A_RDQS2
O
Data strobe signal (positive) output to the SD-RAM
BA35
A_RDQS3B
O
Data strobe signal (negative) output to the SD-RAM
BA37
A_RDQ26
I/O
Two-way data bus with the SD-RAM
BA39
A_RCLK1
O
Clock signal (positive) output to the SD-RAM
BA41
DVSS
-
Ground terminal
BA43
VCC2IO
-
Power supply terminal (+1.8V)
BB2
SRXN_1
I
SATA channel 1 RX differential pair signal (negative) input terminal
BB4
SRXN_2
I
SATA channel 2 RX differential pair signal (negative) input terminal Not used
BB6
SVCTST
-
Not used
BB8
XTAL25MI
I
System clock signal input terminal (25 MHz)
BB10
TDO
-
Not used
BB12
TDI
-
Not used
BB14
VCC2IO
-
Power supply terminal (+1.8V)
BB16
A_RDQS0B
O
Data strobe signal (negative) output to the SD-RAM
BB18
VCC2IO
-
Power supply terminal (+1.8V)
BB20
A_RDQ10
I/O
Two-way data bus with the SD-RAM
BB22
VCC2IO
-
Power supply terminal (+1.8V)
BB24
A_RRASB
O
Row address strobe signal output to the SD-RAM
BB26
VCC2IO
-
Power supply terminal (+1.8V)
BB28
A_RBA0
O
Bank address signal output to the SD-RAM
BB30
VCC2IO
-
Power supply terminal (+1.8V)
BB32
A_RDQ17
I/O
Two-way data bus with the SD-RAM
BB34
VCC2IO
-
Power supply terminal (+1.8V)
BB36
A_RDQ31
I/O
Two-way data bus with the SD-RAM
BB38
VCC2IO
-
Power supply terminal (+1.8V)
BB40
A_TP_MEMPLL
-
Not used
BB42
VCC2IO
-
Power supply terminal (+1.8V)
BC1
SRXP_1
I
SATA channel 1 RX differential pair signal (positive) input terminal
BC3
STXP_1
O
SATA channel 1 TX differential pair signal (positive) output terminal
BC5
STXP_2
O
SATA channel 2 TX differential pair signal (positive) output terminal Not used
BC7
AVDD33_XTAL25M
-
Power supply terminal (+3.3V)
BC9
GPIO7
-
Not used
BC11
TMS
-
Not used
BC13
A_RDQ2
I/O
Two-way data bus with the SD-RAM
BC15
A_RDQ7
I/O
Two-way data bus with the SD-RAM
BC17
A_RDQS1
O
Data strobe signal (positive) output to the SD-RAM
BC19
A_RDQ13
I/O
Two-way data bus with the SD-RAM
BC21
A_RCLK0
O
Clock signal (positive) output to the SD-RAM
BC23
A_RA0
O
Address signal output to the SD-RAM
BC25
A_RA6
O
Address signal output to the SD-RAM
BC27
A_RA3
O
Address signal output to the SD-RAM
BC29
A_RWEB
O
Write enable signal output to the SD-RAM
BC31
A_RDQ19
I/O
Two-way data bus with the SD-RAM
BC33
A_RDQS2B
O
Data strobe signal (negative) output to the SD-RAM
BC35
A_RDQS3
O
Data strobe signal (positive) output to the SD-RAM
BC37
A_RDQ29
I/O
Two-way data bus with the SD-RAM
BC39
A_RCLK1B
O
Clock signal (negative) output to the SD-RAM
BC41
A_TN_MEMPLL
-
Not used
BC43
A_REXTDN
-
Not used
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